Topic-II

8086 Microprocessor & it’s

Architecture

T1. Barry B Brey, The Intel Microprocessors .Pearson, Eight Ed. 2009. Chapter 2
R1. Douglas V Hall, Microprocessor and Interfacing, TMH, Second Edition. Chapter 2

Jan 24th – 28th 2023

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 16 bit Microprocessor

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 32 bit Microprocessor

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 Variations of 8086 - 8088

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 Characteristics of the X86 family

• CISC
• Instructions broken up into micro operations
• Complex instruction decoder

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 Little Endian format
• Binary data are stored as a byte (8 bits), word (16 bits), or
double word (32 bits)
• data may be unsigned or signed.
• Signed negative data are always stored in the two's complement
form.
• Data that are wider than 8 bits are always stored using the little
endian format.
• The assembler directives
• DB or BYTE define bytes,
• DW or WORD define words,
• DD or DWORD define doublewords,
• DQ or QWORD define quadwords.
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 Little Endian & Big Endian
• A word (16-bits) is formed with two bytes of data.
• Little Endian
• The least significant byte always stored in the lowest-numbered
memory location.
• Most significant byte is stored in the highest.
•

• Big Endian
• Alternate method is called the big endian format.
• Numbers are stored with the lowest location containing the most
significant data.
• Not used with Intel microprocessors.
• The big endian format is used with the Motorola family of
microprocessors.

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 8086 Microprocessor

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 Bus Interface Unit (BIU)
• handles all transfers of data and addresses on the buses for
the execution unit

Execution Unit (EU)

• Actual function is performed here

- instructs BIU from where to fetch an instruction
- decodes it,
- executes it

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 8086 Microprocessor

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 Internal Architecture of 8086

Address bus (20 bits)

AH AL General purpose
BH BL register 
CH CL
Execution Unit
DH DL
(EU) Data bus
SP CS (16 bits)
Segment
BP register DS
SI SS
DI ALU Data bus ES
(16 bits)
IP

Bus
control
ALU Instruction Queue External bus
EU
control
Flag register
Bus Interface Unit (BIU)
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 EU Operation
1. Fetch an instruction from instruction
queue AH AL General purpose
2. According to the instruction, EU control BH BL register
CH CL
logic generates control signals. DH DL
(This process is also referred to as instruction SP
decoding) BP
SI
3. Depending on the control signal, DI ALU Data bus
(16 bits)
EU performs one of the following
operations:
 An arithmetic operation ALU
EU
control instruction
 A logic operation Flag register 1011000101001010
 Storing a data into a register
 Moving a data from a register
 Changing flag register

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 X86 -ISA
Register Organisation

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 8086 Register organization
General purpose Registers. Address bus (20 bits)
- AX, BX, CX, DX AH AL General purpose
BH BL register 

Segment Registers. Execution Unit CH CL Data bus

(EU) (16 bits)
- CS, DS, SS, ES DH DL
SP CS

Pointer and Index Registers. BP DS

SI SS Segment
- IP, BP, SP ALU Data bus register
DI ES
-SI, DI (16 bits)
IP

Flag Registers Bus

-FLAGS control
ALU External bus
EU
control Instruction Queue
Flag register
Bus Interface Unit (BIU)

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