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Data Converters Final

The document discusses analog and digital signals, with analog signals having a continuous range of voltages while digital signals have discrete voltage levels. It covers how analog signals can be converted to digital signals using analog-to-digital converters (ADCs), which sample the analog voltage and output a digital number representing that voltage level within the ADC's input range.

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0% found this document useful (0 votes)
20 views122 pages

Data Converters Final

The document discusses analog and digital signals, with analog signals having a continuous range of voltages while digital signals have discrete voltage levels. It covers how analog signals can be converted to digital signals using analog-to-digital converters (ADCs), which sample the analog voltage and output a digital number representing that voltage level within the ADC's input range.

Uploaded by

dexipo5867
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Analog Signals vs.

Digital Signals
• Despite what you hear in the media, we don’t live in a digital world!

• Electricity by its nature is analog!

• Analog electrical signals have a continuous voltage and current range.

• When analog signals are restricted to one of a series of discrete voltages, we can map each of
these voltage levels to one of n numbers. When we do this, we call it digital.

• Numbers are made up of digits—hence why it is called digital.

• Today, almost all digital systems operate on two discrete voltage levels. This maps nicely into
a binary domain. Because of this, people will use the terms binary and digital interchangeably
although they don’t technically have to mean the same thing.
Analog Signals vs. Digital Signals

• Different logic families (TTL, CMOS, ECL, et cetera) map different voltages to logic 0 and logic 1:
• TTL: 0V = logic 0, +?V = logic 1
• CMOS: 0V = logic 0, +?V = logic 1
• ECL: -?V = logic 0, 0V = logic 1

• When negative logic is employed, the voltages that normally correspond to logic 0 and logic 1 are
reversed!
• On our breadboard in the lab, we treat +3.3V as a logic 1 and 0V as a logic 0.
• Acronyms:
TTL = Transistor-to-Transistor Logic
CMOS = Complementary Metal Oxide Semiconductor Logic
ECL = Emitter-Coupled Logic
Transducers convert one form of energy into another
• Transducers
• Allow us to convert physical phenomena to a voltage potential in a well-defined way.

A transducer is a device that converts one type of energy to another. The conversion can be to/from
electrical, electro-mechanical, electromagnetic, photonic, photovoltaic, or any other form of energy. While
the term transducer commonly implies use as a sensor/detector, any device which converts energy can
be considered a transducer. – Wikipedia.
Convert light to voltage with a CdS photocell

Vsignal = (+5V) RR/(R + RR)

• Choose R = (RR at median of intended range)


• Cadmium Sulfide (CdS)
• Cheap, low current
• tRC = (R+RR)*Cl
• Typically R~50-200kW
• C~20pF
• So, tRC~20-80uS
• fRC ~ 10-50kHz

Source: Forrest Brewer


MANY OTHER COMMON SENSORS (SOME DIGITAL)

• Force • Acceleration
• strain gauges - foil, conductive ink • MEMS
• conductive rubber • Pendulum
• rheostatic fluids • Monitoring
• Piezorestive (needs bridge) • Battery-level
• piezoelectric films • voltage
• capacitive force • Motor current
• Stall/velocity
• Charge source
• Temperature
• Sound • Voltage/Current Source
• Microphones • Field
• Both current and charge versions • Antenna
• Sonar • Magnetic
• Usually Piezoelectric • Hall effect
• Flux Gate
• Position
• microswitches • Location
• shaft encoders • Permittivity
• gyros • Dielectric

Source: Forrest Brewer


Going from analog to digital

• What we want
Physical Engineering
Phenomena Units

• How we have to get there

Physical Voltage or ADC Counts Engineering


Phenomena Current Units

Sensor ADC Software


Representing an analog signal digitally

• How do we represent an analog signal (e.g. continuous voltage)?


• As a time series of discrete values
→ On MCU: read ADC data register (counts) periodically (Ts)

f (x ) Counts
Voltage (discrete)
(continuous)

f sampled (x)
t
TS
Choosing the range
• Fixed # of bits (e.g. 8-bit ADC)
• Span a particular input voltage range
• What do the sample values represent?
– Some fraction within the range of values
→ What range to use?

Vr + Vr +

Vr − Vr −

t t
Range Too Small Range Too Big

Vr +

Vr −
t
Ideal Range
Choosing the granularity

• Resolution
• Number of discrete values that represent a range of
analog values
• MSP430: 12-bit ADC
• 4096 values
• Range / 4096 = Step
Larger range ➔ less info / bit

• Quantization Error
• How far off discrete value is from actual
• ½ LSB → Range / 8192
Larger range ➔ larger error
Choosing the sample rate
• What sample rate do we need?
• Too little: we can’t reconstruct the signal we care about
• Too much: waste computation, energy, resources

f (x )

f sampled (x)

t
Converting between voltages, ADC counts, and engineering units

• Converting: ADC counts  Voltage

Vr + Vin -Vr-
N ADC = 4095´
Vin Vr+ -Vr-
N ADC
Vr+ -Vr-
Vr − Vin = N ADC ´
t 4095
• Converting: Voltage  Engineering Units

VTEMP = 0.00355(TEMPC ) + 0.986


VTEMP − 0.986
TEMPC =
0.00355
ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS


• Analog-to-Digital Converter (ADC or A2D) – a circuit that takes in
an analog voltage and produces a digital representation of its value.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

time

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

time
• Sample – the action of duplicating the voltage value of the input
signal.

• Hold – the action of holding the voltage for a brief amount of time by
use of a capacitor.
ANALOG TO DIGITAL CONVERTERS
ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

time
• The Sample is accomplished by momentarily connecting the signal to
a capacitor in order to charge it up to the same voltage.
• The Hold is accomplished by disconnecting the signal and allowing
the conversion to be conducted on the voltage on the capacitor.

15.1 ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

time
• The Sample-and-Hold circuitry is designed so that this can be
accomplished very quickly so that it can disconnect from the input
signal as soon as possible to avoid altering its signal integrity.

15.1 ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+

VR- time
• Input Voltage Range – The voltage is digitized within a range of
voltages from:
o Voltage Reference High (VR+)
o Voltage Reference High (VR-)

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+

VR- time
• The goal of the conversion is to convert the analog voltage into a
digital number.
• This is called digitizing, quantizing, or discretizing.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+

1
0
VR- time
n=1
Sample=0
• n represents the number of bits in the digital value of the conversion.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+

1
0
VR- time
n=1
Sample=0
• n represents the number of bits in the digital value of the conversion.
• The input voltage range is divided into 2n discrete zones.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+

1
0
VR- time
n=1
Sample=0
• The larger the n, the closer the digital value is to the actual analog
voltage.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
11
10
01
00
VR- time
n=2
Sample=01
• The larger the n, the closer the digital value is to the actual analog
voltage.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
111
110
101
100
011
010
001
000
VR- time
n=3
Sample=010
• The larger the n, the closer the digital value is to the actual analog
voltage.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The larger the n, the closer the digital value is to the actual analog
voltage.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The number of bits n is called the ADC’s resolution.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The number of bits n is called the ADC’s resolution.
• MCU’s typically have ADC’s with resolutions of 8 to 16 bits.
microcontroller unit (MCU)

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The number of bits n is called the ADC’s resolution.
• MCU’s typically have ADC’s with resolutions of 8 to 16 bits.
• The MSP430 has up to 12-bits of resolution.
ANALOG TO DIGITAL CONVERTERS
ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The precision of an ADC is the smallest voltage that the LSB of the
digital output can represent.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS
ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The precision of an ADC is the smallest voltage that the LSB of the
digital output can represent.
• This is found by dividing the input voltage
range by the number of discrete zones.
• ANALOG TO DIGITAL CONVERTERS
ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+

VR- time

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The original analog value is found by multiplying the digital
conversion result (NADC) with the resolution.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The accuracy is how close the digital output is to the input signal.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4
Sample=0100
• The accuracy is how close the digital output is to the input signal.
• By design, an ADC will only ever be able
to get within +/- ½ LSB of the original
analog value.
ANALOG TO DIGITAL CONVERTERS
ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100

• The voltage can be sampled over time to create a list of digital


values.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000

• The voltage can be sampled over time to create a list of digital


values.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111

• The voltage can be sampled over time to create a list of digital


values.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111
0101

• The voltage can be sampled over time to create a list of digital


values.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001
0101

• The voltage can be sampled over time to create a list of digital


values.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001
0101 1101

• The voltage can be sampled over time to create a list of digital


values.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001 1110
0101 1101

• The voltage can be sampled over time to create a list of digital


values.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001 1110
0101 1101 1101

• The voltage can be sampled over time to create a list of digital


values.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001 1110
0101 1101 1101

TSA
• The sample period (TSA) is the time between samples.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001 1110
0101 1101 1101

TSA
• The sampling rate is the frequency of sampling: fSA= 1/TSA

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001 1110
0101 1101 1101

TSA
• The sampling rate is the frequency of sampling: fSA= 1/TSA
• This has units of samples-per-second (i.e., ksps, Msps).
ANALOG TO DIGITAL CONVERTERS
ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001 1110
0101 1101 1101

• If you sample fast enough, you can reconstruct the original signal.

ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001 1110
0101 1101 1101

• If you sample fast enough, you can reconstruct the original signal.
• Nyquist-Shannon Sampling Theorem states you need to sample at
least twice as fast as the frequency of the incoming signal to
accurately reconstruct the original waveform.
ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

VR+
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000

VR- time
n=4 0100
1000
0111 1001 1110
0101 1101 1101

• The MSP430FR2355 can sample up to 200 ksp s.

15.1 ANALOG TO DIGITAL CONVERTERS


ANALOG TO DIGITAL CONVERTERS

ANALOG TO DIGITAL CONVERTERS

12-bit
Example

ANALOG TO DIGITAL CONVERTERS


Digital-to-Analog Conversion (D/A)

• Digital-to-analog conversion is the process of mapping a number to an analog voltage.


• A single binary digit (bit) maps to one of two discrete voltages.
• A series of binary digits (bits) maps to series of discrete voltages (resolution/precision):
• An n-bit binary number can map to 2n voltage levels.
• An 8-bit binary number can map to 256 voltage levels.
• A device that takes a series of bits and outputs a voltage is called a digital-to-analog converter,
D/A converter, or DAC.
• These binary digits can be fed to the D/A converter as a serial bit stream or as a set of parallel
inputs.
• There are many ways to design D/A converters. The design of the D/A converter determines
what range of analog voltages you will get for a set of digital inputs…
Digital-to-Analog Conversion (D/A)

• Assume an 8-bit D/A converter is designed to output an analog voltage between


0 and +5V:

Voltage is proportional
0 = 00000000 -> 0V to number magnitude.
63 = 00111111 -> +1.25V
Dividing number by two
127 = 01111111 -> +2.5V will divide the output voltage
in half.
255 = 11111111 -> +5V

• Basic equation: Vout = Din/(2n - 1) * Vmax


• The output of a D/A converter can be shifted or amplified using additional analog
circuitry.
Digital-to-Analog Conversion (D/A)

• Simple example of a serial, pulse-width modulated (PWM) D/A converter:

• This D/A converter is simply a low-pass filter with rolloff frequency defined as follows:
frolloff = 1/(2*π*R*C)

where: R = resistor value (Ohms)


C = capacitor value (Farads)
Digital-to-Analog Conversion (D/A)
• The low-pass (RC) filter will be driven with a serial stream of bits (voltage
fluctuations between 0V and Vcc/Vdd).
• A low-pass filter will pass frequencies below the rolloff frequency and attenuate
frequencies above the rolloff frequency.
• Rolloff frequency is also sometimes called cutoff or turnover frequency.
• To use this kind of serial D/A converter, we must use digital electronics to convert
a binary number into a periodic square wave.
• If we drive the bits at the filter at a rate much lower than the rolloff frequency, we
would expect to see a square wave at the output of the D/A converter (clearly not
what we want).
• If we drive the bits at the filter at a rate much higher than the rolloff frequency, we
would expect to see no oscillation on the output (high frequency is being filtered—
what we want).
Digital-to-Analog Conversion (D/A)

• However, the RC filter has a DC offset (due to charge accumulated on the


capacitor). When a non-zero voltage is applied to the top terminal of the
capacitor, it slowly starts charging to match that voltage.

• When a zero voltage is applied to the top terminal of the capacitor, the capacitor
starts discharging.

• The voltage at the output of the D/A converter is simply the average voltage
presented at Vin.

• The average voltage of a square wave is proportional to the duty cycle.


Analog-to-Digital Conversion (A/D)
• Analog-to-digital conversion is the process of mapping an arbitrary voltage to one of n discrete
numbers.

• As with D/A converters, A/D converters are designed to work with a specific number of bits
(resolution/precision).

• An n-bit A/D converter will map a voltage to one of 2n numbers.

• A device that accepts an analog voltage and produces a corresponding number to represent
that voltage is called an analog-to-digital converter, A/D converter, or ADC.

• The binary output of an A/D converter can be handed to another device in parallel or as a serial
bit stream.
• As with D/A converters, there are many ways to design A/D converters.
• A/D converters use a reference voltage to define what voltage will yield the maximum binary
output…
Analog-to-Digital Conversion (A/D)
• Basic equation (for single input, single voltage reference):
Dout = Vin/Vref * (2n - 1)

• Basic equation (for differential input, single voltage reference):


Dout = (V+in - V-in)/Vref * (2n - 1)

• Applied voltages to an A/D converter can be scaled and shifted using additional analog
circuitry to meet the requirements of the A/D converter.

• A/D converters suffer from a phenomenon known as quantization error.

• A specific voltage will be “rounded” to the nearest whole number.

• This means that the digital output is not entirely accurate for all voltage inputs.
D TO A CONVERTERS

Vo = output voltage
VFS = full scale output voltage
K - scaling factor usually adjusted to unity
d1d2... dn = n-bit binary fractional word with the decimal point located at the left
d1- most significant bit (MSB) with a weight of VFS/2
dn - least significant bit (LSB) with a weight of VFS/2n
Current to Voltage Converter

Binary Weighed Resistors

Figure 9-18 (a) D/A converter with binary-weighted


resistors, (b) Decimal equivalent of binary inputs
Gayakwad.
The current through RF depends on switch position IF is 0.5,1, 1.5,
2, 2.5 mA etc. Vo=IFxRF. Since RF is 1K, the VO = 0.5,1,1.5V…etc.
Specifications of DAC
• Resolution
For an n bit INPUT, the total number of steps is 2n-1,
Then % resolution x100
is defined as the ratio of a change in output voltage resulting
from a change of 1 LSB at the digital inputs.
VoFS = Full-scale output Voltage.
Example: For an 8bit DAC, if full scale output voltage is
10.2V, what is the resolution?
=
R=

= 40mV/LSB. 1 LSB change results in 40mV output.


Accuracy.
Accuracy = ½ LSB. In the above example it is 20mV.

Problem: If n=4; VoFS = 15V; R = 15/(24-1) = 1V/LSB.


What is Vout for an input of 0110?

Vo = Resolution x D. D=Decimal Equivalent

D= (0110)2 = 6
Vo = (1V/LSB) x 6 = 6V.
DAC SPECIFICATIONS
• Resolution: (2n -1) Total No. of Steps.
% Resolution = x 100
• Linearity. Relation between input & output.
• Accuracy: Expressed as fraction of LSB
• Settling time. Time required for the O/P of DAC to
settle to with in ½ LSB of the final value for a
given digital input.
• Speed of conversion. Conversion Time.
• Supply Rejection:
• The ability of DAC to maintain accuracy and
linearity when the supply voltage changes.
Types of DAC
1.Binary weighted DAC
2.R-2R ladder type DAC
BINARY WEIGHTED DAC

Single VR is used. -VR


n binary weighed currents,
i1,i2,i3 etc.

Multiple values of resistors


2R, 4R, 8R etc are used. Binary
weighed currents, I1, I2, I3 are
used.
IT = I1+I2+I3+ +In
The output voltage is the voltage across Rf and it is given as

When RF = R, Vo is given as
LIMITATIONS OF
BINARY WEIGHTED RESISTORS

(1) As the resolution increases, the resistor value


increases.
(2) Difficult to fabricate on chip. For an 8 bit DAC
the largest resistor is 128 times the smallest one.
(3) The accuracy is low, since depends on resistor
values.
If VR ia – ve, we get +ve stepped voltage as shown.
Ladder Type Voltage-Switched R-2R DAC
voltage scaling is used
-VR

Only TWO values of resistors

LSB MSB
0 0 0 1
Fig.11.8 Four Bit R/2R Ladder D/A Converter Let b1b2b3b4 1000

Only TWO values of resistors are required. Identical resistors


and voltage scaling is used unlike binary weighed DAC binary
weighed currents are used.
R-2R LADDER TYPE D/A CONVERTER.
0 0 0 1

║el
(R+R) ║ 2R

+
V0 = -VR/2
= VR/2

Equiv. Of 3rd stage.


V0 = -VR/2
For b1,b2,b3,b4 = 1000, output Vo = VR/2
0100, VR/4, 0010, VR/8, 0001, VR/16
For n bit DAC
In the previous example when the binary no. is 1000, V0 = -VR/2,
if RF=R, & n=4

V0 = VR/2
Ladder Type Voltage-Switched R-2R DAC
voltage scaling is used
-VR

Only TWO values of resistors

-VR/2 R

LSB MSB
0 0 0 1
Fig.11.8 Four Bit R/2R Ladder D/A Converter Let b1b2b3b4 1000

Vo = (-Rf/R) (-VR/2) If Rf = R, Vo = (VR/2)


VR/20 VR/21 VR/22 VR/2n

Inverted or Current Mode R-2R Ladder D/A Converter.

MSB & LSB are interchanged.


Since both the positions of switches are at ground
potential, the current flowing through resistances is
constant and it is independent of switch position. These
currents can be given as
When Rf = R, Vo is given as
R-2R LADDER TYPE DAC

• Uses only two values of resistors


• Overcomes the limitations of Binary
weighted DAC
• OPAMP is connected in inverting mode
• Each digital input is applied through R-2R
network and Vref
Sources of Errors in DAC
• Linearity Error
• The error is defined as the amount by which the actual
output differs from the ideal straight-line output.
• Fig. 8.19 shows the linearity error in the transfer
characteristics of DAC. It is mainly due to the errors
in the current source resistor values.

Fig. 8.19 Linearity error in transfer


characteristics of DAC
Offset Error
• The offset error is defined as the
nonzero level of the output voltage
when all inputs are zero.
• It adds a constant value to all output
values, as shown in Fig. 8.20.
• It is due to the presence of
offset voltage in op-amp and leakage
currents in the current switches.
Fig. 8.20 Offset error in transfer
characteristics of DAC
Gain Error
It is defined as the difference between the
calculated gain of the current to voltage
converter and the actual gain achieved. It is
due to the errors in the feedback resistor on
the current to voltage converter op-amp.

Fig. 8.21 Gain error in


transfercharacteristics of DAC.
Quantization Error

This is Caused in ADC.For a given binary


output, the exact analog input is uncertain.
This is because the binary output increases
linearly in steps.
IC 1408 D/A Converter
(DAC0800, DAC0808 are exact pin to pin equivalents.)

The 1408 is an 8 bit R/2R ladder type D/A converter


compatible with TTL and CMOS logic. It is designed to use
where the output current is linear product of an eight bit
digital word.
The IC 1408 consists of a reference current amplifier, an R/2R
ladder and eight high speed current switches. It has eight input
data lines A1 (MSB) through A8 (LSB).
It requires 2 mA reference current for full scale input and two
power supplies Vcc = + 5 V and VEE = - 15 V (VEE can range
from 5 V to - 15 V). The voltage Vref and resistor R14
determines the total reference current source and R15 is
generally equal to R14 to match the input impedance of the
reference current amplifier.
Important Electrical Characteristics for IC 1408
Reference current : 2 mA
Supply voltage : + 5 Vcc and - 15 V VEE
Setting time : 300 ns
Full scale output current : 1.992 mA
Accuracy : 0.19 %

When input = 11111111, Io is given by

V0= 1.992mA x 5KΩ=9.961V


Unipolar

Note : The arrow on the pin 4 shows


INPUT OUTPUT
the output current direction. It is
inward. This means that IC 1408 sinks (0000 0000) 2 0
current. At (0000 0000) 2 binary input FFH (11111111)2, = 1.992mA x
it sinks zero current and at (11111111)2 5KΩ=9.961V
binary input it sinks 1.992 mA.
This circuit can be modified to give
bipolar output.
Bipolar
Condition 1 : For binary input (00H)
When binary input is 00H, the output current Io at pin 4 is zero. Due to this
current flowing through RB (1 mA) flows through Rf giving Vo = - 5 V.
Condition 2 : For binary input 80H (10000000)
When binary input is 80H, the output current Io at pin 4 is 1 mA. By
applying KCL at node A we get,
-IB+I0 +If = 0. Substituting values of IB and Io we get,
-(1 mA) + (1 mA) + If = 0: If = 0 and therefore Vo = 0V.
Condition 3 : For binary input FFH (11111111)
When binary input is FFH, the output current I0 at pin 4 is 2 mA. By
applying KCL at node A we get,
-IB+Io+If = 0
substituting values of IB and Io we get,
- (1 mA) + (2 mA) + If = 0
If = - 1 mA
Therefore, Vo = + 5 V.
In this way, circuit shown in the Fig. 9.26 gives output in the bipolar range.
Example: For above bi-polar circuit, calculate the
output voltage, V0 for digital input word of
1. 00000000
2. 01111111
3. 10000000
4. 11111111

Current for 1 LSB is 8µA. IFS = 8µAx255=2.04mA.


For 00000000 input, I0 = 8µA x 0 = 0
I0 =2.040mA-0=2.04mA.
V0= (0-2.04mA)(5KΩ) = -10.20V
ADC’s

• Converts analog signal into digital data


• Used in Data acquisition systems & Digital
instruments etc

Conversion
TYPES OF ADC

1. Successive approximation ADC


2. Parallel converter or Flash type ADC
3. Ramp Converter.
4. Dual Slope Converter.
Fig. 8.26 Analog input Vs Digital output
Resolution
Fig. 8.26 shows eight (23) discrete output states from 000 to 111, each step being 1/8 V
apart. Therefore, we can say that expression of ADC resolution is
resolution = 1/2n (1) In the above case n=3
Resolution is also defined as the ratio of a change in value of input voltage, X, needed
to change the digital output by 1 LSB. If the full scale input voltage required to cause
a digital output of all l's is VIFS, then

Resolution = ViFS/2n (2)


If viFs is the maximum input voltage, which will cause all 1’s at the output.
ViFs = VFs -1LSB

Example:
For an input voltage of 0-10V, what is the resolution?
1LSB = 10V/28= 39.1mV
What is the input voltage that generates all 1’s at output?
10V-39.1mV = 9.961V.
What is the digital output for an input voltage of 4.8V?
D= 4.8/39.1 = 122.76 say 123.
The binary value is 01111011
Quantization Error
Fig. 8.26 shows that the binary output is 001 for all values
of Vi between 1/4 and ½ V. There is an unavoidable
uncertainty about the exact value of Vi when the output is
001.
This uncertainty is specified as quantization error. Its
value is  ½ LSB. It is given as,

QE = (3)

Increasing the number of bits results in a finer resolution


and a smaller quantization error.
Conversion Time
It is an important parameter for ADC. It is defined as the total
time required to convert an analog signal into its digital
output. It depends on the conversion technique used and the
propagation delay of circuit components.
SUCCESSIVE APPROXIMATION ADC

❖Widely used
❖Similar to Counter type ADC except that ,a SAR is used
❖SAR acts as programmable Up/Down counter
❖Completion of conversion , triggered by a change in the
state of the comparator
❖Much faster than the counter type
SUCCESSIVE APPROXIMATION ADC
Implements Binary search algorithm
• Initially, DAC input set to midscale (MSB =1)
• VIN > VDAC , MSB remains 1. Next bit is set to 1
• VIN < VDAC , MSB set to 0. Next bit is set to 1
•MSB’s remain same after each conversion and next 3
bits are processed. Then next 2 bits, first 2 remaining
Typical
same etc. accuracy levels of 8 to 12 bits .

• Algorithm is repeated until LSB.


DAC [input] = ADC [output]
N cycles required for N-bit Conversion.
3 4 Upper arrow 1

2
Lower arrow 0
Vin> 11

1 Next bit is
always changed
to ‘1’

2nd Bit 3rd Bit 4th Bit


First Bit

Vin<01

1. Start conversion pulse will set all zeros in SAR.


2. MSB is set to 1 and others remaining 0’s (1/2 the input voltage). DAC output is compared with unknown
voltage. (1000)
3. If unknown voltage is higher, the bit under comparison is retained 1 and the next bit is made 1.
4. If unknown voltage is less, the bit under comparison is made 0 and the next bit is made 1.
5. MSB’s remain same after each conversion and next 3 bits are processed. Then next 2 bits, first 2 remaining
same etc.
6. Then comparison moves to next bit and process continues till last bit.
For 8 bit Successive Approximation, only 8 cycles are
required irrespective of the amplitude of analog
input voltage.

Ex: For 8 bit SA, A/D, if 2MHz clock is used,


what is the conversion time?
Ans: 1/2MHz = 0.5µs.
Total time required for conversion = Time
required for resetting SAR + Conversion time
i.e. (8+1) 9 clock cycles = 9x0.5µs = 4.5µs
Ramp or Single Slope Integrating ADC
• Slow but accurate
• Doesn't use a DAC. Single slope integrating ADC:
• Feed the input signal into an integrator

Vinteg ≈ Vin

Vinteg

integrator comparator

• Connect the comparator output to a counter through


a gate which counts the number of clock cycles needed
to reach Vref
• Reset the clock, discharge the capacitor and repeat.
When the ramp generator is first turned on,
several things happen.
1. The gate is turned on from it’s
previously off state.
2. Clock pulses from the clock generator
are allowed through the gate to the
counter.
3. The counter then starts to count each
clock pulse as it arrives.
During the time the ramp voltage is
rising there is a relatively stable state in
the circuit.
4. Once the ramp voltage reaches the
value of Vin, the gate to turn off. In
doing so the gate prevents any further
clock pulses from reaching the counter.

The major disadvantage of this system


1. Very stable clock signal is required.
2. Noise in the signal causes errors.
3. Input Filters are required.
4. Stability is poor.
Once the ramp voltage reaches the value of Vin, the gate to turn
off. In doing so the gate prevents any further clock pulses
AND from reaching the counter.

When Vin = Vramp


gate is closed and
counting stops.

Single Slope Integration ADC


Fig. 8.28.
The main limitations of this circuit are:

i) Its resolution is less. Hence for applications which require


resolution of 9 part in 20,000 or more, this ADC is not
stable.

ii) Variations in ramp generator due to time,


temperature or input voltage sensitivity also cause a lot
of problems.
• Big problem with single slope integration is calibration drift
• The counting rate of the counter and the voltage slope of
the integrator must always match each other exactly.
• This puts a severe requirement on the stability and
accuracy of the integrator (and also the comparator).
Dual Slope Integrating ADC

T1

1. A "cycle clock" generates a pulse of fixed length T1 during which the


input voltage is allowed to charge the integrator.
1. After T1 integrator discharges through a reference voltage of opposite polarity.
2. When the integrator voltage returns to zero, comparator flips and disables
NAND gate.
3. Counter stops counting and is read out is displayed.
0
1

MSB Controls the Analog Switch.


MSB = 0 vin is connected.
MSB = 1 Vref is connected.
Dual Slope ADC Voltage to Time Period Conversion
Dual slope conversion is an indirect method for A/D conversion where
An analog voltage and a reference voltages are
• Converted into time periods by an integrator,
• Measured by a counter.
• The speed of this conversion is slow but the accuracy is high.
Fig. 8.29 shows a typical dual slope converter circuit. It consists of integrator (ramp
generator), comparator, binary counter, output latch and reference voltage.
The ramp generator input is switched between the analog input voltage Vi and a
negative reference voltage, -VREF. The analog switch is controlled by the MSB of the
counter.
When the MSB is a logic 0, Vi is connected to the ramp generator input.
When MSB is logic 1, the negative reference voltage is connected to the ramp generator.

MSB=0

MSB=1

Fig. 8.29 Dual slope A/D converter

Fig. 8.30 Integrator output voltage


t1 t2
MSB=0, Vin MSB=1, Vref

• Ramp-up time is fixed at T1

t2 is directly proportional to Vin (Counter Counts &


Count=Vin) as t1 and VR are constant and independent of clock
frequency. The device is self- calibrating.
The counter output can then be connected to an appropriate digital
display.
The advantages of dual slope ADC are
•It is highly accurate.
•Its cost is low.
•It is immune to temperature caused variations in R, and C1.
The only disadvantage of this ADC is its speed which is low.
PARALLEL COMPERATOR
FLASH ADC

• For n-bit digital word, 2n-1 comparators are required


• The analog sample is simultaneously applied to one input
(non-inverting) of all the comparators
• Other input to the comparator is a DC voltage derived from
the potential divider.
Flash ADC

• Conceptually simple
• Consists of just a multistage voltage divider and a
chain of comparators
• Fully parallel, and therefore very fast.
• Example: n= 2 bits, gives 4 possible states,
representing 4 separate voltage intervals.
Vin
• Analog input will fall into one of these intervals - we
encode this assignment using the 2 bits
• Defining the boundaries of 2n intervals requires 2n-1
comparators, with the threshold of each comparator
set to the appropriate boundary voltage.
=12V

FIG.1
=9V

=6V
= V/2

=3V
FIG.2
A/D Conversion Specifications
The time for one analog to digital conversion must
depend on both the clock's period T and number
of bits n. It is given as,
Tc =T(n + 1)
Where Tc = conversion time
T=clock period
n=number of bits
Example -1 : An 8 bit successive approximation ADC is
driven by a 1 MHz clock. Find its conversion time.
Solution : f = 1 MHz; T=1/f = 1/106 = 1μSec. n=8
Tc = T(n+1) = 1(8+1) = 9 μSec.
Problem-2.
A 10-bit dual slope integrating A/D converter has a full-scale
input of 10V. If the clock period is 15 μS, how long will it take to
convert an input of 4V? How long for an input of 10V?

10 bits means 210 =1024 levels.

Full scale input of 10V means each level is 10V/1024=9.77mV

ANS: 10V will take 15μs1024=15.3ms


4V corresponds to 4/9.7710-3=409.6 levels - round up to 410

A clock period of 15μs mean 4V will take 15μs410 =6.15ms


Problem-3
What increase in speed can be gained by using a 12-bit successive
approximation converter instead of the dual slope converter, assuming a
full-scale input voltage.?
ANS:
A 12-bit SA converter will take 12 clock cycles 12x15 = 180 μs, regardless
of the input voltage.
So, for 10V full scale input, the speed increase is 15.36ms/180 μs =85.3
times.
So the SA converter is both faster and more accurate (12 bits gives 4096
levels, compared to 1024 levels for 10 bit)
Dynamic Range:
Largest Value
Smallest Value
12 bit: 2V P/P Input. What is the Resolution and Dynamic Range?
212 = 4096.
Step Size = 2V/4096 = 488µV
Dynamic Range = 2V/488µV = 4096
In db. 20log104096 = 72db.
Dynamic Range ≈ 6db x Number of Bits.
In the above example, Dynamic Range = 6x12 = 72db.
Example – 4
An audio CD will use 16-bit representation of music signal.
Determine dynamic range. If the maximum output level is
0.775 V peak, determine the step size. Suppose if the signal
is bi-polar, determine the step size.
Dynamic Range = 6x16 = 96db.
Total no. of steps = 216 = 65536.
The total Signal range is -0.775 to + 0.775 or 1.55V.
Step Size = 1.555/65536 = 23.65µV.

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