Physics Ip 12
Physics Ip 12
INVESTIGATORY
PROJECT
2023-2024
Apoorv Singh
XII-A
Roll No.: 3
Sch. No.: 5536
INDEX
1. CERTIFICATE
2. ACKNOWLEDGEMENT
3. TOPIC
4. INTRODUCTION
5. IMPORTANT CONCEPTS BEHIND LOGIC GATES
BOOLEAN ALGEBRA
TRUTH TABLES
DE MORGAN’S THEOREMS
LOGIC SYMBOL DIAGRAMS
WAVEFORMS
6. TYPES OF LOGIC GATES
7. CONSTRUCTION OF LOGIC GATES (with model)
8. APPLICATIONS OF LOGIC GATES
9. CONCLUSION
10. BIBLIOGRAPHY
CERTIFICATE
This is to certify that Apoorv Singh of
class XII-A of Puranchandra
Vidyaniketan has conducted genuine
investigations and related data
collections with original paperwork, and
thusly has successfully completed the
investigatory project titled
‘‘Logic Gates’’ under the guidance of
Mr. Atul Malhotra (Physics teacher)
during the session 2023-2024 in partial
fulfilment of Physics Practical
Examination conducted by AISSCE.
Signature of Signature of
External Examiner Physics Teacher
ACKNOWLEDGEMENT
The successful completion of any project would be
incomplete without the acknowledgement of those who
made it possible. I take this opportunity to express my
gratitude and respect for all who helped me in the
completion of this project.
I would like to dearly acknowledge our subject teacher,
Mr. Atul Malhotra, for his valuable support, constant
guidance and ceaseless encouragement, without which,
this project would not have come to fruition.
I also cannot fail to mention the immense regard I hold
for our principal, Mrs. Sobhana Mukherjee, for creating
the ideal nurturing environment that fuelled the
progress of this project. I would also like to thank the
lab assistant and the non-teaching staff for their
constant support.
Lastly yet importantly, I would extend my vote of
thanks to my parents, friends and classmates whose
encouragement helped me with smooth execution of
the investigatory project.
LOGIC
GATES
Introduction:
Logic gates are crucial components in the realm of digital electronics,
serving as fundamental building blocks for the creation of complex
circuits and systems. These gates operate based on the principles of
Boolean algebra, a binary mathematical framework based on 0 and 1.
These gates manipulate binary signals, where ‘0’ typically represents a
low voltage or false input, and ‘1’ represents a high voltage or true input.
2) Associative Laws:
(i) (A . B) . C = A . (B . C)
(ii) (A + B) + C = A + (B + C)
(where A and B could be 1 or 0)
3) Distributive Laws:
(i) A . (B + C) = (A . B) + (A . C)
(ii) A + (B . C) = (A + B) . (A + C)
(where A and B could be 1 or 0)
4) AND Laws:
These laws use the AND operation. Therefore, they are called AND laws.
(i) A .0 = 0
(ii) A .1 = A
(iii) A . A = A
(where A could be 1 or 0)
5) OR Laws:
These laws use the OR operation. Therefore they are called OR laws.
(i) A + 0 = A
(ii) A + 1 = 1
(iii) A + A= A
(iv) A + Ā = 1 *Concept of inversion: Ā = opposite value of A
(where A could be 1 or 0) i.e. if A = 1, then Ā = 0 and vice versa
A B (A+B)
1 1 1
0 0 0
0 1 1
1 0 1
Types of Logic Gates:
There are several basic logic gates used in performing operations in digital
systems. The common ones are:
(i) OR Gate
(ii) AND Gate
(iii) NOT Gate
Additionally, these gates can also be found in a combination of one or two. Therefore,
we get other gates:
i) OR Gate
In an OR gate, the output of an OR gate attains state 1 if one or more
inputs attain state 1.
The Boolean expression of the OR gate is Y = A + B, read as Y equals A
‘OR’ B.
The truth table of a two-input OR basic gate is given as:
Inputs Output
A B (A+B)
0 0 0
0 1 1
1 0 1
1 1 1
ii) AND Gate
In an AND gate, the output of an AND gate attains state 1 if and only if
all the inputs are in state 1.
The Boolean expression of the AND gate is Y = A . B
The truth table of a two-input AND basic gate is given as:
Inputs Output
A B (A.B)
0 0 0
0 1 0
1 0 0
1 1 1
Input Output
A Ā
0 1
1 0
*When connected in various combinations, the three gates (OR, AND and NOT) give us
basic logic gates, such as NAND and NOR gates, which are the universal building blocks
of digital circuits.
iv) NAND Gate
This basic logic gate is the combination of NOT and AND gates.
The Boolean expression of the NAND gate is Y =
The truth table of a NAND gate is given as:
Inputs Output
A B
0 0 1
0 1 1
1 0 1
1 1 0
v) NOR Gate
This gate is the combination of NOT and OR gates.
The Boolean expression of the NOR gate is Y =
The truth table of a NOR gate is as follows:
Inputs Output
A B
0 0 1
0 1 0
1 0 0
1 1 0
2. Second theorem:
“The complement of a product is equal to the sum of the complements.”
i.e., If A and B are inputs then =
Steps:
1. Position the thermocol on a stable surface. It provides a platform for
connecting and arranging the logic gates.
2. Insert the desired logic gates into the thermocol. Depending on the
logic gate function, add input sources such as switches, buttons, or
other logic gates to control the input values.
3. Connect the output of the logic gates to LEDs or resistors. This step
provides a visual representation of the output states.
4. Connect the power supply to the circuit. Now, turn on the power
supply. The logic gates should receive power, and the circuit is ready for
operation.
Example Circuit:
CONCLUSION: