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Experiment 3

The document describes an experiment on digital electronics. It aims to reduce Boolean expressions to their simplest form using logic gates. It also presents a problem to design a circuit for an insurance policy eligibility check based on conditions on applicant attributes. The procedure involves testing ICs, making truth tables, reducing functions, implementing circuits, applying inputs, and verifying output.

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mgthakkar
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29 views

Experiment 3

The document describes an experiment on digital electronics. It aims to reduce Boolean expressions to their simplest form using logic gates. It also presents a problem to design a circuit for an insurance policy eligibility check based on conditions on applicant attributes. The procedure involves testing ICs, making truth tables, reducing functions, implementing circuits, applying inputs, and verifying output.

Uploaded by

mgthakkar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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MADHUBEN & BHANUBHAI PATEL WOMEN'S INSTITUTE OF ENGINEERING,

NEW VALLABH VIDYANAGAR-388 121, DIST. ANAND, GUJARAT.

ELECTRONICS & COMMUNICATION ENGG. DEPT.

Experiment No: 3

Aim:
(a) Reduce the given Boolean Expressions to its simplest possible form and implement them
using minimum number logic gates.
(1) [(ABC + A’B’)’ + BC]’
(2) A[B + C’ (AB +AC’)’]

(b) Design a circuit for the given problem and implement it using logic gates.
Statement:
You are presented with a set of requirements under which an insurance policy can be issued.
The applicant must be:
1. A married female 25 years old or above. Or
2. If female under 25, or
3. A married male under 25 who has not been involved in car accident, or
4. A married male who has been involved in car accident, or
5. A married male 25 years or above whom has not been involved in car accident.

Let the variable A, B, C & D assume the truth-value in the following cases.
A=1, if the applicant has been involved in the car accident.
B=1, if the applicant is married.
C=1, if applicant is male.
D=1, if applicant is under 25.
Find an expression, which assumes a value 1 whenever the policy is issued.

Apparatus: Digital ICs (7400, 7402, 7404, 7408, 7432, 7486), Bread Board, Connecting wires

Theory:

Procedure:
1. Test IC’s you are going to use in this practical using Digital IC tester.
2. Make a truth table for the Boolean expressions given in part (a) as well as for the statement
given in part (b).
3. Reduce the function using Boolean algebra.
4. Implement the reduced logic function using various logic gates on a breadboard.
5. Apply different logic conditions at the inputs of logic gates by applying +5V as logic 1 and
GND as logic 0 using toggle switch terminal on the breadboard.
6. Observe the output of logic gate for each input combination using LED terminal on the
Bread board and verify the truth table of the original expression for implemented circuit.

Conclusion:

LAB MANNUAL- DIGITAL ELECTRONICS SUBJECT CODE-2131004


MADHUBEN & BHANUBHAI PATEL WOMEN'S INSTITUTE OF ENGINEERING,
NEW VALLABH VIDYANAGAR-388 121, DIST. ANAND, GUJARAT.

ELECTRONICS & COMMUNICATION ENGG. DEPT.

LAB MANNUAL- DIGITAL ELECTRONICS SUBJECT CODE-2131004


MADHUBEN & BHANUBHAI PATEL WOMEN'S INSTITUTE OF ENGINEERING,
NEW VALLABH VIDYANAGAR-388 121, DIST. ANAND, GUJARAT.

ELECTRONICS & COMMUNICATION ENGG. DEPT.

Part (b)
Problem Analysis:
For 1, Candidate is married so B, female so C’ and 25 years old or above so D’. Thus the
condition 1 implies the term BC’D’.

For 2, Candidate is female so C’ and under 25 so D. Thus the condition 2 implies the term C’D.

For 3, Candidate is married so B, male so C, under 25 so D and not involved in car accident so
A’. Thus the condition implies the term A’BCD

For 4, Candidate is married so B, male so C, involved in car accident so D. Thus the condition
implies the term BCD.

For 5, Candidate is married so B, male so C, 25 years and above so D’ and involved in car
accident so A’. Thus the condition implies the term A’BCD’. Any of the condition is satisfied
than the policy is issued. So all the terms will be ORed. And Finally the Expression will be:

F = BC’D’ + C’D + A’BCD + BCD + A’BCD’. Reduce the expression and implement the
circuit.

LAB MANNUAL- DIGITAL ELECTRONICS SUBJECT CODE-2131004

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