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Invoking Clocking Wizard

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37 views1 page

Invoking Clocking Wizard

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Thiện Khiêm
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Clocking Wizard

Clocking Wizard
To simplify applications using DCMs, the Xilinx ISE development software includes a
software wizard that provides step-by-step instructions for configuring a DCM. As shown
in Figure 3-7, Clocking Wizard generates a vendor-specific logic synthesis file instantiating
the DCM in either VHDL or Verilog syntax. Similarly, Clocking Wizard generates a user
constraints file (UCF) for the specific implementation. Finally, all the user specifications are
saved in a Xilinx Architecture Wizard (XAW) settings file.

Clocking Wizard
Graphically configure a
Spartan-3 Digital Clock
Manager (DCM)

Xilinx Architecture
Vendor-specific Wizard (XAW)
VHDL or Verilog settings file

User contraints
file (UCF)
UG331_c3_28_022407

Figure 3-7: Clocking Wizard Provides a Graphical Interface for Configuring Digital
Clock Managers

Invoking Clocking Wizard


There are multiple methods to invoke Clocking Wizard, either from the Windows Start
button or from within the Xilinx ISE Project Navigator software.

From Windows Start Button


To invoke Clocking Wizard from the Windows Start button, click Start  Programs 
Xilinx ISE  Accessories  Architecture Wizard. The setup window shown in Figure 3-8
appears.
• Specify the name of the Xilinx Architecture Wizard (.xaw) file that holds the option
settings for this DCM.
• Optionally, click Browse and select a directory location for the *.xaw file.
• Select the logic synthesis language for the output file, either VHDL or Verilog.
• Choose the targeted logic synthesis tool. Clocking Wizard creates vendor-specific
output for the specified synthesis tool.
• Select the targeted Spartan-3 generation FPGA.

Spartan-3 Generation FPGA User Guide www.xilinx.com 93


UG331 (v1.8) June 13, 2011

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