Bee CHPT5 1

Chapter 2 : Bipolar Junction Transistor
Transistors are three terminal active electronic components made of

semiconducting materials, which can amplify the electric signals by the application
of a small input signal.
Types of transistors: 1. Unipolar Junction Transistors
2. Bipolar Junction Transistors
1.Types of BJT
2.Working of NPN transistor
VEE VCC
1. In NPN transistor, Emitter base junction is forward biased. Collector base

junction is reverse biased.
2. Due to negative terminal of the battery, electrons will flow from emitter to base.
This movement of electrons gives current IE.
3. In base region, electrons and holes will recombine which gives current IB.
4. The remaining electrons will enter collector region and gets attracted towards
the positive terminal of battery VCC. The movement of electrons in the collector
region gives current IC.
5. Standard equation is
IE= IB + IC
Configurations in BJT
1. Common base (CB) configuration
2. Common emitter (CE) configuration
3. Common collector (CC) configuration
1. Common base configuration :

Input current = IE
Output current = IC
Current gain = Output current / Input current
α = Ic/IE
2. Common Emitter configuration :

Input current = IB
Output current = IC
Current gain = Output current / Input current
β = IC/IB
3. Common Collector configuration:
4. Input current = IB
5. Output current = IE
6. Current gain = Output current / Input current
7.
Ɣ = IE/IB
Derive relation between α and β
1. Common Base configuration

Circuit diagram
Input characteristics of CB configuration:

Input characteristics is the graph of input voltage (VBE) and input current (IE) by
keeping output voltage (VCB) constant.
IE
1. Till knee voltage, value of Emitter current (IE) is zero. Knee voltage is
approximately 0.5V.
2. After knee voltage, emitter current increases rapidly.
3. As reverse bias voltage (VCB) increases, current IE increases rapidly.
4. The value of input ac /dynamic resistance is
Output characteristics of CB configuration:

Output characteristics is the graph of output voltage (VCB) and output current (IC) by
keeping input current (IE) constant.
Output characteristics is divided into three regions:
1. Saturation region:
E-B junction and C-B junction both are forward biased.
As VCB increases, current IC increases.
2. Active region:
E-B junction is forward biased and C-B junction reverse biased.
Current IC is constant, and it depends on current IE
3. Cut-off region:
E-B junction and C-B junction both are reverse biased.
Current IE=0 mA but IC is not zero.
Very small amount of current will flow through transistor due to minority
charge carriers. This current is called as Reverse saturation current given by
ICBO or ICO.
Common Emitter Configuration:
Circuit diagram
Input characteristics
It is the graph of input voltage (VBE) and input current (IB) by keeping output
voltage (VCE) constant.
1. Till knee voltage, value of base current (IE) is zero. Knee voltage is
approximately 0.5V.
2. After knee voltage, base current increases rapidly.
3. As reverse bias voltage (VCE) increases, current IB increases rapidly.
4. The value of input ac /dynamic resistance is
Output characteristics
It is the graph of output voltage (VCE) and output current (IC) by keeping input
current (IB) constant.
Output characteristics is divided into three regions:

4. Saturation region:
E-B junction and C-B junction both are forward biased.
As VCE increases, current IC increases. Transistor remain in saturation till 1V.
5. Active region:
E-B junction is forward biased and C-B junction reverse biased.
Current IC is constant, and it depends on current IB.
IC= β IB
6. Cut-off region:
E-B junction and C-B junction both are reverse biased.
Current IB =0 mA but IC is not zero.
Very small amount of current will flow through transistor due to minority
charge carriers. This current is called as Reverse saturation current given by
ICEO.
Formulas for numerical
1. IC = α IE + ICBO (For CB configuration)

2. IC = β IB + ICEO (For CE configuration)
3. IC = β IB + (1+ β) ICBO (For CE configuration)
4. IE = IB + IC
5. α = Ic/IE
6. β = IC/IB
7.
Explain the concept of DC load line and operating point.

DC load line:
1. The straight line drawn on the characteristics of a BJT amplifier which give
the DC values of collector current (IC) and collector to emitter voltage (VCE ) .
corresponding to zero signal i.e. DC conditions is called DC load line.
2. To plot IC(MAX) , VCE(MAX) on output characteristics:
Get VCE(MAX) by putting Ic = 0
VCE = VCC – Ic Rc
VCE (MAX) = VCC since Ic = 0
Get IC(MAX) by putting VCE = 0
IC(MAX) = VCC/RC
Operating point or Q- point: The fixed levels of certain currents and voltages in a
transistor in active region defines the operating point on the DC load line. For
normal operation of the transistor, the Q- point is to be selected at the center of
the load line.
Stabilization
Need of stabilization
1. Stabilization is process of keeping Q-point stable at the centre of load line.
2. Stabilization is necessary to maintain Q-point because it will change its
position on the load line due to temperature or device.
3. If the Q-point gets shifted towards saturation or cut off regions, then amplified
output waveform is distorted.
Stabilization: It is the ratio of change in collector current IC to change in reverse

leakage current ICO.
△𝐼𝐶
S=
△𝐼𝐶𝑂
Thermal Runaway
1. As temperature increases, reverse saturation current increases. Leakage
current doubles for every 100C increase in temperature.
2. As leakage current increases, collector current increases.
3. Due to increase in collector current, power dissipation at the C-B junction
increases which in turn increases temperature.
4. This process continues which will damage transistor.
Thermal runaway can be avoided using 1. Heat sink 2. Stabilization circuit
Heat sink:
It is an electronic device made up of thermal conducting material. It is usually
painted in Black.
It absorbs the heat generated by electronic components and dissipate the
unwanted heat in the atmosphere. It protect the device from over heating.
Types of Biasing circuits:

1. Fixed bias / Base bias
2. Fixed bias with emitter feedback
3. Voltage divider biasing
Fixed Bias
Apply Kirchoff’s Voltage Law (KVL) at the input:
VCC – IB. RB – VBE =0
IB. RB = VCC – VBE
IB = VCC / RB (Value of VBE = 0.7V hence can be neglected
Since the value of VCC and RB both are fixed, this biasing is called as Fixed
bias
IC = β IB
ICQ = β. VCC / RB
Apply Kirchoff’s Voltage Law (KVL) at the output:

VCC - IC. RC - VCE =0
VCE = VCC – IC.RC
VCEQ= VCC – IC.RC
Fixed Bias with Emitter feedback
Apply KVL at the input

VCC – IBRB – VBE – IERE = 0
VCC – IBRB – VBE – ( 1+ β) IB . RE = 0
VCC – VBE = IBRB + ( 1+ β) IB . RE
IB = VCC – VBE / RB + ( 1+ β) . RE
IC = β. IB
IC = β . VCC – VBE / RB + ( 1+ β) . RE
ICQ = β . VCC – VBE / RB + ( 1+ β) . RE

VCC - IC. RC - VCE - IERE =0
VCE = VCC – IC.RC - IERE (As IE ≈ IC )
VCEQ = Vcc - IC (RC + RE )
Voltage divider biasing
Applying KVL at the input

VB – VBE – IERE = 0
IERE = VB – VBE
IERE = VB (value of VBE is small hence can be neglected)
IC = VB / RE (As IE ≈ IC )
ICQ = VB / RE

VCC - IC. RC - VCE - IERE =0
VCE = VCC – IC.RC - IERE (As IE ≈ IC )
Compare CB, CE, CC

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Chapter 2 : Bipolar Junction Transistor

Transistors are three terminal active electronic components made of

2.Working of NPN transistor

1. In NPN transistor, Emitter base junction is forward biased. Collector base

1. Common base (CB) configuration

2. Common emitter (CE) configuration

3. Common collector (CC) configuration

1. Common base configuration :

2. Common Emitter configuration :

1. Common Base configuration

Input characteristics of CB configuration:

Output characteristics of CB configuration:

Output characteristics is divided into three regions:

1. IC = α IE + ICBO (For CB configuration)

Explain the concept of DC load line and operating point.

Stabilization: It is the ratio of change in collector current IC to change in reverse

Thermal runaway can be avoided using 1. Heat sink 2. Stabilization circuit

Types of Biasing circuits:

Apply Kirchoff’s Voltage Law (KVL) at the output:

VCEQ= VCC – IC.RC

Fixed Bias with Emitter feedback

Apply KVL at the input

ICQ = β . VCC – VBE / RB + ( 1+ β) . RE

Apply Kirchoff’s Voltage Law (KVL) at the output:

VCEQ = Vcc - IC (RC + RE )

Voltage divider biasing

Applying KVL at the input

Apply Kirchoff’s Voltage Law (KVL) at the output:

VCEQ = Vcc - IC (RC + RE )

Compare CB, CE, CC

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