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L-5 Memory Config

This document discusses memory configuration for the 8085 microprocessor. It describes the purpose of memory, types of memory including ROM and RAM, and how the 8085 memory map is organized into pages and addressed. It provides examples of connecting memory chips to the 8085 and using address lines and ALE pin for memory interfacing.

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muhamed.abdelhamid16
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17 views8 pages

L-5 Memory Config

This document discusses memory configuration for the 8085 microprocessor. It describes the purpose of memory, types of memory including ROM and RAM, and how the 8085 memory map is organized into pages and addressed. It provides examples of connecting memory chips to the 8085 and using address lines and ALE pin for memory interfacing.

Uploaded by

muhamed.abdelhamid16
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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L-5

8085 Memory Configuration

1 Memory purpose

It stores information such as instructions and


data in binary format (0 and 1). Moreover, It
provides this information to the microprocessor
whenever it is needed.

Usually, there is a memory “sub-system” in a


microprocessor-based system. This sub-system
includes:

1–The registers inside the microprocessor

2– Read Only Memory (ROM) is used to store


information that does not change.

3–Random Access Memory (RAM) (also known


as Read/Write Memory.

It is used to store information supplied by the


user. Such as programs and data. The ROM and
RAM chips its not included in the internal
Microprocessor chip. There are connected to the
Microprocessor externally via the address, data
buses and the control lines.
2 Memory Map Organization

The external memory size of the 8085


Microprocessor is determined by the address
lines (size of the address bus).

In case of the 8 bit Microprocessor 8085, the


address bus contains 16 lines. It means the
address word is represented by 16 bits. The
microprocessor chip can access an external
memory of maximum size of 216 locations or
cells.

The size of each cell depends on the memory


type 8 bits or 16 bits.

The structure of the whole space of 8085


memory can be organized into number of blocks.
Each block is called Page.

The total memory space from 00000000 to FFFF


(in Hex formats) is arranged into number of
pages starting from 00000000 to FFFF.

The following table indicates the address range


of each page for examples. Any programmer can
design the memory map according the designed
applications. Fig.1 explains the memory
connection to 8085 Microprocessor.
Fig.1 The memory connection to 8085
Microprocessor.

The manuals attached to the Microprocessor


explains how the memory map can be
configured. It differs from one type to another.

3 Memory Map and Addresses

The memory map can represent the address range


and shows where the different memory chips are
located within the address range as explained in
the followings.

• 0000-4400 EPROM Address Range of


EPROM Chip
• 4400- 6000 RAM 1 Address Range of 1st
RAM Chip
• 6000-8FFF RAM 2 Address Range of 2nd
RAM Chip
• 9000-A200 RAM 3 Address Range of 3rd
RAM Chip
• A3FF-F7FF Address Range of 4th RAM Chip
…..

• F7FF FFFF Reserved for other applications


The memory chip sizes are normally expressed in
number of Kilo bytes. The data word of each
memory cell can be expressed in 8 bits or 16 bits.
Other data books can name the memory data size
in single word of one byte or two bytes but the
address bus or pins is different from one type to
another according the manufacturer.

• Examples:

Fig.2 presents how the 8085 Microprocessor is


connected to a memory chip of 1 k Byte chip
memory of 8 bits data word and size of 1k =1024
cells ie 210 cells.

2- It is noticed that the required address lines is


10 lines. i.e the address lines 𝐴0 -𝐴9 are selected
and the address lines 𝐴10 − 𝐴15 are used to chip
selection.
Fig.2 Interface circuits of Microprocessor and
external memory chip

Fig.2 Specified µP interface with multiple types


of memories
Address Latch Enable (ALE) :

• It occurs during the first clock cycle of a


machine state and enables the address to get
latched into the on-chip latch of peripherals.

The falling edge of ALE is set to guarantee setup


and hold times for the address information. ALE
can also be used to strobe the status information.
ALE is never 3stated. Fig. 2 explains the µP
interface with multiple types of memories.

It is apparent that the address lines includes 13


lines. Then, the address word is of 13 bits. 213 x8
bits. =8k bytes.
Exercise-5

1-Explain the operation function of the scheme in


Fig.1

2-Explain the operation function of the scheme in


Fig.2

3- What is the task of the ALE pinout.

4- A memory RAM of 1 k Byte microprocessor is


connected to the address bus pins of 8085A. How
many address line numbers are concerned?

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