MM - ASSIGNMENT-2

(ANSWERS)

1. What is RISC and CISC microcontroller?(4M)

RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction
Set Computer) are two different design philosophies for microcontrollers,
impacting their instruction sets and overall performance:

RISC Microcontrollers:
 Instruction Set:
o Smaller set of simple instructions, typically fixed-length.
o Each instruction performs a basic operation (load, store, arithmetic, etc.).
o Relies on multiple instructions to accomplish complex tasks.
 Processing:
o Faster execution of individual instructions (often one cycle per instruction).
o May require more instructions for complex tasks, potentially impacting
overall performance.
o Often leverages features like pipelining to improve efficiency.
 Benefits:
o Simpler design, potentially lower cost.
o Lower power consumption due to faster instruction execution and less
complex hardware.
o Well-suited for applications requiring real-time performance and energy
efficiency (e.g., battery-powered devices).
 Examples:
o ARM Cortex-M series
o Microchip PIC32
CISC Microcontrollers:
 Instruction Set:

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o Larger and more complex set of instructions.
o Instructions can vary in length and complexity.
o Some instructions can perform multiple operations in a single cycle,
potentially reducing code size.
 Processing:
o Instruction execution time can vary depending on complexity.
o Can be faster for certain tasks due to fewer instructions needed.
o May require more complex hardware for decoding instructions.
 Benefits:
o Can be simpler to program for some tasks due to fewer instructions
required.
o May be suitable for applications where code size is a critical factor.
 Examples:
o Intel MCS-51 series
o Microchip PIC16 series

2. Compare serial versus parallel data transfer.(4M)

Here's a comparison of serial and parallel data transfer methods:

Feature Serial Transmission Parallel Transmission

Data Flow One bit at a time Multiple bits at once
Number of Single line Multiple lines (usually 8)
Lines
Distance Longer distances Shorter distances
Speed Slower Faster
Complexity Simpler More complex
Cost Less expensive More expensive
Error Easier to detect More prone to errors
Detection
Applications Long-distance Internal data buses,
communication, USB, printers (older models)
networking

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 3. Draw and Explain the control signal generation in 8085
Microprocessor.(4M)
The 8085 microprocessor generates various control signals to coordinate
data transfer and operations with memory and peripherals. Here's a
breakdown of the control signal generation process:

Inputs:
 The 8085 microprocessor outputs three key signals that serve as inputs for
control signal generation:
o READ (RD'): Active LOW signal indicating a read operation from memory
or Input/Output (I/O).
o WRITE (WR'): Active LOW signal indicating a write operation to memory or
I/O.
o I/O or MEMORY (IO/M'): This signal determines whether the operation
involves memory (IO/M' = 1) or an I/O device (IO/M' = 0).

Decoder:
 A 3-to-8 decoder (like the 74LS138) is used to decode the three input
signals (RD', WR', IO/M') into eight output lines.
 Each output line of the decoder represents a specific control signal based
on the combination of the input signals.
Control Signals:
 The decoder's output lines are used to generate various control signals,
including:
o Memory Read (MEMRD'): Active LOW signal sent to memory during a
read operation from memory.
o Memory Write (MEMWR'): Active LOW signal sent to memory during a
write operation to memory.
o Input Read (INRD'): Active LOW signal sent to the I/O interface during a
read operation from an I/O device.

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o Input Write (INWR'): Active LOW signal sent to the I/O interface during a
write operation to an I/O device.
o ALE (Address Latch Enable): A positive-going pulse generated at the
beginning of a machine cycle to latch the lower order address onto the
address bus.
o S1 and S0 (Status signals): These two signals indicate the type of
operation being performed (fetch, read, write, etc.) and are used for
additional control purposes.
Explanation:
 The combination of RD', WR', and IO/M' signals determines which control
signal is activated.
 For instance, if RD' = 0, WR' = 1, and IO/M' = 1, then MEMWR' will be
activated, indicating a write operation to memory.
 Similarly, other combinations will activate the corresponding control signal
for the specific operation (read/write from memory or I/O).

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 4. What are the addressing modes for 8051? Explain in brief
giving suitable example.(7M)
The 8051 microcontroller offers various addressing modes to specify the
location of data operands in instructions. Here's a breakdown of the
common addressing modes:

1. Immediate Addressing (#):

o The data itself is included within the instruction.

o Example: MOV A, #35H (Move the immediate value 35H to the

accumulator A)
2. Register Addressing (Reg):
o The operand is located in one of the 8 general-purpose registers (R0 to

R7).
o Example: ADD A, R2 (Add the value in register R2 to the accumulator A)

3. Direct Addressing (Addr):

o The address of the data is directly specified within the instruction (limited to

128 bytes of internal RAM).

o Example: MOV P1, 20H (Move the value from memory location 20H to Port

1)
4. Indirect Addressing (@Reg):
o The address of the data is stored in a register pair.

o The 8051 supports two register pairs for indirect addressing:

 DPTR (Data Pointer): a 16-bit register used for external memory or data

tables.
 R0 & R1 combined: used for internal RAM data access.

o Example: MOV A, @R0 (Move the value from the memory location pointed

to by register R0 to the accumulator A)

5. Indexed Addressing (Reg + Addr):
o The operand's address is calculated by adding a constant value (limited to

255) to the contents of a register.

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o Primarily used with DPTR for accessing data tables or elements within
arrays stored in external memory.
o Example: MOV B, @A + 20H (Move the value from the memory location
20H bytes away from the address in register A to register B)

These addressing modes provide flexibility in specifying data locations and

enable efficient memory usage within 8051 programs.

5. Write an assembly program to load the PORT B register

with value 0×55, and complement PORT B 300 times.(4M)
Here's the 8051 assembly program to load PORT B with 0x55 and
complement it 300 times:

; Program to load PORT B with 0x55 and complement it 300 times

; Define loop counter (300 iterations)

MOV R7, #300H ; Load loop counter (high byte)
MOV A, #00H ; Load loop counter (low byte)

; Load initial value (0x55) to PORT B

MOV P1, #0FFH ; Set P1 as output (optional, assuming P1 is already
configured as output)
MOV P0, #0x55 ; Load 0x55 to PORT B

LOOP:
; Complement PORT B
CPL P0 ; Complement PORT B

; Decrement loop counter

DJNZ R7, LOOP ; Decrement R7, jump to LOOP if not zero

; End of program
SJMP $ ; Jump to the beginning (infinite loop)

; (Optional) Delay routine (replace with your preferred delay function)

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DELAY:
MOV R6, #250 ; Set delay value (adjust as needed)
DJNZ R6, DELAY ; Decrement R6, loop for delay

RET ; Return from delay routine

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