3.1.

Introduction:

Combinational logic circuits are not enough on their own to manipulate and deal with information
in digital systems, since some memory is needed to allow the circuits to remember past events and
process information. This feature is present in sequential circuits made of memory cells called flip-
flops/latches.
The main objective of this chapter is to learn to analyze and realize sequential circuits such as
registers and counters.
A sequential circuit is a circuit that generates its output by considering both the current input and
some of the past output values. This implies that sequential circuits are equipped with memory
components designed to remember binary data. This binary data determines the condition of the
sequential circuit at a given moment. So they can be considered as combinational circuits with a
memory element.

But remember, a sequential circuit might not always have a combinational circuit. Sometimes, it
only has the memory part. A latch or a flip-flop serves as a memory element capable of holding a
single bit of information.

Inputs Sequential circuits

Outputs
Some of the previous data become
inputs and participate in determining
the new output
Sequential circuits come in two main types:
1. Asynchronous Sequential Circuits:
Asynchronous sequential circuits work independently of clock signals, using pulses instead, not
the positive or negative edges of the clock. This means any input change can affect the circuit
state. In these circuits, the internal state changes whenever the input variable changes. They use
time-delayed or unclocked flip-flops as memory elements. These circuits are like combinational
circuits but include feedback. They are faster than synchronous circuits because they can respond
instantly. However, designing them can be tricky, and sometimes their behavior can be less
predictable.
2. Synchronous Sequential Circuits:
In synchronous sequential circuits, the clock signal synchronizes the state of memory elements.
The output is stored in latches (memory devices) or flip-flops. The output is synchronized with
either the positive edges or the negative edges of the clock. These circuits use a clock signal at
the input to coordinate their actions. They typically wait for the clock signal before performing
each operation, making them slightly slower. Synchronous circuits are often easier to design and
analyze compared to asynchronous ones and offer more predictability in terms of timing and
behavior due to their synchronized nature.
3.3. flip-flops

3.3.1. Introduction:
A flip-flop is a basic digital memory circuit used in sequential circuits to store one bit of
information. It is integral to most sequential circuits, serving as either bistable (2 states)
multivibrators or one-bit memories. Flip-flops change state during active clock pulses and preserve
their state when the clock pulse is inactive. Clocked flip-flops are utilized in synchronous
sequential circuits, while un-clocked flip-flops, known as latches, are employed in
asynchronous sequential circuits.
A latch is an electronic device used for immediate alteration of its output based on the applied
input. It functions to store either a value of 1 or 0 at any given time and typically consists of "SET"
and "RESET" inputs, along with complementary outputs.

The flip-flop is the basic element of sequential logic, it is essentially made up of:
 A certain number of inputs x1 and x2….
 One output or two complementary outputs (Q and 𝑄̅ )
o Q is the output variable of the flip-flop. It provides the state of the flip-flop. If it is
1, then the state of flip-flop is 1, else, the state is 0.
o 𝑄̅ is the complement of the output.
During this chapter, we will use the following notations:
 Q or Qt: the output state at time t (present or current state)
 Qt+1 or Q+: the output at time t+1 (future or next state of the flip-flop)

The state of the flip-flop can be modified by acting on one or more inputs. The new state of the
flip-flop depends on the previous state.
There are two types of flip-flop operations as we mentioned earlier: synchronous and
Asynchronous
 Asynchronous operation
This is an operating mode where the output changes its state based on the input quantities.
 Synchronous operation
This is an operating mode where the change of state is conditioned by an authorization given by
the clock signal. In this mode, authorization can be given in three different ways: on level, on
edge or by pulse.
In the next subsection, we present the different types of flip-flops. The name of each flip-flop
indicate the inputs. There exist four basic flip-flops:
 S-R flip-flop
 J-K flip-flop
 D flip-flop
 T flip-flop
3.3. Asynchronous flip-flops
If we notice the following simple circuit consisted of 2 NOT gates. If we assume that in between,
we have a 0, we get the following configuration:

We see how the 0 goes out as 1, and comes back to be 0 and so. This means the circuit is bi-stable
(has two states) where the states are complemented between 0 and 1 again and again. This circuit
is able to save 1 bit of information and can be re-configured as follows:

We consider the bit saved as Q, and its complement is Q’. However, we cannot modify in the
inputs, and the bit saved, but we can understand the idea of memorization through this NOT latch.
We need to modify in this circuit to be able to store a bit of information and change it when
required.
3.3.1 S-R latch
The SR latch is an asynchronous flip-flop. It has two inputs S (Set to 1) and R (Reset to 0), one of
them to set the output Q to 1 and the other to set the output Q to 0. The symbol for this flip-flop is
presented in the following figure. The S-R flip-flop can be made with NOR or NAND gates as
follows:
The choice of NOR or NAND, is because they have the NOT part to keep the bistable feature,
and has an extra input that will allow us to change the saved bit. A B NOR
Let us explore the functionality of the S-R latch using the NOR ̅̅̅̅̅̅̅̅
(𝐴 + 𝐵)
implementation. We need to assume values for R, S and Qt, since we are in a 0 0 1
sequential circuit configuration. 0 1 0
 Case S = 1, R = 0 (Qt = 0 or 1), and according to the diagram, we have 1 0 0
1 1 0
1 at the bottom NOR which includes Qt as an input as well. Any
1 that enters a NOR results in a 0 regardless of the other input:
̅̅̅̅̅̅̅̅
𝑆 + 𝑄𝑡 = ̅̅̅̅̅̅̅
1 + 0 = 0 = ̅̅̅̅̅̅
𝑄𝑡+1
̅̅̅̅̅̅
This 𝑄𝑡+1 goes as a second input to the top NOR along with R
=0
̅̅̅̅̅̅̅̅̅̅
𝑅 + 𝑄𝑡 ′ = ̅̅̅̅̅̅̅
0 + 0 = 1= 𝑄𝑡+1

To conclude: when R = 0 and S = 1, 𝑸𝒕+𝟏 = 𝟏 (𝒔𝒆𝒕 𝒕𝒐 𝟏), ̅̅̅̅̅̅

𝑸𝒕+𝟏 = 𝟎
 Case S = 0, R = 1 (Qt = 0 or 1), and according to the diagram:
Since R = 1, at the top NOR, the output will be 0 regardless of the
other input so 𝑄𝑡+1 = 0. This 0 will go as a second input to the
bottom NOR with S = 0, which will result in ̅̅̅̅̅̅
𝑄𝑡+1 = 1
̅̅̅̅̅̅̅̅̅̅
𝑅 + 𝑄𝑡 ′ = ̅̅̅̅̅̅̅
1 + 1 = 0= 𝑄𝑡+1
̅̅̅̅̅̅̅̅
𝑆 + 𝑄𝑡 = ̅̅̅̅̅̅̅
0 + 0 = 1 = ̅̅̅̅̅̅
𝑄𝑡+1

To conclude: when R = 1 and S = 0, 𝑸𝒕+𝟏 = 𝟎 (𝒓𝒆𝒔𝒆𝒕 𝒕𝒐 𝟎), ̅̅̅̅̅̅

𝑸𝒕+𝟏 = 𝟏

 Case S = R = 0 (Qt = 0), and according to the diagram:

̅̅̅̅̅̅̅̅
𝑆 + 𝑄𝑡 = ̅̅̅̅̅̅̅
0 + 0 = 1 ⇒ ̅̅̅̅̅̅
𝑄𝑡+1
̅̅̅̅̅̅̅̅̅̅
𝑅 + 𝑄𝑡 ′ = ̅̅̅̅̅̅̅
0 + 1 = 0 ⇒ 𝑄𝑡+1

Please keep in mind that ̅̅̅̅̅̅

𝑸𝒕+𝟏 will be used as 𝑸𝒕 ′ in the second
equation.
  Case S = R = 0 (Qt = 1), here the bottom NOR has a 1, so the output is automatically a 0,
̅̅̅̅̅̅
𝑄𝑡+1 = 0. This 0 along with R = 0 will give 𝑄𝑡+1 = 1
̅̅̅̅̅̅̅̅
𝑆 + 𝑄𝑡 = ̅̅̅̅̅̅̅
0 + 1 = 0 ⟹ ̅̅̅̅̅̅
𝑄𝑡+1
̅̅̅̅̅̅̅̅̅̅
𝑅 + 𝑄𝑡 ′ = ̅̅̅̅̅̅̅
0 + 0 = 1 ⟹ 𝑄𝑡+1

To conclude: when S = R = 0 >>> Qt = Qt+1, no change in states

during time. This is called memorization, or the flip-flop is in the
memory state.

 Case S = 1, R = 1 (Qt = 0), and according to the diagram:

̅̅̅̅̅̅̅̅
𝑆 + 𝑄𝑡 = ̅̅̅̅̅̅̅
1 + 0 = 𝟎 = ̅̅̅̅̅̅
𝑄𝑡+1
̅̅̅̅̅̅̅̅̅̅
𝑅 + 𝑄𝑡 ′ = ̅̅̅̅̅̅̅
1 + 0 = 𝟎= 𝑄𝑡+1

 Case S = 1, R = 1 (Qt = 1)
̅̅̅̅̅̅̅̅
𝑆 + 𝑄𝑡 = ̅̅̅̅̅̅̅
1 + 1 = 𝟎 ⇒ ̅̅̅̅̅̅
𝑄𝑡+1
̅̅̅̅̅̅̅̅̅̅
𝑅 + 𝑄𝑡 ′ = ̅̅̅̅̅̅̅
1 + 0 = 𝟎 ⇒ 𝑄𝑡+1
Notice how 𝑄𝑡+1 = ̅̅̅̅̅̅
𝑄𝑡+1 and this is not allowed.
The truth table or the characteristics table for the RS flip flop is as
follows:
Present inputs Present state Next state
R S Qt Qt+1
0 0 0 0 Qt+1 = Qt (no change)
0 0 1 1
0 1 0 1 Qt+1 = 1 (SET)
0 1 1 1
1 0 0 0 Qt+1 = 0 (RESET)
1 0 1 0
1 1 0 X Not allowed
1 1 1 X

A summarized version of this characteristics table is:

Rt St Qt Function
0 0 Qt Memory
0 1 1 Set to 1
1 0 0 Set to 0
1 1 - Not allowed

As noticed, this table is different from the ordinary truth tables since it has the notation of time.
According to this table, there are 3 operating modes:
 Mode Memory: R = S = 0, the output remains in the state it was in (0 or 1).
 Writing 1 or setting the output to 1: S = 1, R = 0
  Writing 0 or setting the output to 0: S = 0, R = 1
 The combination R = S =1 is not allowed, since we cannot set the output to 1 and 0 at the
same time.
Using this table also, we can determine the expression of the output Qt+1 using k-map as
follows:
k-map for 𝐶𝑖 𝑆 𝑄𝑡
00 01 11 10
𝑅 0 0 1 1 1
1 0 0 x x
𝑸𝒕+𝟏 = 𝑹 ̅ 𝑸𝒕 + 𝑺
This equation is called the characteristics equation.