Vlsi Design - Ec - 701 - Unit - 3

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NAME : PRASHANT CHATURVEDI

DESIGNATIUON : ASSISTANT PROFESSOR

DEPARTMENT : ELECTRONICS & COMMUNICATION

ENGINEERING

SUBJECT : VLSI DESIGN

SUBJECT CODE : EC-701

UNIT : 3

TOPICS : Structured Digital Circuits and Systems

Introduction, Circuit Simulation Using Spice,


MOSFET Model, Level 1 Large signal model,
Level 2 Large Signal Model, High Frequency
Model, Noise Model of MOSFET, Large signal
Diode Current, High Frequency BJT Model, BJT
Noise Model, Temperature Dependence of BJT.
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Circuit Simulation Using Spice
 SPICE utilizes a modified nodal analysis approach. It can be used for
nonlinear-dc, nonlinear-transient, and linear-ac analysisproblems.
 It also includes modules for more specialized analysis such as noise analysis,
temperature analysis, etc. The inputs can be constant or time varying
 For the nonlinear-dc and nonlinear-transient analyses, the program includes
the nonlinear effects of all devices specified by the user.
 For the ac analysis, the dc operating point is internally determined. From the
dc operating point, the small signal equivalent circuit of each device is
obtained.
 The resulting linear network is analyzed using the appropriate matrix
manipulations The small signal analysis includes no nonlinear effects of the
devices.
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A block diagram showing the fundamental operation of SPICE appears in Fig. 4.1-1.
 The subroutine READIN reads the SPICE input file. ERRCHK verifies
that the input syntax is correct.
 Temperature effects are handled in SPICE by repeating the entire analysis for
each temperature.
 The subroutines DCTRAN, DCOP and ACAN perform the bulk of the
manipulations. DCTRAN and DCOP are used for dc transfer characteristics, dc
operating point calculations, and transient analysis.
 ACAN performs the small signal ac analysis.

MOSFET MODEL
 SPICE Version 2G has three different MOSFET models, designated as Level
1, Level 2, andLevel 3.
 The Level 1 model is basically the same as introduced in previous chapter and
is termed the Shichman—Hodges model; it closely follows the work of Sah.
 The Level 1 model is the simplest model and is useful for verifying that no
errors occurred in the hand calculations.
 In some applications the Level 1 model may be adequate for computer
simulations
 The Level 2 model differs from the Level 1 model both in its method of
calculating the effective channel length (A effects) and the transition between
the saturation and ohmic regions.
 The Level 3 model is termed a semi-empirical model. Several empirical
parameters (parameters not obviously related to or motivated by the device
physics of the MOSFET) are introduced in the Level 3 model.
 These parameters may offer improvements in fit of the model. The Level 3
model also offers a reduction in time required to calculate the transition point
between the linear and saturation regions of operation.
 The Level 1, Level 2, and Level 3 device models can be found respectively in
subroutines MOSEQ1, MOSEQ2, and MOSEQ3 of the SPICE source code.
Subroutine MODCHK is used for some of the hierarchical parameter
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definitions
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A simplified flowchart of MOSEQ1, MOSEQ2 and MOSEQ3 is shown in Figure
4.2-1.
 The large signal currents in Quadrant 1 of the ID — VDS plane are calculated

from the expression

Level 1 Large Signal Model


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 Where 𝑉𝑇𝑂 is the zero bias threshold voltage, 𝛾 is the bulk threshold
parameter, 𝜙 is the surface potential, and 𝜆 is the channel length modulation
parameter.
 A is a SPICE input parameter. 𝑉𝑇𝑂, 𝛾, and 𝜙 can either be entered directly or
be internally calculated, as discussedlater.
 The parameter K', if not entered, can be calculated from the expression

 where 𝜇0 is the nominal channel mobility (if , 𝜇0 is not entered, the default
value will be used) and Co, is the gate oxide capacitance density which can
be calculated from the gate oxide thickness,Tox, by the expression

COX = ε OX/TOX
 The parameter Ladj represents the adjusted length which is the drawn length
reduced by the lateral diffusion on the drain and source, LD.

Where 𝜖𝑠𝑖 is is the dielectric constant of silicon, 𝑁𝑆𝑈𝐵 is the substrate doping, q is
the charge of an electron, and n is the intrinsic carrier concentration of silicon.
𝑁𝑆𝑈𝐵 is a SPICE input parameter and n and es; are physical constants.

Level 2 Large Signal Model Cont


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High-Frequency MOSFET Model


The high-frequency MOSFET model is obtained from the dc model by adding the
identifiable parasitic capacitances to the dc model previously discussed

Noise Model of the MOSFET


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There are four noise-current generators modeled in the MOSFET device model
in SPICE.

 Two of these represent thermal noise associated with the parasitic series
resistances in the drain and source.
 These are modeled by spectral densities of respectively, where k I Boltzmann's
constant, T is the temperature in °K, and RD and RS represent the drain and
source parasitic resistances. sources from drain to source.

 One represents white shot noise and the other flicker (1/f) noise.
 These are characterized in the saturation region by spectral
densities of where KF and AF are user enterable parameters, gni is the small
signal trans-conductance gain at the Q-point, /DQ is the quiescent drain
current, Leff is the effective channel length and f is frequency in Hz. All noise
sources are assumed to be uncorrelated. Sw and Sj add to obtain the overall
noise spectral density
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Large Signal Diode Current

The parameter 𝐴𝑛, represents the normalized cross-sectional area of the junction. It
is a dimensionless parameter that is entered on the device element line; it represents
the ratio of the cross-sectional area of the device on the device element line to the
reference model

High-Frequency BJT Model


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The high-frequency model of the BJT used in SPICE is obtained by adding three
parasitic capacitors to the transistor T2 in Fig. 4.4-1 and one capacitor, CBX,
between the base of Ti (node BA) and the collector of T2 (nodeC).
 The parasitic capacitors are, in general, voltage dependent. The capacitor
values used in SPICE are defined by the derivative

where Q is the charge on the capacitor and V is the corresponding port voltage.

BJT Noise Model

Five noise sources are used to model the noise characteristics of the BJT. Thermal
resistance noise sources are characterized by current sources with a spectral density
of

These are modeled in parallel with the three resistors Rb, Re, and Rc,of Fig.
4.4-1.
 Shot and flicker noise are modeled by two current sources, the first with a
spectral density of is connected from the base to the emitter of T2 in Fig. 4.4-1
The second current source has a spectral density of and is connected from the
collector to the emitter of T2 in the same figure
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 The parameters q, k, and T have been defined previously,


𝐾𝐹 and 𝐴𝐹 are SPICE input parameters and f is frequency in Hz.
 𝐼𝐵𝑄 and 𝐼𝐶𝑄 represent the quiescent values of 𝐼𝐵 and
𝐼𝐶 ,respectively.
 All noise sources in the BJT are assumed to be uncorrelated.

Temperature Dependence of the BJT

 Several of the parameters that characterize the BJT are temperature


dependent.
 SPICE models the temperature dependence of the saturation currents (/ s, /SE,
and /SC), betas (BF and BR), the junction capacitance parameters (𝐶𝐽𝐸, 𝐶𝐽𝐶 ,
𝐶𝐽𝑆, 𝜙𝐵 , 𝜙𝐶 , 𝜙𝑆 ), and the noise coefficients 𝐾𝐹 and 𝐾𝐴 The saturation
currents at a temperature T are characterized by the equations

Where T1 is any reference temperature

0.000702𝑇2
𝑇+1108
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 The temperature dependence of KF and AF is modeled by (4.2-61) and


(4.2-62) where 𝜙𝐵(𝑇)is replaced with𝜙𝐸(𝑇).
 Additional details can be found in subroutine TMPUPD of the SPICE source
code

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