SH Circuit
SH Circuit
In the S/H Circuit, the analog signal is sampled for a short interval of time,
usually in the range of 10µS to 1µS. After this, the sampled value is hold until
the arrival of next input signal to be sampled. The duration for holding the
sample will be usually between few milliseconds to few seconds.
The following image shows a simple block diagram of a typical Sample and
Hold Circuit.
The following image shows the input and output of a typical Sample and Hold
Circuit.
• Analog Switch
• Holding Capacitor
Analog Switch
Any FET like JFET or MOSFET can be used as an Analog Switch. In this
discussion, we will concentrate on JFET. The Gate-Source voltage VGS is
responsible for switching the JFET.
When VGS is equal to 0V, the JFET acts as a closed switch as it operates in its
Ohmic region. When VGS is a large negative voltage (i.e. more negative than
VGS(OFF)), the JFET acts as an open switch as it is cut-off.
The switch can be either a Shunt Switch or a Series Switch, depending on its
position with respect to input and output. The following image shows a JFET
configured as both a Shunt Switch and as a Series Switch.
Advantages
• The main and important advantage of a typical SH Circuit is to aid an
Analog to Digital Conversion process by holding the sampled analog
input voltage.
• In multichannel ADCs, where synchronization between different channels
is important, an SH circuit can help by sampling analog signals from all
the channels at the same time.
• In multiplexed circuits, the crosstalk can be reduced with an SH circuit.