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8051 Memory Space, RAM-ROM Organization

The document discusses the memory structure of the 8051 microcontroller. It describes the different memory spaces including program memory, data memory, internal RAM and special function registers. It provides details on the register banks, stack pointer, program counter and other aspects of 8051 memory organization.

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Shikhar
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0% found this document useful (0 votes)
94 views28 pages

8051 Memory Space, RAM-ROM Organization

The document discusses the memory structure of the 8051 microcontroller. It describes the different memory spaces including program memory, data memory, internal RAM and special function registers. It provides details on the register banks, stack pointer, program counter and other aspects of 8051 memory organization.

Uploaded by

Shikhar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Memory Space in 8051

Microcontroller

1
2
8051 Memory Structure

External

External
60K

64K 64K

SFR

EXT INT 4K
128
EA = 0 EA = 1 Internal

Program Memory Data Memory 3


Special Function Registers [SFR]

4
Special Function Registers [SFR]

5
Special Function Registers [SFR]

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Accumulator and B register

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Special Function Registers [SFR]

8
Program Counter (PC)
Program Counter (PC)
❖ 16-bit register holding the address of the program/code memory for the next
instruction to be fetched in a program.

❖ An integral part of the


CPU and is hidden
from the programmer
and hence is not
accessible to the
programmer.

9
Special Function Registers [SFR]

10
Data Pointer (DPTR)
Data Pointer (DPTR) - (DPL:SFR-82H, DPH: SFR-83H)
❖ It is a combination of two 8-bit register namely DPL (lower 8-bit holder of
DPTR) and DPH (higher order 8-bit holder of DPTR).
❖ DPTR holds the 16-bit address of the external memory to be read or written in
external data memory operation.

❖ DPH and DPL can be used as


two independent 8-bit
general purpose registers.

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Special Function Registers [SFR]

12
Program Status Word [PSW]
C AC F0 RS1 RS0 OV F1 P
Carry Parity
Auxiliary Carry User Flag 1

User Flag 0 Register Bank Select Overflow

The flag register in 8051 is also called as Program Status Word (PSW) register.
❖ It is an 8-bit register
❖ Although it is 8 bits wide, only 6 bits are used by 8051.
❖ 2 bits – unused bits.
❖ 4 bits – conditional flags: CY, AC, P, OV.
❖ 2 bits – used for selection of register banks. 13
Flag Register
❖ CY, the carry flag:
➢ This flag is set, when there is a carry out from D7 bit.
➢ This flag is affected after an addition or subtraction.
➢ It can also be set to 1 or 0 by an instruction such as “SETB C” and “CLR C”
❖ AC, the auxiliary carry:
➢ If there is a carry from D3 to D4 during an ADD or SUB operations, this bit is set.
➢ This flag is used by instruction that perform BCD arithmetic.
❖ P, the parity flag:
➢ It reflects the number of 1’s in the Accumulator only.
➢ If A contains an odd number of 1’s, then P = 1,
➢ If A contains an even number of 1’s, then P = 0. 14
Flag Register
❖ OV, the overflow flag:
➢ This flag is set whenever the result of a signed number of operation is too
large, causing the higher order bit to overflow into sign bit.
➢ In general: C – used to detect the errors in unsigned numbers.
➢ OV – used to detect the errors in signed arithmetic operations.

F0, General purpose:


❖ Available to the user for general purpose.

15
128 Byte RAM
• There are 128 bytes of RAM in the 8051.
• Assigned addresses 00 to 7FH
General Purpose
• The 128 bytes are divided into 3 different groups as Area
follows:
1. A total of 32 bytes from locations 00H to 1FH are set Bit Addressable
Area
aside for register banks and the stack. 128 BYTE
INTERNAL RAM
2. A total of 16 bytes from locations 20H to 2FH are set Reg Bank 3
aside for bit-addressable read/write memory.
Reg Bank 2
3. A total of 80 bytes from locations 30H to 7FH are used Register Banks
Reg Bank 1
for read and write storage, called scratch pad. It is high
speed internal memory directly connected to the CPU and Reg Bank 0
used for temporary storage.
16
8051 RAM with addresses

17
8051 Register Bank Structure

Bank 3 R0 R1 R2 R3 R4 R5 R6 R7
Bank 2 R0 R1 R2 R3 R4 R5 R6 R7
Bank 1 R0 R1 R2 R3 R4 R5 R6 R7
Bank 0 R0 R1 R2 R3 R4 R5 R6 R7

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8051 Register Banks with address

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How to Switch Register Banks

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21
Bit Addressable &
Byte Addressable

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Single bit Instructions

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Bit Addressable Programming
• Example: Find out to which by each of the following bits belongs. Give the
address of the RAM byte in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH (d) SETB 28H, (e) CLR 12, (f) SETB 05

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Special Function Registers [SFR]

25
8051 Stack Pointer
❖ The stack is a section of RAM used by the CPU to store information temporarily. This
information could be data or an address.
❖ The register used to access the stack is called the SP (stack pointer) register.
• The stack pointer in the 8051 is only 8-bit wide, which means that it can take value
of 00H to FFH
• When the 8051 is powered up, the SP register contains value 07.
❖ RAM location 08 is the first location used for the stack by the 8051.
❖ A push operation in the 8051 is used to store an 8-bit data in the stack.
❖ The PUSH instruction first increments the value of SP and then stores the data
mentioned in the instruction in the memory location pointed to by SP.
❖ Similarly, the POP instruction stores the value from the top of the stack in the register
mentioned in the instruction and then decrements the value of SP.
26
8051 Stack
Pointer

27
Any Questions?

28

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