stf13nm60n H
stf13nm60n H
stf13nm60n H
Features
VDSS RDS(on)
Type ID
(@Tjmax) max
STF13NM60N-H 650 V < 0.36 Ω 11 A
Application TO-220FP
■ Switching applications
Description
Figure 1. Internal schematic diagram
This series of devices implements second
generation MDmesh™ technology. This
revolutionary Power MOSFET associates a new $
vertical structure to the company’s strip layout to
yield one of the world’s lowest on-resistance and
gate charge. It is therefore suitable for the most
demanding high efficiency converters.
'
3
3#
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1 Electrical ratings
2 Electrical characteristics
Drain-source
V(BR)DSS ID = 1 mA, VGS = 0 600 V
breakdown voltage
VDD=480 V, ID = 9 A,
dv/dt (1) Drain source voltage slope 45 V/ns
VGS=10 V
Zero gate voltage VDS = Max rating 1 µA
IDSS
drain current (VGS = 0) VDS = Max rating, @125 °C 10 µA
Gate-body leakage
IGSS VGS = ± 20 V 0.1 µA
current (VDS = 0)
VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V
Static drain-source on
RDS(on) VGS = 10 V, ID = 5.5 A 0.28 0.36 Ω
resistance
1. Characteristic value at turn off on inductive load
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
10
is
R rea
)
on
ax a
S(
m his
D
by in t
10µs
ite tion
Li era
1
d
100µs
p
O
m
1ms
Tj=150°C
0.1 10ms
Tc=25°C
Sinlge
pulse
0.01
0.1 1 10 100 VDS(V)
Figure 4. Safe operating area for DPAK Figure 5. Thermal impedance for DPAK
AM03260v1
ID
(A)
10µs
is
10
R ea
n)
ax ar
(o
DS
m is
by in th
100µs
ite tion
Lim era
d
Op
1 Tj=150°C 1ms
Tc=25°C
Sinlge 10ms
pulse
0.1
0.1 1 10 100 VDS(V)
25
20
20
15
15
10
10
5
5
0 0
0 5 10 15 20 25 30 VDS(V) 0 2 4 6 8 10 VGS(V)
7.5
0.28
6.5
5.5 TJ=150°C 0.26
4.5
3.5 0.24
Figure 10. Gate charge vs gate-source voltage Figure 11. Capacitance variations
AM03305v1 AM03304v1
VGS C
(V) (pF)
VDD=480V VGS
12
ID=11A 500
VDS
1000
10 Ciss
400
8
300 100
6
Coss
200
4 10
2 100 Crss
0 0 1
0 10 20 30 Qg(nC) 0.1 1 10 100 VDS(V)
Figure 12. Normalized gate threshold voltage Figure 13. Normalized on resistance vs
vs temperature temperature
AM03306v1 AM03307v1
VGS(th) RDS(on)
(norm) (norm)
1.10 2.1
1.9
1.00 1.7
1.5
0.90 1.3
1.1
0.80 0.9
0.7
0.70 0.5
-50 -25 0 25 50 75 100 TJ(°C) -50 -25 0 25 50 75 100 TJ(°C)
Figure 14. Source-drain diode forward Figure 15. Normalized BVDSS vs temperature
characteristics
AM03309v1 AM03308v1
VSD BVDSS
(V) Tj=-50°C (norm)
1.2 1.07
1.05
1.0
1.03
0.8
Tj=150°C Tj=25°C 1.01
0.6
0.99
0.4
0.97
0.2 0.95
0 0.93
0 10 20 30 40 50 ISD(A) -50 -25 0 25 50 75 100 125 TJ(°C)
3 Test circuits
Figure 16. Switching times test circuit for Figure 17. Gate charge test circuit
resistive load
VDD
12V 47kΩ
1kΩ
100nF
RL 2200 3.3
µF µF
VDD IG=CONST
VD Vi=20V=VGMAX 100Ω D.U.T.
VGS 2200
RG D.U.T. µF 2.7kΩ VG
PW
47kΩ
PW 1kΩ
AM01468v1 AM01469v1
Figure 18. Test circuit for inductive load Figure 19. Unclamped inductive load test
switching and diode recovery times circuit
L
A A A
D
FAST L=100µH VD
G D.U.T. DIODE 2200 3.3
µF µF VDD
S B 3.3 1000
B B µF µF
25 Ω VDD ID
D
RG S
Vi D.U.T.
Pw
AM01470v1 AM01471v1
Figure 20. Unclamped inductive waveform Figure 21. Switching time waveform
V(BR)DSS ton toff
tr tdoff tf
VD tdon
90% 90%
IDM
10%
ID 10% VDS
0
A 4.4 4.6
B 2.5 2.7
D 2.5 2.75
E 0.45 0.7
F 0.75 1
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.2
G1 2.4 2.7
H 10 10.4
L2 16
L3 28.6 30.6
L4 9.8 10.6
L5 2.9 3.6
L6 15.9 16.4
L7 9 9.3
Dia 3 3.2
L7
A
B
D
Dia
L5
L6
F1 F2
H G
G1
L2 L4
L3
7012510_Rev_K
5 Revision history
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