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23 views92 pages

Power Quality Issues Related To Variable-Frequency Drives

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UNLV Retrospective Theses & Dissertations

1-1-2004

Power quality issues related to variable-frequency drives


Mahesh M Venkateswaran
University of Nevada, Las Vegas

Follow this and additional works at: https://digitalscholarship.unlv.edu/rtds

Repository Citation
Venkateswaran, Mahesh M, "Power quality issues related to variable-frequency drives" (2004). UNLV
Retrospective Theses & Dissertations. 1751.
http://dx.doi.org/10.25669/s4fi-jas6

This Thesis is protected by copyright and/or related rights. It has been brought to you by Digital Scholarship@UNLV
with permission from the rights-holder(s). You are free to use this Thesis in any way that is permitted by the
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or on the work itself.

This Thesis has been accepted for inclusion in UNLV Retrospective Theses & Dissertations by an authorized
administrator of Digital Scholarship@UNLV. For more information, please contact [email protected].
POWER QUALITY ISSUES RELATED TO VARIABLE FREQUENCY DRIVES

by

Mahesh M. Venkateswaran

Bachelor of Engineering
University o f Madras, India
2001

A thesis submitted in partial fulfillment


O f the requirements for the

Master of Science Degree in Electrical Engineering


Department of Electrical and Computer Engineering
Howard R. Hughes College of Engineering

Graduate College
University of Nevada, Las Vegas
December 2004

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UMI Number: 1427434

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IINIV Thesis Approval
The Graduate College
University of Nevada, Las Vegas

November 18 .2004

The Thesis prepared by

Mahesh M. Venkateswaran

E n title d

"Power Quality Issues Related to Variable Frequency Drives"

is approved in partial fulfillment of the requirements for the degree of

_____________ Master o f S cien ce in E le c t r ic a l E n gin eerin g

.xaminatioyr Zommijnee Cham

Dean of the Graduate College

xamincmdwCommittee Member

'.on Committee Member

Graduate College Faculty Representative

11

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ABSTRACT

Power Quality Issues related to Variable Frequency Drives

by

Mahesh M. Venkateswaran

Dr. Yahia Baghzouz, Examination Committee Chair


Professor of
Department of Electrical and Computer Engineering
University of Nevada, Las Vegas.

Variable Frequency Drives (VFDs) are widely used in industrial and commercial

applications due to their ability to reduce energy demand. A VFD, however, is not only

sensitive to poor power quality (e.g., voltage transients, sags, and swells), but is also

considered as a source o f harmonic pollution. Harmonic currents generated by VFDs are

often blocked by passive shunt or series filters. The impact of line reactors on voltage

disturbances originating fi-om the utility side is not fully explored. Other issues like the

use o f output reactors with long motor leads and grounding of the power distribution

system are also important issues with regard to the use of VFD.

The proposed research is to investigate power quality issues related to VFDs,

broadly classified into three objectives:

a. impact of input reactors on power quality, under power system

disturbances fi"om the utility side

b. impact of output reactors on the quality of power supplied to motors,

when fed fi-om sufficiently long cables

111

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c. impact of operating a VFD from an ungrounded distribution system

The study would be carried out using the computer simulation tool PSPICE.

IV

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TABLE OF CONTENTS

ABSTRACT............................................................................................................................ iii

U ST O FH G U R E S............................................................................................................... vii

ACKNOWLEDGMENTS..................................................................................................... ix

CHAPTER 1 INTRODUCTION................................................................................... 1
Thesis Objective................................................................................................................. 1
Organization of the Thesis................................................................................................ 2

CHAPTER 2 LITERATURE REVIEW....................................................................... 4


Power Quality Issues Related to Variable Frequency Drives.........................................4
Line and Load Reactors.................................................................................................... 7
Motor Cable Length............................................................................................... 8
Grounding Systems............................................................................................................9

CHAPTER 3 ASD THEORY AND CIRCUIT MODELING....................................11


Basic Adjustable Speed Drive Theory............................................................................11
Rectifier Section...................................................................................................13
DC Bus Section....................................................................................................14
Inverter Section....................................................................................................15
External Components of V F D ........................................................................................ 15
Power Source.......................................................................................................16
Line Reactors and Output Filters/Reactors........................................................16
Motor Loads......................................................................................................... 17
Motor Cable......................................................................................................... 18
PSPICE Model of a 50hp/25A@460V Drive................................................................ 21
Simple Equivalent R-L Circuit of the Motor................................................................. 24

CHAPTER 4 SIMULATION AND RESULTS........................................................26


Task I - Impact of Line Reactors on Power Quality of VFD under Power System
Disturbances..................................................................................................................... 26
PSPICE Simulation and Results.....................................................................................30
Task n - Impact of Load Reactors on Quality of Power Supplied to Motors, when
Fed from Sufficiently Long Cables.................................................................................49
PSPICE Simulation and Results.....................................................................................52
Task in - Impact of Operating a VFD from an Ungrounded Distribution System.... 62
PSPICE Simulation and Results.....................................................................................62

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CHAPTER 5 CONCLUSIONS..................................................................................73
Task 1 ............................................................................................................................... 73
T a s k n .............................................................................................................................. 74
T a sk m ............................................................................................................................. 74
Impact o f VFDi .......................................................................................... 75
Impact o f VFD2 ................................................................................................... 75

BIBLIOGRAPHY.................................................................................................................. 79

VITA....................................................................................................................................... 79

VI

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LIST OF FIGURES

Figure 3.1 Block representation o f VFD + External Components......................... 12


Figure 3.2 Basic VFD circuit................................................................................... 23
Figure 3.3 PSPICE circuit for voltage sag analysis................................................. 27
Figure 3.4 PSPICE circuit for voltage swell analysis............................................. 28
Figure 3.5 PSPICE circuit for voltage transient analysis........................................ 29
Figure 3.6 Line-to-line voltages at upper and lower VFDs during sa g s........ 33
Figure 3.7 Currents entering upper and lower VFDs during s a g ................... 34
Figure 3.8 THD o f currents entering lower VFD - without reactor......................... 35
Figure 3.9 THD o f currents entering upper VFD - with reactor.............................. 36
Figure 3.10 Voltage across DC bus in upper and lower VFDs during sag
..................................................................................................................................... 37
Figure 3.11 Voltage across DC bus in upper and lower VFDs during sag - closer
view............................................................................................................ 38
Figure 3.12 Line-to-line voltage entering the upper and lower VFDs during
swell........................................................................................................... 39
Figure 3.13 Currents entering the upper and lower VFDs during swell.................. 40
Figure 3.14 THD of current entering lower VFD - without reactor.......................... 41
Figure 3.15 THD of current entering upper VFD - with reactor................................. 42
Figure 3.16 Voltage across DC bus in upper and lower VFDs during swell................. 43
Figure 3.17 Voltage across DC bus of upper and lower VFDs during swell - closer
view............................................................................................................ 44
Figure 3.18a Line voltage across phase ‘a’ during transient....................................... 45
Figure 3.18b Line-to-line voltage entering upper and lower VFDs during
transient..................................................................................................... 46
Figure 3.19 Currents entering the upper and lower VFDs during
transient..................................................................................................... 47
Figure 3.20 Voltage across DC bus for upper and lower VFDs during transient.......... 48
Figure 3.21 PSPICE circuit of VFD for differentcable lengths - without
reactors...................................................................................................... 50
Figure 3.22 PSPICE circuit of VFD for different cable lengths - with
reactors....................................................................................................... 51
Figure 3.24 Line-to-line voltage across motor terminals for cable of negligiblelength -
without reactor..................................................................................... 54
Figure 3.24 Line-to-line voltage across motor terminals for cable of negligiblelength -
with reactor..................................................................................... 55
Figure 3.25 Line-to-line voltage across motor terminals for cable o f 100 ft.length -
without reactor.......................................................................................... 56
Figure 3.26 Line-to-line voltage across motor terminals for cable of 100 ft. length- with
reactor........................................................................................... 57

Vll

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Figure 3.27 Line-to-line voltage across motor terminals for cable of 500 ft. length -
without reactor.................................................................................................. 58
Figure 3.28 Line-to-line voltage across motor terminals for cable o f 500 ft. length - with
reactor.................................................................................................................. 59
Figure 3.29 Line-to-line voltage across motor terminals for all cables without reactor -
closer view............................................................................................... 60
Figure 3.30 Line-to-line voltage across motor terminals for all cables with reactors -
closer view....................................................................................................... 61
Figure 3.31 PSPICE circuit o f parallel arrangement of V F D s............................................ 63
Figure 3.32 Voltage across the electrolytic capacitors......................................................... 66
Figure 3.33 Voltage across capacitor Cyz o f unfaulted drive............................................. 67
Figure 3.34 Voltage across capacitor Cyi o f faulted drive.................................................. 68
Figure 3.35 Voltage across Ci and C2 ............................................................................. 69
Figure 3.36 Voltage across C 3 and C 4 ............................................................................. 70
Figure 3.37 Voltageacross Cyi - closer v iew ...................................................................... 71
Figure 3.38 Voltageacross Cy2 - closer v iew ..................................................................... 72
Figure 4.1 Loop formation within VFDi during fau lt....................................................... 77
Figure 4.2 Loop formation within VFD2 during fault........................................................ 78

vni

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CHAPTER 1

INTRODUCTION

1.1 Thesis Objective

The need for energy savings in industrial applications is more important than before

with the rise in energy costs. Hence, there is a need for the use of energy saving devices.

The use of variable frequency drives in commercial applications results in energy savings

apart from enhanced operability. Moreover, the VFDs are well integrated within the

system (like HVAC, pumps, etc.) these days. The use of “VFD” and “ASD”

interchangeably is sometimes misleading and so a brief clarification is given below.

Several terms have been used to describe a system that permits a mechanical load to

be driven at user-selected speeds. Some of the terms include VSD, for variable speed

drive; VFD, for variable frequency drive; AFD, for adjustable frequency drive; and ASD,

for adjustable speed drive.

The term "variable" infers a change that may or may not be under the control of the

user. "Adjustable" is the preferred term since this refers to a change under user control.

The term "frequency" should only be applied to drives with an ac output, while the term

"speed" is preferred since it includes both ac and dc drives. The most accepted term for

this type of system is adjustable speed drive. Hence, interchangeability in the use of these

terms is widely accepted.

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Consequent to the increasing use of VFDs, the interest and need to study these

devices has also risen. Since VFDs are very sensitive devices, the study of power quality

issues which arise due to VFDs is of utmost importance. Since VFDs are used in an

increasing number of applications under different circumstances, the need to mitigate any

possible power quality issues that arise is very important. One way to possibly understand

and study such issues is to simulate the problem using a computer simulation tool. Such a

study gives a lot of flexibility to alter the circuit to suit different scenarios, better

understanding of the problem and saves a lot of time.

The objective of this thesis is to look at three important power quality issues

associated with the operation of a VFD, using the computer simulation tool PSPICE. The

basic circuit is modified to simulate the three different tasks, by altering power supply,

feeder (cable) parameters and supply side and load side reactors.

1.2 Organization of the Thesis

This thesis is organized into four chapters. Chapter 2 is a survey of existing literature

to highlight research carried out in the area of power quality related to VFDs with an

emphasis on issues like the effect of line and load filters, motor cable length and

grounding systems. It gives an idea as where to place the emphasis with regard to this

thesis. Chapter 3 deals with the simulation of the three tasks,

> Impact of AC line reactors on the quality of power under power system

disturbances

> Impact of output/load reactors on the quality of power with long motor cables

> Impact of operating a VFD from an ungrounded distribution system

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The simulation is carried out using a computer simulation tool and the results are

presented. Chapter 4 analyzes the results and draws conclusions accordingly. Overall,

chapters 2-4 highlight the following points:

• Existing literature with effective power quality mitigation methods, related to

this study.

• Main considerations leading to altering of the basic VFD circuit to study the

relevant tasks.

• Setting up of the basic VFD circuit with load and altering of the circuit to suit

the different tasks.

• The results obtained from the simulations using PSPICE.

• An analysis of the results obtained and a discussion to highlight the important

aspects of the study.

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CHAPTER 2

LITERATURE REVIEW

2.1 Power Quality Issues Related to Variable Frequency Drives

Variable frequency drives are used for increased efficiency in most modem industrial

applications. However, this also translates into power quality concerns when the

equipment fails or malfunctions during power disturbances [1]. Many sensitive electronic

devices are susceptible to disturbances in the input power supplied to them. Some of the

common power disturbances are voltage sags created by faults on the power system,

transient over-voltages caused by the switching of the utility's capacitor banks and

voltage waveform distortion created by the injection of harmonic currents from nonlinear

loads into the electrical utility system. Other issues of concern with respect to the

installation of a VFD are fault protection, wiring, grounding, length of the motor leads

and as with all other electrical and electronic equipments, humidity and moisture. Since

the VFD is sensitive electronic equipment, it generates distorted voltage and current

waveforms when the ac source is converted to dc and then inverted using a fast switching

inverter, to vary the speed of the motor. Hence it is extensively studied and several of

these power quality problems that occur due to the installation of a VFD are extensively

studied.

Voltage sag or dip is a short duration (0.5 to 30 cycles) reduction in rms voltage

caused by faults on the power system, starting of large loads and fast re-closing of circuit

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breakers. Power quality surveys mention voltage sags as the main cause of disturbances

in the system, with a certain survey reporting a percentage of 68% as voltage sags during

the analysis. Some of the equipment that protects the load in such a scenario is Ferro

resonant transformers, dynamic voltage restorers (DVR), superconducting energy storage

devices, fly wheel and UPS. There are other methods that have been proposed too, like

[2], where the authors propose an integrated boost converter to provide a ride-through to

critical ASD load during voltage sags without any energy storage device. Similarly, a

voltage sag ride-through using active filters is shown in [3]. The same technique with the

use of an additional energy storage device would protect against momentary

interruptions.

Utilities are overcoming reactive power shortages by the addition of capacitors to the

sub-transmission and distribution circuits. With their increased proliferation, the

switching of these capacitors yields oscillatory transients in conjunction with the

inductance in the system. A VFD is more sensitive to such surges due to the lower

voltage tolerance in the modem PWM drives and hence there is a necessity to protect the

inverter transistors from over voltage. During a capacitor switching event (CST) event,

the DC link voltage of the ASD can rise to greater than 1.3 p.u. resulting in nuisance

tripping. In [4], the authors propose a method to mitigate such tripping by the

introduction of a soft-charge resistor momentarily in the series path of the power flow,

which effectively dampens out the CST. Moreover, the damping effect is electronically

controlled and hence can be used in several utility resonance conditions. Most commonly

and practically used methods to suppress the over voltage surges is the use of a choke or

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inductance in series with the load or a low pass filter combination to block the high

frequency transients.

Harmonic related problems affect the end user more than the utility as they constitute

a small percent of power disturbances in a utility, compared to voltage sags and over

voltages. The use of VFDs and other nonlinear loads has been blamed for excessive

harmonic injection into the utility supply system. These problems can be solved by the

use of active and passive filters in the electrical system, phase multiplication, active

harmonic compensation or by rating the system components to handle the high harmonic

levels [5]. ANSI/IEEE 519-1992, ‘IEEE Recommended Practices and Requirements for

Harmonic Control In Electric Power Systems’ lists recommended limits for total current

and voltage harmonic distortions in an electrical distribution system at the point of

common coupling (PCC). The PCC is usually the point where the non-linear load feeder

leaves a bus energized by a power source. Since harmonics was the first power quality

problem encountered, a lot of research has been carried in this area and many effective

techniques to mitigate problems due to harmonics have been proposed [6, 7, 8].

Fault protection to the VFD is provided by the installation of an internal fuse or an

external fuse relative to the load of the motor. Motor overload protection is provided by

the use of a motor over-current relay system that protects the three phases. The drives are

usually placed in non-corrosive locations within the protective temperature values

marked by the manufacturer of the drive. The sizing and installation of VFD line and load

conductors should confirm to the NEC and other appropriate codes (like TEER Standard

100, IEEE Standard 142). Since grounding and the motor lead length are analyzed

extensively in this research, they are discussed separately.

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2.2 Line and Load Reactors

In situations where the drives are located close to the power source, they may be

susceptible to any incoming disturbances like spikes, sags or transients. This is because

there is not enough impedance on the source side (in the form of transformers, feeder

cables, etc.). Hence a line reactor, which is nothing but an inductance, is added to the DC

side of the VFD to increase the source impedance. Apart from acting as additional source

impedance, it also acts as a current limiting device, attenuates electrical noise and

transients associated with the system. Hence it helps to extend the life of the VFD and the

motor [9]. Due to the capacitor in the DC bus taking in energy from the power system

four times per cycle, a highly distorted double hump discontinuous current waveform is

formed. Line reactors or chokes when placed in the three phases on the AC side reduce

the rate at which the capacitor charges and hence result in a less distorted and continuous

current waveform. The value of the inductance of the reactor can be obtained using

simple mathematical calculation and is between 3%-5% impedance of the drive rating.

There are many papers which point out mitigation techniques to power quality problems

associated with the VFD due to power system disturbances [10, 11, 4]; however, there is

very little mention on the specific role these line reactors have on the VFD due to power

system disturbances like voltage sag, swell, transient, etc. It is also to be noted that line

reactors are not used if the source has high impedance as excessive impedance may shift

the input voltage out of the tolerance of the input controller rating.

Load reactors are placed on the output side, between the drive and the motor, for

many purposes. They are primarily placed to compensate for the high rate of voltage rise

in inverter output, due to fast switching, thus acting as a dv/dt filter. The over voltage at

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the motor terminal is analyzed using reflection theory for the cable end which explains

that the voltage overshoot depends on the inverter output voltage rise-time, cable length,

and the reflection coefficient of the cable length [12]. Several papers propose the use and

design of an output reactor to reduce dv/dt of inverter voltage [13, 14]. The paper [15]

talks about the design considerations for an output filter to reduce the motor terminal over

voltages arising due to the use of ASDs to AC motors, when cables of different lengths

are used (50 ft., 100 ft., 200 ft.). Even though the design of filters has been widely

discussed in a lot of papers, the use of output reactors used in such arrangement is hardly

discussed. The study of load reactors is important as most practical applications use load

reactors compared to a filter arrangement.

A study of various companies manufacturing such reactors, the utilities and other

commercial establishments using such reactors will show an extensive use of line/load

reactors in their systems. For example, MTE Corporation (www.mtecorporation.com)

which offers power quality products offers a wide range of line/load reactors which serve

the requirements for a range of applications. Tables are provided that help to pick the

optimum reactor for any application.

2.3 Motor Cable Length

Motor cable represents the section of cable (or feeder) between the drive and the

motor. The paper [16] first pointed that the very steep PWM inverter output voltage

pulses sent out on the motor cable must be individually studied rather than just

considering the effect of the RMS voltage and current values. Persson observes that the

motor cable acts as a transmission line to the voltage pulses and explains the reflection

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theory in the drive-cable-motor arrangement, which might arise due to a mismatch in the

characteristic impedance and the cable end impedance. A special feature paper by

Persson in 2000 [17] concludes that the output pulse voltage rises with increasing cable

length quoting study by other researchers, and hence reiterates the fact that motor cable

length is an important issue with regard to the use of a drive-motor arrangement. Paper

[18] outlines the research carried out in the design of output filters for PWM drives

considering the effect of motor cable length. The authors conclude the use of a dv/dt filter

when the cable is not long and the use of a sinusoidal output filter otherwise. Paper [19]

studies the effect of long cables on IGBT PWM inverter (a 460V AC inverter is used)

drives and concludes that the effect of long cables is significant with the operation of

lesser horsepower drives (less than lOHP). Another white paper [20] concludes that the

effect of reflected voltage wave is not a problem when the cable length is less than 15 ft.

However, with increasing cable length, it results in a voltage overshoot (or voltage ring-

up) condition that results in stress on the motor’s insulation, lesser efficiency, increased

motor noise and heating effects.

2.4 Grounding Systems

The aspect of operating VFDs with a grounded or ungrounded system has not been

actively discussed since it is assumed that most power distribution systems are Wye

grounded. However, older industrial plants in the United States and shipboard systems in

the U.S. Navy [21] still operate on ungrounded electric power distribution system. This

arrangement is still popular in older plants due to the fact that a phase-to-ground fault

need not be cleared immediately and hence avoids a shutdown of critical plant operation.

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Hence the need to study the impact of grounding systems on VFD applications needs to

be understood clearly.

In the case of existing Delta ungrounded systems used with VFDs, it is suggested to

install a Delta to wye transformer with a wye grounded, with an individual grounding

rod. Most VFD manufacturers these days suggest the removal of the Y-capacitor with the

placement of a jumper, when used with an ungrounded power source due to the

grounding loop caused by the same when a line fault occurs, which otherwise results in

the breakdown of the drive. Paper [22] discusses the theory behind one such catastrophic

failure, in a parallel arrangement of VFDs.

10

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CHAPTER 3

ASD THEORY AND CIRCUIT MODELING

This chapter is organized into three parts, where the ASD is its basic form is analyzed

in the first part, followed by an explanation of the external components of a VFD and

finally the presentation of the specific PSPICE model of the VFD used for this study.

This drive is modified later to study the different tasks involved. The following sub­

chapter explains the basic theory of an ASD in its most general form, with brief

explanation about the three major sections - the input bus section, the DC bus filters and

the inverter section, which is followed by an explanation of the external sections like the

power source, reactors, etc. that are key to the operation of a VFD smoothly. Fig. 1 is a

block representation of the VFD and its external components.

3.1 Basic Adjustable Speed Drive Theory

A VFD has three basic sections - the input bus section, the DC bus filters and the

inverter section. The AC supply is usually Wye grounded, and sometimes an ungrounded

delta transformer. The three phase AC input is rectified using a six bridge diode rectifier

to produce a DC bus. Motors usually have high starting current and hence a resistor in

parallel with a switch acts as the current limiting circuit. This helps to differentiate

between the high inrush current and a fault. The DC is smoothened with the use of filter

11

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Mowr
ocaut

Fig. 1: Block representation of VFD + External Components

12

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capacitors, used to attenuate the common mode and differential mode interference. This

filter arrangement contains ‘X’ and ‘Y’ capacitors to reduce symmetric and asymmetric

EMI and RFI interference in the system. The smoothened DC is fed to the inverter

arrangement, an array of six IGBT switches, controlled by a microprocessor.

The IGBTs are capable of very high switching frequencies in the range of 1 KHz - 20

KHz, with rise time up to 0.1 jas. The IGBT is switched on and off by a microprocessor

connected to the inverter arrangement. All the IGBTs are switched at the same frequency

and thus help to produce a pulse-width modulated sine waveform, whose frequency can

be controlled with the switching arrangement. Output filters/reactors are used to reduce

the high frequency leakage currents. The motor terminals are fed with a 3-phase

controlled AC supply with variable frequency, resulting in the variable speed range of the

motor. A knob is provided to adjust the speed of the motor and accordingly the switching

frequency adjusted by the microprocessor. The VFD helps reduce the stress on the motor

and increase efficiency, apart from providing easy speed control.

The three basic sections of a VFD are discussed below.

3.1.1 Rectifier Section

The 3-phase AC input is rectified using a 6-pulse diode bridge rectifier to produce a

DC voltage. With an increase in the need to meet clean input power requirements, many

ASD manufacturers are replacing diode bridge rectifiers by PWM rectifiers [23]. Other

advantages that are observed with the use of such an arrangement include power flow in

two directions, regenerative braking and immunity to voltage sags and other utility

disturbances. Also, diode rectifiers produce harmonic pollution and hence replaced by

active filters as presented in [3], providing voltage sag ride through capability.

13

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In industrial applications, three phase rectifiers are preferred, compared to single phase

rectifiers, due to their lower ripple content and higher power-handling capability. The

three-phase full bridge diode rectifier shown in Fig. 2 is the most commonly used setup in

a VFD.

The average value of the output DC voltage (considering large c^acitance) can be

calculated by obtaining the average over a 60° or n/3 interval, and given by

2 2j
Vj = — \42Vr, coscûtJœt — zr <CDt <—n
“ n jJt A A

where,

- rms value o f line-to-line voltages.

3.1.2 DC Bus Section

The DC bus section between the rectifier arrangement and the inverter section carries

the constant-voltage DC fi’om the rectifier. The rectifier powered bus may be connected

to several inverters, with the inverters being regenerative between the motors and the dc

bus. This allows regeneration firom one load to be returned to the bus, and used by other

inverters. The voltage across the DC bus follows the peak of rectified input phase-to-

phase voltage while the DC-bus capacitors are charging, then decreases until the next

phase-to-phase voltage exceeds the DC-bus voltage. The capacitors are placed in a

parallel arrangement and the number of capacitors in each bank depends on the

horsepower o f the drive.

3.1.3 Inverter Section

There are different types of drives used for different applications and the inverter

section of a VFD impacts power quality, power factor and harmonic content as a function

14

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o f the source inductances. Three major inverter types used in VFDs are Voltage Source

Inverter (VSI), Current Source Inverter (CSI) and Pulse Width Modulated (PWM) drives.

However, PWM units are the state-of-the-art drive option due to the high energy

efficiency, higher performance and availability in sizes of up to several thousand hp. In

early pulse-width-modulated units, the carrier switching frequency used to be in the 2

kHz range, which sometimes caused annoying audible problems. Most manufacturers

now offer drives with a higher carrier frequency in the 15 kHz to 20 kHz range that use

insulated gate bi-polar transistors in the output circuit. Even though this has resulted in

power quality problems on the motor side, including insulation and bearing failures, the

advantages o f using a PWM inverter outweighs these problems. Hence, the selection of

an ASD with a desirable inverter section is a very important decision to be made, based

on discussions with the drive vendor. A wonderful guide to the selection and application

of an ASD has been released by the National Electrical Manufacturers Association [24]

that assists the user to communicate critical information and requirements to the vendor,

by avoiding the common application pitfalls.

3.2 External Components of the VFD

Apart from the above three basic sections that make the heart of the VFD, there are

some external components that are of importance to install a VFD between the utility and

the load. Some o f these components like line/load reactors are optional. These external

components o f a VFD are discussed in the following sections.

15

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3.2.1 Power Source

The power for a VFD, in most cases, is derived from the utility and hence the power

needs to be conditioned in case of applications where a pure sinusoidal input is a

necessity. Most power quality issues like sags, swells, transients, etc. arise due to power

system disturbances and hence a steady power source is necessary. The grounding of the

power distribution system is an important factor to be considered in the usage of a VFD

in any industrial application. Even though most power distribution systems are wye

grounded, there are still older plants in the United States that are powered by an

ungrounded system with a delta connected to the secondary of a transformer.

3.2.2 Line Reactors and Output Filters/Reactors

Line and load reactors are optional inductances added to the input side and motor side

of the VFD respectively for different purposes. Line reactors, on the input side, stabilize

the current waveform, reducing the harmonic distortion and burden on the electrical

equipment. They absorb the spikes and fill-in the sags, and hence prevent over-voltage

and under-voltage tripping problems. They also minimize interference with other

electronic equipment. The value of line reactors vary between 3%-5% impedance of the

drive rating.

Load reactors, however, are used to reduce the high frequency currents of the motor

and to protect the motor from long lead lengths. They also reduce the stress on the motor

due to high PWM voltage pulses from the inverter, reduce motor temperature and act as

current-limiting devices to protect the motor under short circuit conditions. The inductors

when installed require an additional volume of 10% to 25% of the inverter and hence, the

sizing of the inductor is very important. Manufacturers provide detailed tables with motor

16

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
rating, voltage/frequency and percentage impedance so that users can buy the desired

reactor. Manufacturers also provide a table o f inductors in a matrix relating specific

inductors to frame sizes as a function of the length of cable. For higher powered motors,

the vendors can be contacted to provide reactors based on the specific need.

Even though output reactors are used to reduce the rate o f change of rise o f voltage at

the motor in most applications, they do not effectively reduce the peak voltage. In such

cases, an output filter arrangement is used to reduce the over-voltages due to reflections,

mostly for long cable lengths. Replacing line reactors with filters involve significant cost

increase and collateral power loss proportional to cable length depending on the

optimization procedures used in the design o f such filters. Different types of output filters

in use are L-R-C filter, L-C-D filter (combination o f a rectifier in addition to inductor and

capacitor) and L-C filters. Many techniques have been proposed in the placement of these

filters as in [13], where an input/output filter topology with interconnection to dc-link

midpoint is proposed and [25], where a common-mode sinusoidal filter in tandem with

variable inductors is proposed to achieve better motor performance.

3.2.3 Motor Loads

Even though motor load is not a part of the ASD, it remains an important parameter

in the selection o f an ASD. The application guide for the selection o f ASD published by

NEMA [24] has a part dedicated to the selection of motors. It suggests that various motor

parameters such as horsepower, torque requirements, speed range of motor, acceleration

and deceleration requirements, and duty cycle need to be acquired at the initial planning

phases o f an ASD application. Also, external parameters like motor enclosure need to be

considered as that helps in the smooth functioning of the internal components.

17

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
M otor loads in general can be classified into three categories: constant torque,

constant hp and variable torque, w ith applications varying from c o n v ey o r belts that

require the sam e torque at both low and high speeds, m etal-cutting tools operating over

w ide range o f speeds and centrifugal pum ps, w here in theory the hp varies as a cube o f

the speed. O ther types o f loads include transient loads and im pact loads.

M otor and control speed characteristics are an integral part o f m otor selection fo r any

A SD application. Som e o f the m o to r characteristics o f im portance are m axim um m otor

over-speed, operating speed range, acceleration, deceleration and braking, starting

requirem ents, m otor term inal voltage transients, shaft voltages and bearing currents and

noise and tem perature considerations. A lthough there are m any control techniques that

can be em ployed, the only control techniques applicable to three-phase ac induction

m otors w ithin the scope o f N E M A are: volts/hertz control and vector control. In

volts/hertz control, the voltage supplied to the m otor by the control at various frequencies

is strictly governed by a fixed volt-to-hertz ratio, unless the voltage bo o st o r current-

resistance (IR ) com pensation is activated or the frequency is increased beyond a value for

which the system voltage is sufficient to m aintain it. A vector control decouples the

m agnetizing flux producing and torque producing currents supplied to the m o to r and

controls them separately, thus providing a very good steady-state and dynam ic

perform ance w ith accurate speed and torque control.

3.2.4 M otor C able

Cable lengths betw een the drive and the m otor affect the selection o f an A S D as

m uch as the m otor loads. W hen the m otor is a long distance from the inverter, the

conductors connecting the m o to r to the inverter act like a transm ission line, w here the

18

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
inductance is the phase inductance p er unit length, and the capacitance is the line-to-

ground capacitance p er unit length. F rom transm ission line theory, w hen there is a

m ism atch in the characteristic im pedance o f the line and the im pedance at the m otor end,

voltage and current w aves are reflected back. T he voltage adds up to the incident voltage

at the inverter end and hence alm ost doubles the voltage at the m otor. A lthough the

m ism atch betw een cable and m otor im pedance is highest for sm all m otors, in all cases,

voltage is greatest at the m otor, resulting in m o to r insulation dam ages and bearing

currents [26]. T he voltage reflection coefficient is given by

Z _ -Z _
P
z_ +z_

w here, Z^ is the m otor im pedance, Z^ is the characteristic im pedance o f the line and P

the reflection coefficient. The value o f ‘P ’ is clo ser to 1.0 for sm aller m otors and keeps

decreasing w ith increasing hp. C haracteristic im pedance Z^ is defined using cable

param eters, as below :

w here, and represent the im pedance per foot o f m otor cable.

PW M rise tim e is the tim e (in ps) fo r the inverter output pulse to travel from the

inverter term inals to the m otor term inals and can be expressed as,

and V is the pulse velocity given by.

19

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1
V = •

w here,

- cable length;

- cable inductance per unit length;

C,, - cable capacitance per unit length;

r, - tim e fo r puise to travel the length o f the cable once.

A fter t i m e t ,, the forw ard-traveling inverter output pulse will be reflected at the m otor

term inals, and the resulting backw ard-traveling w ave, m oving tow ard the inverter, will

have am plitude of

f * V * T
= ^ fort, <t,
K
and

= fort, > L

where,

- D C bus voltage

- reflection coefficient at the load

t, - inverter output pulse rise tim e

A nother im portant param eter that needs to be understood w ith respect to m o to r cables

is ‘critical cable length, w hich is the m axim um cable length at w hich voltage

am plification d o esn ’t occur. If the propagation speed (the voltage w ave) is S and the rise

tim e o f the P W M w ave front (defined as the tim e taken for the output to go from 10% to

90% o f its peak value) is T , then the distance traveled by the w ave front during its rise

20

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
tim e is S X T. If the m otor is at a position w here the incident w ave has ju st reached 50%

o f its full value and if the reflection coefficient is 1.0, then the sum o f the reflected and

incident w aves will yield 100% o f the peak value o f the incident w ave. A ny distance

greater than this critical lead length w ould result in a voltage greater than 1.00 p er unit.

So the critical lead length is given by:

D c r itic a l 2

T he propagation speed over a co n d u cto r depends on its inductance and capacitance per

unit length and can be expressed as:

S = —j}. m /sec
4 lc

T he rise tim e increases w ith increasing critical lead length.

E m ploying output reactors, output filters and high frequency snubbers in the output

side are som e o f the w ays to protect inverter feed m otors, w hich operate from long leads,

from over-voltage and fast rise o f v oltage pulses.

3.3.1 P S P IC E M odel o f a 50hp/25A @ 460V D rive

T he pow er circuit o f a V FD is straightforw ard. Such a standard circuit is show n in

Fig. 2 w here a wye connected three-phase A C input (460 V) is rectified by a 6-pulse

diode bridge rectifier to produce a D C voltage (460*1.414 = 650 V). T he D C link

consists o f tw o sets o f capacitor banks (Ci and C 2 ) connected in series w ith the m idpoint

“O ” readily available. T hese capacitors are placed across the D C -link o f an A S D to

prim arily store energy but they also perform the follow ing functions: filter the voltage

ripple from the rectifier output, act as a low im pedance path for ripple currents generated

21

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
by the rectifier and PW M inverter stages and m aintain an adequate dc-link voltage level

for ride-through during a brief utility disturbance. T hese X- capacitors are used w here

failure could not lead to electrical shock. T he typical value o f the X -cap acito r lies

betw een 0.1 and 1.0, how ever higher values are required depending on the interference

frequencies (EM I). In this study, a value o f 2600/xF is required and is split betw een two

capacitors C, and C 2 connected in parallel.

The Y -capacitor Cy, connected betw een the dc-link m idpoint o f the line and the

ground, is fo r applications w here dam age to the capacitor m ay involve the danger of

electrical shock if the ground connection w ere lost. Since a Y -capacitor shunts current to

ground, leakage-current lim itations lim it their size to a m axim um o f about 4 700pF in

m any com m ercial and industrial applications. L arger ones over 0.1/xF are available these

days due to the increasing dem and o f higher valued capacitors. In this study, a value of

220nF is chosen fo r Cy.

T he D C rail bus is connected to a three-phase PW M inverter that utilizes IG B T s fo r

sw itching. T h ese IG B T s are turned on and o ff at high frequency (4 kH z in this particular

application) by using an external circuitry. T he P W M circuitry, that generates drive

signals for the sw itches m odeling the IG B T s, is fed by a 30 H z sine w ave and a 4 kHz

triangular w ave through a com parator, to produce the pulsed sine w aveform . T he control

part is usually done by a m icroproeessor in such a m anner as to produce a 3-phase PW M

A C voltage from the D C bus. A n adjustable knob is provided to generate drive signals

w ithin the operating frequency o f the VFD.

T o avoid convergence problem s in PSPIC E , som e extrem ely large or extrem ely small

resistors are placed alongside the E M I capacitors. In addition, a resistor o f 150 Q placed

22

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
V 2

V 3 C2

Ü 1

Fig. 2: Basic VFD circuit

23

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
in parallel w ith a sw itch is connected in series w ith the electrolytic capacitors during

starting to lim it the inrush current. T he current in itially passes through the resistor until

the sw itch is turned on at 150ms, by w hich tim e the inrush current is negligible and hence

poses no serious dam age to the com ponents. T he o utput side o f the V F D consists o f a

cable w ith negligible im pedance and the m otor loads. A sw itch is placed before the m otor

one each in all the three phases and turned on a little into steady-state to pass the current

to the loads.

3.3.2 Sim ple E quivalent R -L C ircuit o f the M otor

The m o to r is a non linear load w hich is represented by an R -L com bination equivalent

to the rating. T h e m o to r is rated at 50hp/25A w ith an operating voltage o f 460V . T he load

is represented in P S P IC E by taking values from the follow ing calculation:

Total kV A = 460 * 25 * 1.732 = 16.26 kV A

P er phase kV A = 16.26/ 3 = 4.88 kV A

A ssum ing P o w er factor, C os 0 = 0.85,

H ence, Sin 0 = 0.5267

P ow er/phase = 4.88 kV A * 0.85 = 4.148 kW

R eal P o w er = I^R (kW )

i.e., (2 5 )^ * R = 4.148 kW

=> R = 6.64 Q.

R eactive P o w er = P * Sin 0 = 4.148 kW * 0.5267 = 2.18 kV A R

B y form ula,

Q = 1 % , w here X l = (377) * L

24

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
=> L = (2.18 kV A R ) / ( ( 2 5 f * 377) = 9.25m H

= > R = 6.64 Q; L = 9.25 m H

Thus the m otor is represented by the above calculated values o f R and L in each o f

the three phases.

25

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CHAPTER 4

SIMULATION AND RESULTS

The main core of this thesis is divided into three tasks, with each task analyzing a

certain power quality problem in the installation and use of a VFD. A problem is framed

for each task followed by a modification of the basic circuit to suit that particular

problem. Then the circuit is simulated to obtain the results, which are later discussed. In

the following chapters, the three tasks are discussed and results presented.

4.1.1 Task I - Impact of Line Reactors on Power Quality of VFD under Power System

Disturbances

As previously explained, line reactors are optional in a VFD arrangement but most

applications use either line or load reactors or both. During early morning hours, most

utility systems turn their capacitor banks on and/or off at the utility substations, which

might result in capacitor switching transients (CSTs). Smaller VFDs (of less than 15hp)

are usually sensitive to these CSTs, while larger ones are less susceptible. A line reactor

is an effective and easy way to reduce the nuisance tripping that might occur due to

CSTs. Hence, line reactors play an important role in reducing the power quality problems

due to power system disturbances.

In Fig. 3 a power disturbance in the form of voltage sag is created by using additional

circuitry in the input side. A line reactor is placed in each of the three phases on the upper

26

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
150m
MOm “ ■'* ‘
—0 —W
i— —---r ^ " ‘’0 '
11-200
W--
200m

1l -200 1.21 200 0.5C1mH


W--- —W«---
200m

0.S01m0
r 1» -200 1^ : 200

È ZA
t 't e '
M o»r 2
150m 200m
4Wr

200m

200m

AZ A

Fig. 3: PSPICE circuit for voltage sag analysis

27

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
$zz
3% °
•3

ISOm zoom ^
! ,

1> MO 1.2s .200 OaimM


^VW- -VA----

f]
200m

1 2s .200 0.561mH
K 200
-W r - -Wi----
200m
-0-^VVV— ---r ^ - ^ - 0
1( MO 12s .200 O.SOtmH
-Wr- -V A -------

ZZZ X*7 "k


^'3

tes*
*3

150m
-V A -
a»-6
200m
•3
-V A - _L ^_L j 00^ _ L _ * v w \ J _

■0 200m
-V A -

% -
'0

Fig. 4: PSPICE circuit for voltage swell analysis

28

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
S &21 % ' is g ’
O.SfetmM

M 2m t \ 302.0Sl2m<

2Mm
M 2m s W ZW IAn#
p©-^vvv-^ i j: O.S61mH

12m#

------------ sunn------— —tmjb« to


—© —W — r —
I— 0.>6fmW
302m# \ 30
5 &A îte g '

*"<C AAA

—AW

—VW
r-^

—AW

if e * j £ g '

Fig 5: PSPICE circuit for voltage transient analysis

29

Reproduced with permission o f the copyright owner. Further reproduction prohibited without permission.
VFD circuit while none is placed on the lower VFD. Three low valued resistors are

placed in each o f the three phases of the lower VFD to place probes after circuit

simulation, to measure current values entering the lower VFD. The motor (50hp) is

placed right after the VFD, thus preventing the effect of long cables in such an

arrangement. A comparison of the currents and voltages at the lower and the upper VFDs

helps to study the effect line reactors on the quality of power, under power system

disturbances. The same procedure is repeated to study the system under voltage swells

and voltage transients at die supply side. Fig. 4 and Fig. 5 represent the circuit setup for

the study under swells and transients respectively.

4.1..2 PSPICE Simulation and Results

The basic VFD circuit in Fig. 2 is modified to study the effect of line reactors on

power quality, under sag, swell and transient. A power system disturbance is created by

using a switch-voltage source setup in parallel with a low valued resistor, in series with

each o f the voltage sources in the three phases o f the line. Sag is created by adding a

series voltage o f negative 200 Volts at Is to the input line voltage o f 460 Volts, and then

increasing it back to 460 Volts at 1.2s. Fig. 3 represents such an arrangement while Fig. 4

represents the creation o f voltage swell by reversing the sag process. It can be observed

from Fig. 6 and Fig 12 how sag and swell are simulated in the system, respectively.

However, for transient study, a sine wave with a 1.2 x 50 ps 1000-V impulsive transient

rising from 0 to its peak value o f 1000 V in 1.2 ps and a decaying time o f 50 ps is created

by switching a sine and exponential source alternatively. This arrangement is shown for

all three phases in Fig. 18.

30

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
A 5% line reactor is placed in each of the three phases in all the three cases. The 5%

line reactor is calculated using the drive rating, as below:

Total drive kVA = 50 kVA

Base Impedance = (Vn)^ / (drive kVA * 1000)

= (460)^ / (50* 1000) = 4.232 Q

Base Inductance = Base Impedance / (2 * pi * f * 1000)

= 4.232 / (377 * 1000) = 11.22 mH

5% of Base Inductance = 5% of (11.22 mH) = 0.561 mH

The circuit is then simulated for a certain time and the results obtained.

Fig. 6 shows the line-to-line voltage in the upper VFD with the line reactor and the

lower VFD without the line reactor, during the sag period. It can be seen that the voltage

dips towards the end, thus reaffirming voltage sag from the power supply side. Fig. 7

shows the currents in the upper and lower VFDs during the same period. It can be seen

that the reactor helps to compensate for the sag and retains a smooth and continuous

waveform in the upper VFD while the lower VFD, without the line reactor, has a more

discontinuous current waveform. The Total Harmonic Distortion is given by the formula.

h=2
THD =
M,

M^ = rms value of harmonic component h of the quantity M

M 1 = rms value of fundamental component of the quantity M

THD = effective value of the harmonic components of a distorted waveform

31

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
The rms value of the total waveform is given as,

rms= =Mi.Vr+7HD^
V/i=i

The THD of current of the upper and lower VFDs can be seen in Fig. 8 and Fig. 9, where

the VFD with line reactor has less THD compared to the lower VFD without the reactor.

Fig. 10 and Fig. 11 show the DC bus voltage across the DC bus during the sag period and

it can be seen that due to the additional impedance (line reactor), the upper VFD has a

lesser and continuous voltage compared to the lower VFD with a slightly higher voltage.

Fig. 12 shows the line-to-line voltage in the upper VFD with the line reactor and the

lower VFD, during the swell process. Fig. 13 shows the respective currents entering the

VFD for the same time period. Similar to the sag process, with the use of a reactor, it can

be seen that the THD of current in the upper VFD is lesser than the lower VFD as shown

in Figures 14-15. The voltage across the DC bus is shown in Figures 16-17, with the

upper VFD having a lesser voltage due to the additional reactor impedance.

In the case of a voltage transient in the input side due to fast switching, voltages the

currents entering the upper and lower VFDs are shown in Figures 18-19. It is seen that

the magnitude of current in the lower VFD, without a reactor, increases rapidly for less

than a cycle, due to the transient in the supply side. However, in the same figure, it is

noted that the current waveform of the upper VFD, with the line reactor, is continuous

and doesn’t increase or decrease rapidly. Also the THD of the upper and lower VFD can

be observed in Figures 20-21 respectively, with the upper VFD having a lesser THD

overall. Figures 22-23 show the voltage across DC bus during transient.

32

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
•SI-
with reactor

SIlH

-SM-

-7,3-1-------------- ------
1 .9 6 5 s 1 .9 7 1 s I .I M s 1 .9 2 1 s

Fig. 6: Line voltages entering the upper and lower VFDs during sag

33

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1 .9 8 1 s 8 998s 1.828s 1.888s
Timew)

Fig. 7: Currents entering the upper and lower VFDs during sag

34

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
I.WHz
u 1.21Hz
Fr«qMncy(KHz)

Fig. 8: THD of current entering lower VFD - without reactor

35

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
•.M Hz 1.2Rlb
Fr«qMncy(KHz)

Fig. 9: THD of current entering upper VFD - with reactor

36

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
f.2 s t.ls 1.2s

Fig. 10: Voltage across DC bus in upper and lower VFDs during sag

37

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
c
I'

0 .9 9 1 s 1 .0 0 0 s
Tine (s)

Fig. 11 : Voltage across DC bus of upper and lower VFDs during sag - closer view

38

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
2 . OKU

0 .9 6 5 s 0 .9 7 0 s 0 .9 8 0 s 0 .9 9 0 s 1 .0 2 0 s 1 .0 3 0 s
Tim* 0 )

Fig. 12: Line voltages entering the upper and lower VFDs during swell

39

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
10M -

0 .9 6 5 s 0 .9 7 0 s 0 .9 8 0 s 1 .0 0 0 s 1 .0 2 0 s
Tim* (0

Fig. 13: Currents entering the upper and lower VFDs during swell

40

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
25.3 8

rii.M

3.5XHZ I.WHZ 1.5KHZ 2.WHZ 2.5KHZ 3.WHZ 3.5KHZ %.WHz


Fre^eip* (kHz)

Fig. 14: THD of current entering lower VFD - without reactor

41

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
3

(Hz (.SKHz 1.(KHZ 1.5KHZ Z.MWz 2.5KHZ 3.1MHz


Fr«w » 0 ’ (kHz)

Fig. 15: THD of current entering lower VFD - with reactor

42

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1.2KU

0.8KU-

8 .2 s 8 .8 s 1 .8 s 1 .2 s I .H S
Tim*(s)

Fig. 16: Voltage across DC bus in upper and lower VFDs during swell

43

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1.ZKU

1.WU-

J a.BKV-

8.6KU-I------------1-----
8.9 6 5 s 8 .9 7 0 s 8 .9 9 8 s 1 .8 8 8 s 1 .8 1 8 s 1 .8 2 8 s 1.8H8S
Time (0

Fig. 17: Voltage across DC bus of upper and lower VFDs during swell - closer view

44

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1.MU

OU-

266ms 280ms 296ms 316ms 336ms


Time(■»)

Fig 18a: Line voltage across phase ‘a’ during transient

45

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
1.8KU

298KS 31 ta s 330ns
Tin« (Bs)

Fig 18b: Line voltages entering upper and lower VFDs during transient

46

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
68Mi

Wüh«it rnctir

With reactor

H
-38M -
298ns 295ns 388ns 385ns 318ns 315ns 328
Tine (nt)

Fig 19: Currents entering upper and lower VFDs during transient

47

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
839U

.W irhM t r f t r t e r
88N -

700U-

298ms 292n s 296n s 386n s 388n s 318ns


Tine (ns)

Fig 20: Voltage across DC bus for upper and lower VFDs during transient

48

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
4.2.1 Task II - Impact of Output Reactors on Power Quality supplied to Motors, when

Fed from Sufficiently Long Cables

An output reactor is placed on the output side, between the drive and the motor. It is

increasingly used these days due to the fast switching IGBT inverters, thus making the

VFDs more susceptible to power quality problems. However, due to the increasing use of

IGBT inverters that outweigh its disadvantages, the use of other compensating devices

has become a necessity. Output reactors are used as current limiting devices and filter the

PWM waveform from the inverter output, thus reducing the effect of fast rise in dv/dt.

Apart from this, they also help to reduce electrical noise and protect the controller from

short circuit in the load or a surge in the output current by limiting the short circuit

current.

Another important aspect that is considered is the length of the feeder connecting the

drive to the motor. As explained earlier, increasing cable length contributes to damped

high frequency ringing at the motor terminals resulting in over-voltages resulting that the

motor insulation.

Fig. 24 shows a PSICE schematic that is used to study the quality of power supplied

to the motor when cables of different lengths are used, in the presence of 5% load

reactors. A VFD with 5% load reactors over varying cable lengths is connected to the

same load. The output reactor is modeled the same way the 5% line reactor is modeled

while the motor cable is modeled based on values obtained from [15], for lengths of 100

ft. and 500 ft. The bottom-most arrangement represents a cable of negligible length

(where the motor is placed right next to the drive), the top-most arrangement represents

the cable of 500 ft. and the middle arrangement represents the 100 ft. cable.

49

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
Mm

± CS

Fig. 21 : PSPICE circuit o f VFD with output reactors for different Cable Lengths
without reactors

50

Reproduced with permission of the copyright owner. Further reproduction prohibited without permission.
= C4

T Ca3

Fig. 22: PSPICE circuit of VFD with output reactors for different cable lengths - with
reactors

51

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4.2.2 PSPICE Simulation and Results

The basic setup is shown in Fig. II, in which the basic VFD circuit is altered to add

load reactors in each of the three phases on the output side. Also, since cables of different

lengths are used for the study, a three-layer arrangement is used on the output side to

model cables of 500 ft., 100 ft. and of negligible length. Lumpedcircuitparameters are

used to represent the cable. From [15], the impedance value per foot of the most

commonly used cable in such applications is obtained. They are

Impedance per foot: Cc = 0.01 nF/ft., Lc = 0.36 pH/ft., Rc = 6.0 mQ/ft.

Accordingly, the values for cables of 250 ft. and 500 ft. are calculated as below:

100 ft. cable: Cc = I nF, Lc = 36 pH, Rc = 0.6 Q

500 ft. cable: Cc = 5 nF, Lc = 180 pH, Rc = 3 Q

The circuit is simulated for a specific time period and results obtained.

A look at the line voltages at the motor terminal helps to understand the effect of

output reactors on the quality of power supplied. Also, the effect of varying motor cable

lengths has an effect on the power supplied. Fig. 23 and Fig. 24 show the line voltage

across the motor terminals for a cable of negligible length, without and with a reactor

respectively.

The results for a cable of 100 ft. and 500 ft. are also presented as shown in Figures

25-28. With cable of negligible length, the effect of output reactors on the quality of

power is rather small. However, with increasing cable lengths, it can be observed that the

output reactors help to minimize the over-voltage transients, thus helping to deliver a

better quality of power to the motor. A closer view of the line voltages for the different

cable lengths is shown in Fig. 29 without the reactors and in Fig. 30 with the reactors. It

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can be seen that with the reactors, the waveforms do not rise as much and hence help to

supply better quality of power to the motor side.

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Fig. 23: Line voltage across motor terminals for cable of negligible length - without
reactor

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MSas

Fig. 24: Line voltage across motor terminals for cable of negligible length - with reactor

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1.WV-

Fig. 25: Line voltage across motor terminals for cable of 100 ft. - without reactor

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4 2 ln s 4251» 48 1 n s 485ns 4 48ns 445ns 45#
um Oh )

Fig. 26: Line voltage across motor terminals for cable o f of 100 ft. - with reactor

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I.NU

415k 444K 445 k 45#

Fig. 27: Line voltage across motor terminals for cable of 500 ft. - without reactor

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1 .W V -

1.3KU
445H5 450K
ItaMdM)

Fig. 28: Line voltage across motor terminals for cable o f o f 500 ft. - with reactor

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«itkcaU«af$00ft. Vick caMeaflOOft.

«itk tabla af maÿlgfbla lampk

0.5KV

-8.5KU-I------
%37.1#ms W 7 .1 5 # s W 7.2#m s ft37.25ns W 7.30m s # 3 7 .35ms li37.40iis %37.45iis %37.5#ms 4 3 7 .55ms
Tüna (Ms)

Fig. 29: Line voltage across motor terminals for all cables without reactors - closer view

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. KU
1 8
W itbcaUtofSOOft.

With cibi* *f se flifib le lemph With 100 f t IcDfdi

-B .S K tf I ■■ I '" - I ' - I ■■■ — ' -'T—................ I' I -.................. I I I


#37 .1 * » s %37.15ms %37.20ms U 7 .2 Srs W 7 .3 » # s 437.3SIIS H37.48RS 437.liSiis #37.5#m s 4 3 7.55ns
Time (Ml)

Fig. 30: Voltage across motor terminals for all cables with reactors- closer view

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4.3.1 Task m - Impact o f Operating a VFD from an Ungrounded Distribution System

As mentioned earlier, high firequency switching of the inverters in VFDs results in a

steep change in voltage and/or current, causing numerous problems including conducted

and radiated EMI. Conducted EMI is controlled by installing filters, both common-mode

and differential mode. Unlike the previous tasks, an ungrounded distribution system

(delta) is used at the supply end. Even though the usage of an ungrounded source is not

common place in industrial and commercial plants, it is employed in shipboard systems

and old industrial plants in the US. In such a scenario, the need to understand the

operation o f a VFD is important and key to the smooth operation o f the plant.

Fig. 31 represents the PSPICE schematic used to study the operation of a VFD with

an ungrounded supply. A set o f VFDs are connected in parallel and a fault is simulated in

the top arrangement. VFDi (top) feeds an induction motor, represented by a balanced Y-

connected R-L circuit, with a phase-to-ground fault (fault impedance represented by

resistance Rf.) The parallel VFDz (bottom) is energized and unloaded; it is represented

only by its bridge rectifier and DC bus capacitors.

4.3.2 PSPICE Simulation and Results

Fig. 31 shows a three-phase ungrounded AC input rectified by a 6 -pulse diode bridge

rectifier to produce a DC voltage. The upper DC link consists o f two sets o f capacitor

banks (Ci and C2 ) connected in series between positive and negative terminals, while

another capacitor Cyi is connected between the midpoint of C 1-C2 and ground. A similar

arrangement is used in the lower VFD, with the two capacitors in series being C 3 and C 4 ,

and Cy2 being the capacitor connected to the ground. The capacitor bank is made of more

than one capacitor. For example, here each bank consists o f a parallel connection of a

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ZZA

200m

200m

CYI
üf^JOOm

vn> 2

"0

CY2

1
Fig. 31: PSPICE circuit of parallel arrangement o f VFDs

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number o f capacitors, each rated at 430 V. The number of capacitors in each bank

depends on the horsepower rating of the drive. Capacitors Cyi and Cv2 are called ‘Y-

c^acitors’ and are placed to reduce the common-mode EMI within either one o f the two

power capacitor banks.

The actual electrolytic capacitor banks Ci through C4 are each sized to 1.32 mF since

each bank consists o f four 330 pF capacitors connected in parallel. The ‘Y’ capacitors

C yi and C y 2 are sized to 0.22 pF. The PWM circuitry, that generates drive signals for the

switches modeling the IGBTs, is fed by a 30 Hz sine wave and a 4 kHz triangular wave.

During the simulations, some extremely large or extremely small resistors are placed to

avoid convergence problems in PSPICE. In addition, a resistor of 200 Q is placed in

series with the electrolytic capacitors during starting to limit the inrush current.

The simulation is started at t = 0 sec. After steady-state is reached, a phase-to-ground

fault (with R f = 0.0001 Q) is induced at t = 0.3 seconds. The faulted circuit is let to

continue operation for 8 seconds. Fig. 32 shows the resulting voltages across the

electrolytic capacitors in both drives. Note that the voltage across these capacitors

remains at nearly 340 V in the faulted drive, while it nearly doubles in the un-faulted

drive. Fig. 33 shows the corresponding voltage across the “Y” capacitor Cy2 of the un­

faulted VFD2 . This voltage switches between ± 340 V immediately after the fault occurs,

then decays as the voltage builds across C 3 and C 4 beyond operating levels. Fig. 34 shows

the voltage across the capacitor C yi and there is no effect due to the occurrence o f the

fault.

Fig. 35 and Fig. 36 show a closer look at the variation in voltage across the

electrolytic capacitors o f the faulted drive and the un-faulted drive at 0 .8 seconds.

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respectively. The voltage across Ci and C2 is periodic and fluctuates between 320 V and

340 V due to motor loading, while the slight distortion within each pulse is due to the

charge and discharge o f the “Y” c^acitor through the fault resistance. On the other hand,

the voltage across C3 and C4 exhibits a step increase at each alternate inverter switching.

Fig. 37 and Fig. 38 show the corresponding voltage across the “Y” capacitors of both

drives during the same 4-millisecond time window. These graphs clearly indicate that the

voltage across Cyi in VFDi is periodic and stable, while the voltage across Cyz in VFD2

is non-periodic and decays according to Fig. 33.

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I .ts t . 9S S .tf #.#5 5 #5

Fig. 32: Voltage across the electrolytic capacitors

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Fig. 33: Voltage across capacitor Cy2 of un-faulted drive

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Fig. 34: Voltage across capacitor Cyi of faulted drive

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•• 2 .

Fig. 35: Voltage across Ci and C2

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sas sti.M s tti.s in .S K

Fig. 36: Voltage across C3 and C4

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Fig. 37; Voltage across Cyi - closer view

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«#*

Fig. 38: Voltage across Cyz - closer view

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CHAPTER 5

CONCLUSIONS

The results that are obtained from simulations, explained in chapter 4, are discussed

in this chapter.

5.1 Task I

Due to the capacitor in the DC bus taking in energy from the power system four times

per cycle, a highly distorted double hump discontinuous current waveform is formed.

Line reactors or chokes when placed in the three phases on the AC side reduce the rate at

which the capacitor charges and hence result in a less distorted and continuous current

waveform.

Fig.7, Fig. 13 and Fig. 19 show the current waveforms before it enters the VFD under

power system disturbances like sag, swell and transient respectively. It can be commonly

observed that the current waveform is smooth and continuous in the presence of line

reactors compared to the distorted current waveform, in the absence of line reactors.

Looking at the THD of current entering the VFD, there is an overall decrease with the use

o f line reactors. Thus, the quality of power that is supplied to the VFD from the supply

side with power system disturbances is much higher with line reactors than without line

reactors.

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5.2 Task ü

With an increasing use of IGBT inverters in most VFDs, fast switching resulting in

rise of dv/dt is inevitable. An output reactor when placed helps to reduce the effect of

dv/dt, thus reducing the stress on motor insulation. Also, higher motor cable lengths

result in a higher reflected voltage from the motor side, resulting in doubling of voltage at

the motor terminal. The addition of an output reactor also helps to reduce the voltage

over-shoot at the motor terminals.

It is observed from Figures 25 - 27 that with increasing motor cable lengths, the

voltage overshoot for each cycle is higher at the motor terminals. However, due to the

presence of output reactors, voltage overshoot at the motor terminal is reduced

considerably. Further, Fig. 28 gives a closer view of cables of different lengths over a

period of a few milliseconds. It can be clearly seen that the waveform is smooth for cable

of negligible length with an increase for the 100 ft. and 500 ft. cables.

5.3 Task IE

The use of an ungrounded supply with a parallel arrangement of VFDs is studied in

the presence of a fault. One might expect that the VFD supplying the faulted motor will

be damaged while the other VFD seemingly isolated from the faulted motor circuit will

not be affected. However, on simulating the problem, the results showed the opposite.

The switches of the three-phase inverter conduct at any given instant of time, when

each output terminal is connected to either the (+) DC bus or (-) DC bus. Therefore, the

inverter switches the fault resistance Rf from the (+) DC bus to the (-) DC bus at the

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inverter switching frequency. The impact on the VFDi (top) and VFD 2 (bottom) is

explained below;

5.3.1 Impact on VFDi

Since both Rf and C yi are connected to ground, the inverter shunts the series Cyi-Rf

circuit back and forth across the electrolytic capacitors Ci and C2 . The resulting basic

circuit is shown in Fig. 4.1 where the inverter is represented by switches Swi and Sw2 -

Therefore, as far as VFDi is concerned, a phase-to-ground fault at the inverter output

terminals imposed a PWM voltage of ± 340 V across Cyi with a charge and discharge

time constant can be approximated by RfCyi since the size o f Cyi is three orders of

magnitude smaller than the size o f Ci and C2 . The fault causes a minimal distortion in the

voltage across the electrolytic capacitors.

5.3.2 Impact of VFD 2

A phase-to-ground fault at the output terminals of VFDi leads to a different situation

for the parallel drive VFD2 . In here, the series Cy2 -Rf circuit forms a loop with either C3

or C 4 (as the inverter o f the faulted drives switches the faulted phase between the (+) and

(-) DC bus) and the rectified three-phase source o f nearly 650 V. A simplified equivalent

circuit is depicted in Fig. 4.2 where the “Y” capacitor C y2 discharges through C4 (when

Swi is closed), and charges through C3 (when Swz is closed). Hence, each switching

action adds charge to one o f the electrolytic capacitors, till each reaches a steady voltage

of 650 V, which is nearly 60% higher than their rated value of 430 V. This is clearly a

case o f severe over-voltage that led to an internal flashover, and hence VFD failure.

The failure is traced to the presence of a common mode capacitor filter that is

connected between the DC link midpoint and ground (i.e., the “Y” capacitor). This

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particular capacitor forms a circuit loop through the fault impedance, and results in severe

over-voltage (in excess o f 60% above rated value) across each o f the electrolytic

capacitor banks o f adjacent drives. This over-voltage leads to tank rupture or explosion

that can cause complete VFD failure. To avoid such a serious problem, these “Y”

capacitors must be disconnected from the VFD circuitry when applying them in

ungrounded distribution systems.

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(N

340 V SW1
680 V CY1

CN
340 V SW2

Fig. 1: Loop formation within VFDi during fault

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SW 1

Rf

680 V

C3

C 4 CY2

Fig. 2: Loop formation within VFDz during fault

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BIBLIOGRAPHY

[1] Philip K. S. Lim, Thomas .E. Wyatt and Clarence W. Wooddell, Power Quality
Considerations fo r Installing Sensitive Electronics Equipment-A utility's
Perspective, Power Electronics and Drive Systems, 1997.

[2] J. L. Duran-Gomez, P. N. Enjeti, Woo Byeong Ok, Effect o f Voltage Sags on


Adjustable-Speed Drives: A Critical Evaluation and an Approach to Improve
Performance, IEEE Transactions on Industry Applications, 1999.

[3] A. Van Zyl, R. S pee,, A. Faveluke., S. Bhowmik., Voltage Sag ride-through fo r


Adjustable-Speed Drives with Active Rectifiers, IEEE Transactions on Industry
Applications, 1998.

[4] J. L. Duran-Gomez, P. N. Enjeti, A New approach to Mitigate Nuisance Tripping


o f PWM ASDs due to Utility Capacitor Switching Transients (CSTs), IEEE
Transactions on Power Electronics, 2002.

[5] Mark McGranaghan, Controlling Harmonics locally in Commercial facilities’,


ECMWEB- Aug 01, 2003.

[6 ] F. Abrahamsen, A. David, Adjustable Speed Drive with Active Filtering


Capability fo r Harmonic Current Compensation, Power Electronics Specialists
Conference, 1995.

[7] A. Domijan Jr., Embriz-Santander, Harmonic mitigation techniques fo r the


improvement o f power quality o f adjustable speed drives (ASDs), Applied Power
Electronics Conference and Exposition, 1990.

[8 ] E. F. El-Saadany, M. M. A. Salama., PWM based ASD harmonic suppression


utilizing reactance one-port compensator. Power Engineering Society Summer
Meeting, 2001.

[9] John M. Houdek, Line Reactors and VFDs, ECMWEB-May 1, 2002.

[10] S. Lee, J. Choi., H. Hong., Power Quality Enhancement in Distribution Line using
Series Compensator, Proceedings of Power System Technology, 2000.

[11] E. P. Wiechmann, R. P. Burgos, Voltage Swell ride-through capability with


enforced, fixed Input Voltage fo r PWM Current-Source Rectifier, lECON 2002.

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[12] R. Kerkman, D. Leggate, G. Skibinski, Interaction o f Drive Modulation and
Cable Parameters on AC Motor Transients, IEEE Transactions on Industry
Applications, 1997.

[13] Kim Han-Jong, Lee Geun-Ho; Jang Cheol-Ho; Lee Jea-Pil, Seo Jong-Ho, Cost-
effective Design o f an Inverter Output Reactor in ASD applications. Industrial
Electronics Society, 1999.

[14] L. Palma, P. Enjeti, An Inverter Output Filter to Mitigate dv/dt Effects in PWM
Drive Systems, Applied Power Electronics Conference and Exposition, 2002.

[15] A. von Jouanne., P.N. Enjeti, Design considerations fo r an inverter output filter to
mitigate the effects o f long motor leads in ASD applications, IEEE Transactions
on Industry Applications, 1997.

[16] E. Persson, Transient Effects in Application o f PWM Inverters to Induction


Motors, IEEE Transactions on Industry Application, 1992.

[17] E. Persson, Fast Switching Adjustable Speed Drives, Power Engineering Journal,
2000.

[18] Hongfei Ma, Dianguo Xu, Research o f inverter output filters fo r PWM drives.
Electrical Machines and Systems, 2001.

[19] Motor Lead Length Issues fo r IGBT PWM Drives, White paper, Rockwell
Automation-Reliance Electric, 1995.

[20] Fundamentals o f Inverter-Fed Motors, White Paper, Baldor Electric Company.

[21] H. Zhang., K. L. Butler, N. D. R. Sarma, Simulation o f Ungrounded Shipboard


Power Systems in PSPICE, Proc. of 1998 Midwest Symposium.

[22] M. M. Venkateswaran, D. Lunder, Y. Baghzouz, Failure Mechanism o f Variable


Frequency Drives in Ungrounded Distribution Systems, Proc. of TEF.E-
Intemational Conference on Harmonics and Power Quality, 2004.

[23] D. Rendusara, P. Enjeti, A Method to Reduce Common Mode and Differential


Mode dv/dt at the Motor Terminals in PWM Rectifier/PWM Inverter Type
Adjustable Speed Drive Systems, Applied Power Electronics Conference and
Exposition, 1998.

[24] NEMA Publication, Application Guide fo r AC Adjustable Speed Drive Systems,


2001 .

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[25] M a H ongfei, X u D ianguo, C hen X iyou, Ciu Bo, A N ew C om m on-M ode
Sinusoidal In verter O utput Filter, IEEE P ow er E lectronics Specialists
C onference, 2002.

[26] K. M . H ink, L o w C ost M o to r P rotection F ilters f o r P W M D rive A pplications,


P o w er Q uality C onference, 1999.

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VITA

Graduate College
University of Nevada, Las Vegas

Mahesh M. Venkateswaran

Home Address:
4214 Grove Circle, Apt#l
Las Vegas, NV 89119

Degrees:
Bachelor of Engineering, Electronics and Communication, 2001
University of Madras, India

Thesis Title: Power Quality Issues related to Variable Frequency Drives

Thesis Examination Committee:


Chairperson, Dr. Yahia Baghzouz, Ph. D., P.E.
Committee Member, Dr. Emma Regentova, Ph. D.
Committee Member, Dr. Sahjendra Singh, Ph. D.
Graduate Faculty Representative, Dr. Robert Boehm, Ph. D., P.E.

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