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MCA (Revised)
'14 Term-End Examination
December, 2011
MCS-012 : COMPUTER ORGANISATION &
ASSEMBLY LANGUAGE PROGRAMMING
MCS-012 1 P.T.O.
MCS-012 2
MCS-012 3
MCA (Revised)
condition, if any:
(ii) — 59 + 75
+ 27 + 101
(iv) — 75 + 69
MCS-012 1 P.T.O.
MCS-012 2
MCS-012 3 P.T.O.
MCS-012 4
MCA (Revised)
Term-End Examination
December, 2012 15316
MCS-012 : COMPUTER ORGANISATION &
ASSEMBLY LANGUAGE PROGRAMMING
MCS-012 1 P.T.O.
2 C S--112 2
MCS-012 3
MCS-012 4 P.T.O.
MCS-012 5
MCA (Revised)
Term-End Examination
O June, 2013
O
MCS-012 : COMPUTER ORGANISATION &
ASSEMBLY LANGUAGE PROGRAMMING
F(A, B, C) = E (1, 3, 4, 5, 6, 7)
MCS-012 1 P.T.O.
MCS-012 2
(iv) DPI
MCS-012 3 P.T.O.
MCS-012 4
MCA (Revised)
Term-End Examination
N-
r-r) December, 2013
MCS-012 : COMPUTER ORGANISATION &
ASSEMBLY LANGUAGE PROGRAMMING
MCS-012 1 P.T.O.
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+ 13/2)/
Z= /10 •
MCS-012 3
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Term-End Examination
June, 2014
MCS-012 1 P.T.O.
MCS-012 2
MCS-012 3 P.T.O.
MCS-012 4
MCS-012 2
MCS-012 3 16,000
(i) 0.250
(ii) 8
MCS-012 1 P.T.O.
MCS-012 2
MCS-012 4 12,000
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MCS-012 1 P.T.O.
MCS-012 2
MCS-012 3 P.T.O.
MCS-012 4 19,000
MCS-012 1 P.T.O.
MCS-012
(i) Ri 4- Ri 9 R2 Exclusive OR
MCS-012 3 P.T.O.
MCS-012 4
(i) Microinstruction
(ii) Stack
(iii) Control memory
(iv) INT 21h in 8086 microprocessor
(v) Buffer register
MCS-012 5 P.T.O.
MCS-012 6
X=B * C/D+(E— F)
MCS-012 7 12,000
MCS-012 1 P.T.O.
MCS-012 2
MCS-012 3 P.T.O.
MCS-012 4
MCS-012 5 15,000
(i) — 20.75
(ii) + 32.50
MCS-012 1 P.T.O.
L
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(i) D flip-flop
(ii) Read Only Memory (ROM)
Opcode in an instruction
(iv) Parity bit
(b) List the differences between the following : 5
MCS-012 4 10,000
MCS-012
MCS-012 3 P.T.O.
MCS-012 4 12,000
MCS-012 4 14,000
F (A/B) + (C * D) E
MCS-012(S) 5 10,500
8314.2
No. of Printed Pages : 7 MCS-012
MCA (REVISED)BCA (REVISED)
Term-End Examination
June, 2019
(Weightage 75%)
Note : Question No. 1 is compulsory and carries 40
marks. Attempt any three questions from the
rest.
(A-7) P. T. 0.
[2] MCS-012
(A-7)
fig] MCS-012
(A-7) P. T. O.
[41 MCS-012
flip-flop. 4
Assembly
Instruction Type
Instructions
instruction
instruction
(A-7)
I5 MCS-012
instruction
instruction
(5) STORE
(6) XOR
following operations ? 4
(A-7) P. T. 0.
[6] MCS-012
(i) Indexed
(iii) Direct
(A-7)
17l MCS-012
MCS-012 10,000
(A-7)
422144
MASTER OF COMPUTER
APPLICATIONS/BACHELOR OF
COMPUTER APPLICATIONS
(REVISED) (MCA/BCA)
Term-End Examination
December, 2019
MCS-012 : COMPUTER ORGANIZATION AND
ASSEMBLY LANGUAGE PROGRAMMING
Weightage : 75%
[2] MCS-012
(ii) (- 73) + 84
(iii) 57 + 71
I3 MCS-012
050A 2A3F
R2
1 0009
(All values are in hexadecimal)
P. T. O.
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[4] MCS-012
(i )
Write a program using 8086 assembly
language that finds the sum and average of
two byte values stored in memory locations
Xi and X2. The sum should be stored in AX
register and average in BX register. 6
I 5 MCS-012
P. T. O.
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[6] MCS-012
diagram. 6
(i) SCSI
17/ MCS-012
P. T. O.
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8 MCS-012
(i) XCHG
CMP
MCS-012 12,000
MASTER OF COMPUTER
APPLICATION/BACHELOR OF
COMPUTER APPLICATION
(REVISED) (MCA/BCA)
Term-End Examination
June, 2020
MCS-012 : COMPUTER ORGANIZATION AND
Weigthage : 75%
40 marks.
rest.
[2] MCS-012
(135)10 to hexadecimal
Boolean function :
F = (A . B + C) + (A . C) + (13 .A .
function. 5
your answer. 6
useful ? 3
register. 6
P. T. O.
DatSegmn():IFh
diagram(s).
6
(c) Consider the Registers RI having value
operation is allowed.
diagram. 6
P. T. O.
63 MCS-012
printing technology : 6
this multiplexer. 6
17 I MCS-012
bits : 4
bytes ?
8x 2
= 20
(a) Assembler
MCS-012
EXE programs
Shift instruction
D flip-flop
Memory interleaving
Unicode
Counters
6520
MCS-012-
Weightage : 75%
(i) – 63 + 74
Lot-I P. T. O.
[2] MCS-012
(ii) – 128 + 39
(iii) + 86 + 42
[3] MCS-012
Add AC, A
P. T. O.
[4] MCS-012
(i) RAID
[5] MCS-012
help of an example. 3
microprocessor : 6
(i) CMP
(ii) JMP
(iii) RCL
(iv) SHR
P. T. O.
[6] MCS-012
in terms of inputs. 5
(i) DVD-ROM
(ii) Printer
(iii) Scanner
[7] MCS-012
MCS–012 12,040
P. T. O.
MCS-012 1 P.T.O.
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MCS-012 2
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MCS-012 3 P.T.O.
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[2] MCS-012
GRADUATE DIPLOMA IN COMPUTER form by using K-map. Also draw the logic
diagram of the simplified function using
APPLICATIONS (MCA/BCA/PGDCA)
AND-OR-NOT gates : 5
Term-End Examination
F (A, B, C, D) = (0, 2, 5, 7, 13, 15)
December, 2021
(c) Consider a DRAM chip is a square memory
MCS-012 : COMPUTER ORGANIZATION AND
array of size (1024 × 1024 × 8) bits. 4
ASSEMBLY LANGUAGE PROGRAMMING
(i) What would be the number of address
Time : 3 Hours Maximum Marks : 100
lines for this memory array ?
Weightage : 75%
(ii) How many input or output data bit
Note : Question No. 1 is compulsory and carries lines will be required for this chip ?
40 marks. Attempt any three questions from (iii) What is the need of refresh counter
the rest. which is part of a DRAM chip ?
1. (a) Perform the following operations using 8- (iv) How many such chips will be needed
bit signed 2’s complement notation. Also to make a memory of 4 MByte ?
indicate overflow, if it occurs : 5 (d) What is the need of an I/O interface in a
(i) Subtract (– 56) and (+ 72) computer ? 3
P. T. O.
(e) What is FAT in the context of a disk ? How (i) Explain with the help of an example, how a
Register (MAR), Memory Buffer Register (c) Explain the process of error detection and
(MBR) and Program Counter (PC). 4 correction with the help of a diagram. 4
(h) Write a program in 8086 assembly (d) Draw logic diagram to show how NOR gate
language that compares the two byte can be used to implement NOT, OR and
locations. The bigger of the two values is (e) Draw the logic diagram of T flip-flop.
put in AL register. 5 Explain its working and make
P. T. O.
make the excitation table for T flip-flop. 5 (vi) Daisy chaining scheme of interrupt
machine having 64 byte memory with 4. (a) Given the content of register R1 as
cache memory of size 8 byte. Assume the 10101100, and register R2 as 00110110.
block size of main memory as 1 byte and Perform the following operations on
size of each cache line as 1 byte. Make and register R1 using register R2 : 4
state suitable assumption, if any. 5
(i) Selective set R1
(b) Differentiate between programmed I/O and
(ii) Selective clear R1
DMA techniques of I/O. 5
(iii) Selective complement R1
(c) Explain any five of the following in the
(iv) Mask operation on R1
context of I/O organisation and
(b) What is an Instruction Pipeline ?
technologies : 5×2=10
Assuming that an instruction pipeline has
(i) Access time of magnetic disk
only three stages as :
(ii) Disk layout of CD-ROM and its
Instruction Fetch (IF), Decode (DE) and
advantages
Execute (EX), draw a diagram that shows
(iii) Scan codes in the context of Keyboard
execution of 4 consecutive instructions
(iv) Classification of printers
using this pipeline. 4
P. T. O.
(c) Compare the features of horizontal micro- (c) Explain the following instructions of
instruction to vertical micro-instructions. 8086 microprocessor with the help of one
Draw the diagram for a vertical micro- example each : 8
instruction. 5
(i) ROL
(d) List any four characteristics of RISC
(ii) DEC
machine. 4
(iii) XCHG
(e) What are the different components of an
instruction ? Explain with the help of an (iv) XOR
5. (a) How can DOS function call be used to read program in the context of 8086
of an example. 4
P. T. O.
MCS-012 1 P.T.O.
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MCS-012 3 P.T.O.
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MCS-012 5 P.T.O.
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