22bce0161 VL2023240505539 Ast06
22bce0161 VL2023240505539 Ast06
22bce0161 VL2023240505539 Ast06
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Lab Notebook
Your notebook must be clearly labelled on the cover with the following
information:
Course Name: Microcontroller and Microprocessor
Course Code: BECE204P
Name: Sheriff Singh Bhullar
Register No: 22BCE0161
Slot/Batch Timing:
Lab faculty Name:
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Lab Record
Aim
Tool Required
Relevant Theory or Diagram if require
Assembly language program (ALP) Code
Output{Screen Shot}(Result)
Conclusion
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Lab Assessment - 6
1. Write a program that continuously get 8-bit data from P0 and sends it to
P1 while simultaneously creating a square wave of 200 μs period on pin
P2.1. Use timer 0 to create the square wave. Assume that XTAL = 11.0592
MHz.
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1. AIM:Write a program that continuously get 8-bit data from P0 and sends
it to P1 while simultaneously creating a square wave of 200 μs period on
pin P2.1. Use timer 0 to create the square wave. Assume that XTAL =
11.0592 MHz.
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CODE:
ORG 0000H
LJMP MAIN ;
ORG 000BH ;
CPL P2.1 ;
RETI
ORG 0030H ;
MAIN: MOV TMOD, #02H ;
MOV P0, #0FFH ;
MOV TH0, #-92 ;
MOV IE, #82H ;
SETB TR0 ;
BACK: MOV A, P0 ;
MOV P1, A ;
SJMP BACK ; END
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THEORY:
1. Memory space allocated to the interrupt vector table should be avoided. Place all the initialization codes in
memory starting at 30H. The LJMP instruction is the first instruction that the 8051 executes when it is powered
up. LJMP redirects the controller away from the interrupt vector table.
2. The ISR for timer 0 is located starting at memory location 000BH since it is small enough to fit the address
space allocated to this interrupt.
3. Enable timer 0 interrupt.
4. While the P0 data is brought in and issued to P1 continuously, whenever timer 0 is rolled over, the TF0 flag
is raised and the microcontroller gets out of the BACK loop and goes to 000BH to execute the ISR associated
with timer 0.
5. In the ISR for timer 0, notice that there is no need for a CLR TF0 instruction before the RETI instruction.
This is because the 8051 clears the TF flag internally upon jumping to the interrupt vector table.
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OUTPUT:
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AIM:Write a program using interrupts to do the following:
(a) Receive data serially and sent it to P0,
(b) Have P1 port read and transmitted serially, and a copy given to P2,
(c) Make timer 0 generate a square wave of 5kHz frequency on P0.1.
Assume that XTAL-11,0592. Set the baud rate at 4800.
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CODE:
ORG 0000H
LJMP MAIN
;----------------------------- ISR for timer 0
ORG 000BH
CPL P0.1 ;toggle P0.1
RETI ;return from ISR
;------------------------------
ORG 0023H ;Jump to serial ISR
LJMP SERIAL
;-----------------------------
ORG 0030H
MAIN: MOV P1,#0FFH ;make P1 input port
MOV TMOD,#22H ;timer 1, mode 2
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MOV TH1,#-6 ; 4800 baud rate
MOV SCON,#50H ; 8-bit,1 stop,ren enabled
MOV TH0,#-92 ;5kHz wave
MOV IE,#10010010B ;serial interrupt enabled
SETB TR1 ;start timer 1
SETB TR0 ;start timer 0
BACK: MOV A,P1 ;read data
MOV SBUF,A ; give a copy of SBUF
MOV P2,A ;send it to P2
SJMP BACK ;loop
;------------------------------
ORG 100H
SERIAL: JB TI, TRANS ;jump if T1 ishigh
MOV A,SBUF ;otherwise high due to recieve
MOV P0,A ;send serial data to P0
CLR RI ; clear RI
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RETI ;return from ISR
TRANS: CLR TI ;clear TI
RETI ;return from ISR
END
THEORY :
In the above program RI and TI is cleared in the ISR before RETI instruction. This is necessary since there is
only one interrupt for both receive and transmit, and the 8051 does not know who generated it. Hence
programmer has to clear the flag in the ISR. Whereas if the interrupt is due to timers or external hardware
interrupt, 8051 will clear the flag. The TCON register holds the four of the interrupt flags and SCON register
has the RI and TI flags.
OUTPUT:
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13
On pressing A
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15
On pressing I
16
ON pressing S
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