MODULE 4

MODULE IV
Micro System fabrication – Photolithography – Ion implantation- Diffusion – Oxidation – Chemical
vapour deposition – Etching
Overview of Micro manufacturing – Bulk micro manufacturing, Surface micro machining , LIGA
process –Microstereo lithography

Microsystem fabrication

To fabricate any solid device component, one must first select materials and adequate
fabrication method. For MEMS and microsystems components, the sizes are so small that no
machine tools, e.g. lathe, milling machine, drilling press, etc. can do the job. There is simply no
way one can even grip the work piece. Consequently, radically different techniques, non-
machine-tool techniques need to be used for such purpose. Most physical-chemical processes
developed for ―shaping‖ and fabricating ICs are adopted for microsystems fabrications. This is
the principal reason for using silicon and silicon compounds for most MEMS and microsystems
– because these are the materials used to produce ICs. Various microfabrication process are :

o Photolithography
o Ion implantation
o Diffusion
o Oxidation
o Chemical vapor deposition
o Physical vapor deposition (Sputtering)
o Deposition by epitaxy
o Etching

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Photolithography

Photolithography, one of the most important steps in microfabrication, appears to be the

only viable way for producing high precision patterning on substrates in microscale.
Photolithography process involves the use of an optical image and a photosensitive film to
produce desired patterns on a substrate. The ―optical image‖ is originally in macro scale, but is
photographically reduced to the micro-scale to be printed on the silicon substrates.

The general procedure of photolithography is shown below

Fig: General procedure of photolithography

The substrate can be a silicon wafer, silicon dioxide or silicon nitride. A photoresist is
first coated onto the flat surface of the substrate. The substrate with photoresist is then exposed
to a set of lights through a transparent mask with the desired patterns. Masks used for this
purpose are often made of quartz. Patterns on the mask are photographically reduced from
macro- or mesosizes to the desired microscales. Photoresist materials change their solubility
when they are exposed to light. Photoresists that become more soluble under light are classified
as positive photoresists, whereas the negative photoresists become more soluble under the

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shadow. The exposed substrate after development with solvents will have opposite effects in
these two types of photoresists. The retained photoresist materials create the imprinted patterns
after the development (step (a)). The portion of the substrate under the shadow of the
photoresists is protected from the subsequent etching (step (b)). A permanent pattern is thus
created in the substrate after the removal of the photoresist (step (c)). Photolithography for
MEMS and 16icrosystems needs to be performed in a class-10 clean room or better.

Photoresists can be mainly classified into

a) Positive photoresists : There are two kinds of positive resists: (1) the PMMA
(polymethymethacrylate) resists, (2) the two-component DQN resist involving
diazoquinone ester (DQ) and phenolic novolak resin (N).

Positive resists are sensitive to UV lights with the maximum sensitivity at a

wavelength of 220 nm. The PMMA resists are also used in photolithography involving
electron beam, ion beam and x-ray. Most positive resists can be developed in alkaline
solvents such as KOH (potassium peroxide), TMAH (tetramethylammonium hydroxide),
ketones or acetates.
b) Negative photoresists : Two popular negative resists are (1) Two-component bis (aryl)
azide rubber resists, and (2) Kodak KTFR (azide-sensitized polyisotroprene rubber).

Negative resists are less sensitive to optical and x-ray exposures but more sensitive to
electron beams. Xylene is the most commonly used solvent for developing negative
resists.
In general, positive resists provide more clear edge definitions than the negative
resists. So, it is a better option for high resolution patterns for micro devices.

Fig: profiles of lines from photolithography

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Photoresist application

The process begins with securing the substrate wafer onto the top of a vacuum chuck. A
resist puddle is first applied to the center portion of the wafer from a dispenser. The wafer is
then subjected to high speed spinning at a rotational speed from 1500 to 8000 rpm for 10 to 60
seconds. The speed is set depending on the type of the resist,the desired thickness and
uniformity of the resist coating. The centrifugal forces applied to the resist puddle cause a
uniform spread of the fluid over the entire surface of the wafer. Typically the thickness is
between 0.5 – 2 µm with ±5 nm variation. For some microsystems applications, the thickness
had been increased to 1 cm. The spinner is stopped once the desired thickness is reached.

Fig: Vacuum chuck

A common problem is the bead of resist that occurs at the edge of the wafer as in figure.
The uniformity of the coating can be increased and the thickness of the edge beads can be
reduced by controlling the spin speed, often by spinning slowly at first, followed by high speed
spinning.

Fig: Photoresist coating with edge beads

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 MODULE 4

Photoresists are sensitive to light with wavelength ranging from 300 to 500 nm. The
most popular light source for photolithography is the mercury vapor lamps. This light source
provides a wavelength spectrum from 310 to 440 nm. Deep UV (ultra violet) light has a
wavelength of 150-300 nm and the UV light source has wavelengths between 350-500 nm. In
special applications for extremely high resolutions, x-ray is used. The wavelength of x-ray is in
the range from 4 to 50 Angstrom.

Photoresist development

The same spinner may be used for resist application may be used for the development of
negative resists. The exposed wafer substrate is placed on the vacuum chuck and is spun at a
high speed with spray of solvent, eg., xylene, from the nozzle. A rinsing process with distilled
water follows the development.

The positive resist development is more complicated than negative resists that requires a
more controlled chemical reaction than just washing. A developer agent such as KOH or TMAH
is projected onto the wafer surface in streams of mist at low velocity. After the development, the
wafer is rinsed with a spray of distilled water.

Photoresist removal and postbaking

After development, and the desired pattern in created in the substrate, a descumming
process takes place. The process uses mild oxygen plasma to remove the bulk of photoresist.

Postbaking, at 120oC for 20 minutes, is necessary to remove the residue of solvent.

Etching will remove all residue photoresist.

Ion Implantation

It is a physical process used to dope silicon substrates. It involves ―forcing‖ free atoms,
such as B or P, with charged particles (i.e., ions) into a substrate, thereby achieving imbalance
between the number of protons and electrons in the resulting atomic structure. The ions must
carry sufficient kinetic energy to be implanted into the Si substrate. Thus ion implantation

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procedure always involves the acceleration of the ions in order to gain sufficient kinetic energy
for the implantation.

The schematic arrangement is shown below

Fig: Ion implantation on a substrate

The ions to be implanted are created in an ion source, in which an ion beam is formed.
The ions beam is then led into a beam controller in which the size and direction of the beam can
be adjusted. The ions in the beam are the energized in the acceleration tube, or accelerator, in
which the final energy with which the ions will impact the substrate surface is attained. The ions
in the beam are focused onto the substrate, which is protected by a shield, or mask, usually made
of SiO2. The highly energized ions enter the substrate and collide with the electrons and nuclei of
the substrate. The ions will transfer all their energy to the substrate upon collision, and finally
come to a stop at a certain depth inside the substrate.

The distribution of the implanted ions in silicon substrate is shown below

Fig: Dopant distribution through a shield

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Unlike diffusion process, ion implantation does not require high temperature for the
process. This offers a major advantage, as little thermal stress or strain will be introduced
between the substrate and the shield. The disadvantage is that dopant distribution in the substrate
is less uniform. The dopant concentration N(x) can be determined as

Table: Ion implantation of common dopants in silicon

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MODULE 4

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Diffusion

The diffusion process is often used in microelectronics for the introduction of a

controlled amount of foreign materials (dopants) into the selected regions of another material.
Unlike ion implantation, diffusion is a slow doping process. It is also used as thin film buildings
in microelectronics and microsystems. Diffusion takes place at elevated temperatures. As
illustrated in Figure, the atoms of the dopant gas move (diffuse) into the crystal vacancies, or
interstitials, of the silicon substrate. The profile of the spread of dopant in silicon by diffusion is
different from that by ion implantation.

The physics of the diffusion process is similar to that of heat conduction in solids. The
applicable mathematical model for diffusion is Fick's law, which is similar to the Fourier law for
heat conduction in solids. Fick's law gives the dopant flux in the substrate in the x direction
during a diffusion process. The Fick’s law for the diffusion of foreign atoms into the substrates
of microsystems is

∂𝑁(𝑥)
𝐹 = −𝐷
∂𝑥

where F = dopant flux, the number of dopant atoms passing through a unit area of the substrate
in a unit time (atoms/cm2-sec)

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 MODULE 4

D = diffusion coefficient or diffusivity, of the dopant to the substrate (cm2/sec)

N = dopant concentration in the substrate per unit volume (atoms/cm3)

The distribution of dopant in the substrate at any given time during the diffusion process
can be obtained by the solution of Ficks diffusion equation,

∂𝑁(𝑥, 𝑡) 𝛿2𝑁(𝑥, 𝑡)
=𝐷
∂𝑡 𝛿𝑥2

The solution of above equation depends on the initial and boundary conditions involved in the
process.

Initial condition (t = 0): N(x,0) = 0, there is no impurity in the substrate when the diffusion
process begins.

Boundary conditions (at x = 0 and ∞):

1) N(0,t) = Ns, which is the concentration at the surface exposed to the gaseous dopant.
2) N(∞, t) = 0, i.e.,diffusion of foreign substance is highly localized, and the concentration
far away from the exposed surface is negligible.

The solution of the diffusion equation with these conditions is:

𝑥
𝑁(𝑥, 𝑡) = 𝑁𝑠 erfc [ ]
2√𝐷𝑡

where erfc(x) is the complementary error function, which is equal to :

𝑥
2 2
erfc (𝑥) = 1 − erf(𝑥) = 1 − ∫ 𝑒 −𝑦 𝑑𝑦
√𝜋 0

The term √𝐷𝑡 is the diffusion length. The diffusivity D (μm2/h) for a silicon with common
dopants can be obtained by the formula

ln (√𝐷 = 𝑎𝑇′ + 𝑏

The temperature T ' =1000/T with T = diffusion temperature in K.

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The constants a and b for common dopants can be obtained from the below table

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Oxidation

Oxidation is a very important process in both microelectronic and microsystem

fabrication. There are several ways silicon dioxide can be produced on substrate. The least
expensive way to produce SiO2 film on the Si substrate is by thermal oxidation. Chemical
reactions used in this process are as follows

Si (solid) + O2 (gas) → SiO2 (solid)

Si (solid) + 2H2O (steam) → SiO2 (solid) + 2H2 (gas)

Silicon dioxide is produced by thermal oxidation in an electric resistance furnace.

Atypical furnace consists of a large fused quartz tube as illustrated in Figure.

Fig: Furnace for thermal oxidation

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Resistance heating coils surround the tube to provide the necessary high temperature in
the tube. The furnace tube used in industry is in the order of 30cm in diameter and 3m in length.
In the thermal oxidation process, wafers are placed in fused quartz cassettes that are pushed into
the preheated furnace tube at a temperature in the range of 900 to 12000C. Oxygen is blown into
the tubular furnace for the oxidation of wafer surfaces. Often, steam is used instead of oxygen for
accelerated oxidation. The timing, temperature, and gas flow are strictly controlled in order to
achieve the desired quality and thickness of the SiO2 film.

The growth of an oxide layer on a silicon substrate is primarily a thermal diffusion

process. The silicon substrate is first exposed to the oxidizing species such as oxygen in dry air
or wet steam in a hot furnace. The oxygen molecules in the oxidizing species begin to diffuse
into the surface of the "fresh" silicon wafer as shown in Figure (a) and a SiO 2 layer (shown as a
darker gray area in Figure (b)) is formed, with SiO2 molecules in solid circles in the figure.
While the drive from the oxidizing species continues, the SiO 2 molecules that are already in the
oxide layer diffuse and chemically react with the silicon molecules, crossing the layer's boundary
as in Figure (c).

Figure: The kinetics of SiO2 in silicon substrates

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Thus the process can be viewed as one that begins with simple diffusion of oxidizing
species into a silicon substrate. It is soon coupled with the diffusion of the same species into
SiO2. Meanwhile, there is a simultaneous diffusion of SiO2 molecules and the chemical reaction
between the SiO2 molecules and the silicon substrate, which creates new SiO2/ silicon
boundaries.

Because of highly complex oxidation process, the prediction of the growth of an oxide
layer over the silicon substrate is not easy. The following expressions can be used to estimate the
growth of oxide layers over the silicon substrate in units of micrometers.

 𝑥 = 𝐵 (𝑡 + 𝑟) for small 𝑡 (eq. 1)

𝐴

The constant B/A is called the linear rate constant,

𝐵
log ( ) = 𝑎𝑇′ + 𝑏
𝐴

 𝑥 = √𝐵(𝑡 + 𝑟) for large 𝑡 (eq. 2)

The constant B is called as parabolic rate constant

ln(𝐵) = 𝑎𝑇′ + 𝑏

where T’ = 1000/T, with temperature T in Kelvin, K, x is the thickness of the oxide layer in the
Si substrate in micrometers at time t, in hours. A and B are constants, and the parameter τ can be

𝑑2 + 2𝐷𝑑0
( 0 ) 𝑁1
𝑟= 𝑘𝑠
2𝐷𝑁0

D = diffusivity of oxide in silicon,

do = initial oxide layer (∼ 200 A0 in dry oxidation, = 0 for wet oxidation)

ks = surface reaction rate constant

No = concentration of oxygen molecules in the carrier gas.

N1 = number of oxidizing species in the oxide

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The 𝑟 represents the time coordinate shifts to account for the initial oxide layer, do. For wet
oxidation, or in the case do=0, 𝑟 = 0.

The linear nature of equation (1) reflects the growth of the oxide layer in the early stage
of oxidation. However, when the layer thickness increases, the coupling effect of diffusion and
chemical reaction becomes dominant and the growth of the layer becomes nonlinear.
Consequently equation (2) is a more realistic way for estimating the thickness of the oxide layer.

Table: Coefficients for determining the rates of oxidation in silicon

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Chemical vapour deposition

Chemical vapor deposition (CVD) is the most important process in microfabrication. It
is used extensively for producing thin films by depositing many different kind of foreign
materials over the surface of silicon substrates, or over other thin films that have already been
deposited to the silicon substrate. These thin films can be organic or inorganic. They include a
variety of metals such as Al, Ag, Au, W, Cu, Pt and Sn. The organic materials include Al2O3,
polysilicon, SiO2, Si3N4, piezoelectric ZnO, SMA TiNi, etc. CVD usually takes place at elevated
temperatures and in vacuum in high class clean rooms

Working principle

CVD involves the flow of a gas containing diffused reactants over the hot substrate
surface. The gas that carries the reactants is called ―carrier gas‖. The ―diffused‖ reactants are
foreign material that needed to be deposited on the substrate surface. The carrier gas and the
reactant flow over the hot substrate surface, the energy supplied by the surface temperature

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provokes chemical reactions of the reactants that form films during and after the reactions. The
by-products of the chemical reactions are then vented. Thin films of desired composition can
thus be created over the substrate surface. Resistance heaters either surround the chamber or lie
directly under the susceptor that holds the substrate.

Fig: Horizontal reactor Fig: Vertical reactor

Chemical reactions in CVD

Silicon Dioxide: The chemical reactants that can be used to deposit silicon dioxide films are
SiCl4 , SiBr4 and SiH2Cl2. The carrier gas include O2, NO, NO2 and CO2 with H2 . The most
common reactant used for CVD is silane (SiH4) together with oxygen.

SiH4 + O2 → SiO2 + 2H2 at 400 – 500oC with Ea=0.4eV

Silicon Nitride (Si3N4): Ammonia is a common carrier gas for depositing silicon nitride on
silicon substrate. Three reactants that can be used to produce thin silicon nitride films are:

3SiH4 + 4NH3 → Si3N4 + 12 H2 at 700 – 900oC

3SiCl4 + 4NH3 → Si3N4 + 12 HCl at 850oC

3SiH2Cl2 + 4NH3 → Si3N4 + 6HCl + 6H2 at 650 – 750oC

The activation energy required for the above reactions is Ea= 1.8eV

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Polycrystalline silicon: It is essentially a pyrolysis process ( decomposition using heat) of Silane

at 600 – 650oC with Ea= 1.8eV.

Rate of deposition

CVD is the principal technique for building the desired 3-D geometry of many MEMS and
microsystems by means of thin film deposition. The rate of the build-up of these thin films
obviously is a concern to process design engineers.

Fig: Gas flow over substrate surface Fig: velocity profile and boundary layers

The reactant and the carrier gas flow over the hot substrate surface with a velocity V(x). A
boundary layer is created at the interface between the flowing carrier gas and the hot substrate
surface. The carrier gas (together with the reactant) diffuses through the boundary layer to reach
the hot substrate surface for chemical reactions. The thickness of the boundary layer thus has
significant effect on the rate of CVD

where Re(x) is the Reynolds number of the gas mixture which can be expressed as

where ρ: mass density of the gas mixture, L: characteristic length of the flow, and μ: dynamic
viscosity of gases.

The diffusion flux of the reactant, 𝑁 ⃗→ , across the boundary layer thickness in [atoms or
molecules/m2-s] can be expressed by the Fick’s law:

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 MODULE 4

𝐷
⃗→
𝑁= (𝑁𝐺 − 𝑁𝑆
𝛿
where D is the diffusivity in [cm2/s], and NG and NS are the respective concentration of the
reactant at the top of the boundary layer, G, and at the surface of the substrates, S,
[molecules/m3] which can be obtained from PV= nRT.

The reactant diffuses through the boundary layer, and forms the film by chemical reaction at the
hot surface of the substrate. The reaction rate at the substrate surface

⃗→ = 𝑘𝑠 𝑁𝑆
𝑁

where ks, the surface reaction rate constant which can be expressed as

where k’: constant depending on the reaction and the reactant concentration; Ea: activation
energy; k: Boltzmann constant, and T: absolute temperature.

⃗→ in terms of surface reaction rate ks is

The flux of the carrier gas and the reactant 𝑁

𝐷𝑁𝐺 𝑘𝑠
⃗→ =
𝑁
𝐷 + 𝛿𝑘𝑠

The rate of the growth of the thin film over the substrate surface, r, in [m/s] is
𝐷𝑁𝐺
For 𝛿𝑘𝑠 ≥ 𝐷, 𝑟 =
𝛾𝛿
𝑁𝐺𝑘𝑆
For 𝛿𝑘𝑠 « 𝐷, 𝑟 =
𝛾

where γ is the number of atoms or molecules per unit volume of thin film

a is the radius of atoms in meters

The rates of CVD is proportional to the following physical parameters:

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 MODULE 4

● The temperature, T3/2.

● The pressure of the carrier gas, P-1.

● The velocity of gas flow, V-1.

● The distance in the direction of gas flow, x1/2

Enhanced CVD

1. Low-Pressure CVD (LPCVD)

The rate of CVD is

A few possibilities exist to enhance the rate of CVD:

(1) To raise the process temperature, T would normally increase diffusivity, D. However, it will
harm the substrate.

(2) To decrease the velocity, V may enhance the rate r, but also results in lower Reynolds
number that will increase the boundary layer thickness, δ. These two effects may cancel out each
other. So, it is not a positive option.

(3) This leaves with the last option to decrease the pressure of the gas, P with expectation to
enhance the rate, r of the CVD.

Thus, LPCVD operates in vacuum at about 1 torr (1 mm Hg) has become a popular CVD process
in microfabrication. The CVD operates at atmospheric pressure is called APCVD.

2. Plasma Enhanced CVD (PECVD)

Both APCVD and LPCVD operate at elevated temperatures, which often damage the
silicon substrates. PECVD utilizes the radio frequency plasma to transfer energy into the
reactant gases, which allows the substrates to remain at lower temperature than in
APCVD or LPCVD.

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 MODULE 4

Fig: PECVD reactor

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 MODULE 4

Q: A CVD process is used to deposit SiO2 film over a silicon substrate. Oxygen is used as the
carrier gas in the chemical process and the reactant is diluted to 2% in the carrier gas. The CVD
process is carried out in a horizontal reactor as illustrated below: (neglect pressure variation)

Determine the following:

(1) The density of the carrier gas

(2) The Reynolds number of the gas flow

(3) The thickness of the boundary layer over the substrate surface

(4) The diffusivity of the carrier gas and reactant to the silicon substrates

(5) The surface reaction rate

(6) The deposition rate

Solution

1. The density of the carrier gas (ρ) = molar mass of carrier gas × molar density

Molar mass of O2 =32g

The ideal gas flow relationship is

𝑃1𝑉1 𝑇1
=
𝑃2𝑉2 𝑇2

Since P1 = P2, and

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 MODULE 4

V1 is the molar volume of gas at room temperature 293K, is 22.4×10-3 m3/mol, then molar
density of gas at 4900C or 763 K is

𝑑2 = ( 𝑇1) 𝑑1
𝑇2
293
=( ) 44.643=17.1433 mol/𝑚3
763
Since d1=1/V1= 44.643

32
p= =548.586 g/m3
17.1433
2.

L= diameter of tube = D= 200nm =0.2m

V=50mm/s=0.05m/s

μ =400×10-6 P ( for oxygen) =0.04g/m-s

3.

x = 150mm =0.15m
0.15
𝛿= = 0.01281m
√137.147

4.

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 MODULE 4

5.

6.

𝑁𝘎𝑘𝑆
For 𝛿𝑘𝑠 « 𝐷, 𝑟 = 5 , dilution factor η is also considered
𝛾

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Etching

Etching is one of the most important processes in microfabrication. It involves the

removal of materials in desired areas by physical or chemical means. The physical etching is
referred to as dry etching or plasma etching, whereas the chemical etching is referred to as wet
etching.

Chemical etching : It involves using solutions with diluted chemicals to dissolve substrates. Ex:
Diluted hydrofluoric (HF) solution is used to dissolve SiO2, Si3N4 and polycrystalline silicon
whereas potassium peroxide (KOH) is used to etch Si substrates. The rate of etching depends on
the substrate material to be etched, concentration of chemical reactants in the solution,
temperature of the solution etc.

There are generally two types of etching available for shaping the geometry of MEMS
components: (1) isotropic etching and (2) anisotropic etching. Isotropic etching is a process in
which the etching of substrate takes place uniformly in all direction at the same rate. Anisotropic
etching etch away substrate material at faster rate in preferred directions. The chemical solutions
used in etching, or etchants, attack the parts of the substrate that are not protected by the mask.
Wet etching is easy to apply, and it involves inexpensive equipment and facility for the
process. It is also a faster etching process than the dry etching. The etching rates in wet etching
range from a few micrometers to several tens of micrometers per minute for isotropic etching
and about 1 µm/min for anisotropic etchant, whereas only 0.1 µm/min is achievable in typical
dry etching. Unfortunately, there are several disadvantages associated with wet etching; it often
results in poor quality of etched surfaces due to bubbles and flow patterns of the solutions. No
effective wet etching is available for some substrates such as silicon nitrides.
Plasma Etching
The plasma used for etching is a stream of positive-charge-carrying ions of a substance
with a large number of electrons, diluted inert carrier gas such as argon. It can be generated by
continuous applications of high-voltage electric charge, or by radio frequency (RF) sources.
Plasmas are usually generated in low-pressure environment or vacuum.
As illustrated in Figure, the high-energy plasma containing gas molecules, free electrons,
and gas ions bombards the surface of the target substrate and knock off the substrate material

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 MODULE 4

from its surface. This process takes place at low temperature in the range of 50 to 100°C and in
high vacuum.

Fig: Plasma assisted etching

Overview of Micro manufacturing

Micromachining is considered as a process as well as a technology that is utilized to

structure wafer materials or thin films in order to fabricate miniature devices such as
microsensors, micro actuators and passive components for microsystem functioning. Three
distinct micromachining techniques are

1. Bulk micro manufacturing

2. Surface micromachining
3. LIGA process

Bulk micro manufacturing

Bulk micro manufacturing involves the removal of materials from the bulk substrates
either by dry or wet etching, to form the desired three dimensional geometry of the
microstructures. This method is widely used in the production of microsensors and
accelerometers. Etching, either the orientation independent isotropic etching or the orientation
dependent anisotropic etching, is the key technology used in bulk micro manufacturing.

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 MODULE 4

Substrates commonly used are SiC, GaAs and quartz.

Fig: Cantilever beam produced by Bulk micromachining

Isotropic and Anisotropic etching

For substrates made of homogeneous and isotropic materials, the chemical etchants will
attack the material uniformly in all directions. This orientation-independent etching is referred to
as isotropic etching.

Isotropic etching is hardly desirable in micromanufacturing because lack of control of the

finished geometry of the workpiece. Most substrate materials are not isotropic in their crystalline
structures. Therefore, some parts in the crystal are stronger, and thus more resistant to etching,
than others. Three planes of silicon crystals such as (100), (110), and (111) are of particular
importance in micromachining. The three orientations <100>, <110>, and <111> are the

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 MODULE 4

respective normal lines to the (100), (110), and (111) planes. The (111) plane makes an angle
54.740 with (100 plane)

In micromachining, the <110> orientation is the favored orientation. This is because, in this
orientation, the wafer breaks or cleaves more cleanly than in the other orientations. The (110)
plane is the only plane in which one can cleave the crystal in vertical edges. The (111) plane is
the toughest plane to treat. Thus <111> orientation is the least used orientation in micromachining.

Despite the many advantages of anisotropic etching in controlling the shape of the etched
substrates, there are several disadvantages:
(1) It is slower than isotropic etching: the rate rarely exceeds 1 µm/min.
(2) The etching rate is temperature sensitive.
(3) It usually requires an elevated temperature around 100°C in the process which
preclude the use of many photo resistive masking materials.

Isotropic etching of silicon

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 MODULE 4

Wet etchants

Wet etching involves the use of chemical solvents(enchants). The common isotropic
etchant for silicon is called HNA[(hydrofluoric, nitric, acetic) is an extremely
aggressive acidic mixture, which will vigorously attack silicon], which designates acidic agents
such as HF/HNO3/CH3COOH. These etchants can be used effectively at room temperature.
Alkaline chemicals with pH> 12 are used for anisotropic etching. Popular anisotropic etchants
for silicon include potassium hydroxide (KOH), ethylene-diamine and pyrocatechol (EDP),
tetramethyl ammonium hydroxide (TMAH), and hydrazine. Most etchants based on the above
chemicals are diluted with water, normally 1:1 by weight.

Silicon compounds are much stronger etching resistive materials than silicon. These
materials can thus be used as masks for etching of silicon substrates. The resistivity to etchants is
measured by selectivity ratio of a material which is defined as
Etching rate of silicon
Selectivity ratio= using same etchants
Etching rate of the material

The higher the selectivity ratio, the better the mask material is. However, the timing of
etching and the agitated flow patterns of the etchants over the substrate surfaces need to be
carefully controlled in order to avoid serious under etching and undercutting

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Etch stop

There are two popular techniques used in etch stop. These are (1) dopant-controlled etch
stop and (2) electrochemical etch stop
Dopant controlled etch stop

A peculiar phenomenon that can be used to control the etching of silicon is that doped
silicon substrates, whether they are doped with boron for p-type silicon or phosphorus or arsenic
for n-type silicon, show a different etching rate than pure silicon. In the case when then isotropic
HNA etchant are used, the p- or n-doped areas are dissolved significantly faster than the undoped
regions.
Example: Thin layer of boron doped layer is epitaxially grown or formed by diffusion or
implantation on a lightly doped substrate. A strain is induced in the crystal. Due to this etching
rate drops down. This method of creating an etching is called doping selective etching. Disadv:
When boron is added, there will be a stress and strain. Fractures may occur. Cannot be used for
micro sensors or micro pressure sensors.
Electrochemical etch stop

A lightly doped p-n junction is first produced in the silicon wafer by a diffusion process.
This is used as anode. The doped silicon substrate is then mounted on an inert substrate container
made of a material such as sapphire. The n-type silicon layer is used as one of the electrodes in
an electrolyte system with a constant voltage source. The unmasked part of the p type substrate
face is in contact with the etchant. Etching thus takes place as usual until it reaches the interface
of the p-n junction, at which point etching stops because of the rate difference in p- and n-doped
silicon. Consequently, one can effectively control the depth of etching simply by establishing the
p-n silicon boundaries at the desired locations in a doped silicon substrate.

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 Measurement Setup:
o Electrochemical cell →Anode, Cathode
 Anode: Doped pn junction on a Si substrate
 Cathode: counter electrode, platinum
 Echants:Anisotropic Echant, KOH+Water, diluted echant
with 1:1 proportion
 Only a portion of anode is exposed to the echant,remaining
portion is covered with the mask
 When voltage is applied, etching takes place in the exposed p region
 If the region of p-type taken is (100) plane, it will make an angle 54.740 .
 When n-type region get exposed, oxide layer is formed and current is dropped and
etching stops. This oxide is an insulator and is insoluble in KOH solvent. So
etching stops at the interface of p and n-type of the doped silicon

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Dry etching

Dry etching involves the removal of substrate materials by gaseous etchant without wet
chemicals or rinsing. Conventional dry etching is a very slow process, at a rate of about 0.1
µm/min or100 A/min. Dry etching of silicon substrates, such as by plasma, typically is faster and
cleaner than wet etching. A typical dry etching rate is 5µm/min, which is about 5 times that of
wet etching. Like wet etching, dry etching also suffers the shortcoming of being limited to
producing shallow trenches. Consequently, both wet and dry etching processes are limited to
producing MEMS with low aspect ratios. The aspect ratio (A/P) of a MEMS component is
defined as the ratio of its dimension in the depth to those in the surface. For dry etching, the
A/P is less than 15. Another problem with dry etching relates to the contamination of the
substrate surface by residues.

There are three dry etching techniques: plasma etching, ion etching and reactive ion etch
or deep reactive ion etching(DRIE)

Plasma etching

Plasma is a neutral ionized gas carrying a large number of free electrons and positively
charged ions. A common source of energy for generating plasma is a radio-frequency
(RF) source. The process involves adding a chemically reactive gas such as CCl2F2, to the
plasma, one that contains ions and has its own carrier gas (inert gas such as argon gas).The
reactive gas produces reactive neutrals when it is ionized in the plasma. The reactive neutrals
bombard the target on both the sidewalls as well as the normal surface, whereas the charged ions
bombard only the normal surface of the substrate. Etching of the substrate materials is
accomplished by the high-energy ions in the plasma bombarding the substrate
surface(physical etching) with simultaneous chemical reactions between the reactive neutral
ions and the substrate material(chemical etching). This high-energy reaction causes local
evaporation, and thus results in the removal of the substrate material. The etching front moves
more rapidly in the depth direction than in the direction of the sidewalls. This is due to the larger
number of high-energy particles involving both the neutral ions and the charged ions bombarding
the normal surface, while the sidewalls are bombarded by neutral ions only. Plasma etching is
normally performed in high vacuum.

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Fig : Plasma etching

Plasma etching can increase the etching rates in the order of 2000 A/min. This increase in
etching rate is primarily due to the increased mean free path of the reacting gas molecules in the
depth to be etched.

Deep reactive Ion Etching (DRIE)

Despite the significant increase in the etching rate and the depth of the etched trench or
cavity that can be achieved with the use of plasma, the etched walls in the trenches remain at a
wide angle (θ) to its depth.

Fig : sidewall angle in an etched cavity

The cavity angle θ is critical in many MEMS structures such as the comb electrodes in
the micro grippers where the faces of the electrodes, or "fingers" must be parallel to each other.
Etching processes produce most of these comb electrodes. It is highly desirable that the angle θ
be kept at a minimum in deep-etched trenches that separate the plate electrodes. Obtaining deep

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trenches with vertical walls is a major drawback in bulk manufacturing. Consequently, the bulk
manufacturing technique has been generally regarded as suitable only for MEMS with low
aspect ratios, with tapered cavity walls.

Deep reactive ion etching (DRIE) is a process that can overcome the problem described
above. The DRIE process has since extended the use of the bulk manufacturing technique to the
production of MEMS of high aspect ratio (A/P) with virtually vertical walls; ie., θ≈0.

The DRIE process differs from dry plasma etching in that it produces thin protective
films of a few micrometers on the sidewalls during the etching processes. It involves the use of a
high-density plasma source, which allows alternating processes of plasma (ion) etching of the
substrate material and the deposition of etching-protective material on the sidewalls as illustrated
in Figure. Suitable etching protective materials (shown in black in the figure) are those materials
of high selectivity ratio, such as silicon dioxide. Polymers are also frequently used for
this purpose. The DRIE process with polymeric sidewall protection has been used to produce
MEMS structures with A/P = 30 with virtually vertical walls of𝜃 = ±20.

Fig : DRIE process

There are a number of reactant gases that could be used in DRIE. One of these reactants is fluoropolymers (nCF2) in
the plasma of Argon gas ions. This reactant can produce a polymer protective layer on the sidewalls while etching
takes place. The rate of etching is in the range of 2to 3 µm/min, which is higher than what wet etching can
accomplish.

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Sidewall protection material Selectivity ratio Aspect ratio

Polymer 30:1
Photo resist 50:1 100:1
Silicon dioxide 120:1 200:1

Comparison of Wet versus Dry etching

Advantages

 Straightforward, involving well-documented fabrication processes.

 Less expensive in the process, but material loss is high.
 Suitable for simple geometry

Disadvantages

 Limited to low-aspect ratio in geometry; wafers.

 Wastage of material is more

SURFACE MICROMACHINING
 Etching process creates 3-D microstructures by removing materials from the substrates.
Removed substrate materials are wasted.
surface micromachining technique builds microstructure by adding materials layer by layer on

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top of the substrate. Low pressure chemical vapor deposition (LPCVD) techniques are used for
such builders, and polycrystalline silicon (polysilicon) is a common material for the layer material.
Sacrificial layers, usually made of SiO2, are used in constructing the MEMS components but are
later removed to create necessary void space in the depth. Wet etching is the common method used
for this purpose. Layers that are being added in surface micromachining are typically 2 to 5 µm
thick each. During manufacturing surface micromachining not only saves material, but also
eliminates the need for a die attach.

Process

Surface-micromachined devices are typically made up of three types of components

(1) a sacrificial component (also called a spacer layer),

(2) a microstructural component, and

(3) an insulator component.

The sacrificial components are usually made of phosphosilicate glass (PSG) or SiO 2 deposited on
substrates by LPCVD techniques. PSG can be etched more rapidly than SiO 2 in HF etchant.
These components in the form of films can be as long as 1 to 2000 µm and 0.1 to 5 µm thick.
Both microstructural and insulator components can be deposited in thin films. Polysilicon is a
popular material. The etching rates for the sacrificial components must be much higher than
those for the two other components.

The construction of microcantilever beam by the surface micromachining technique is shown in

figure.

Step 1 PSG (phosphosilicate layer)is deposited on the surface of silicon substrate base as the sacrificial
layer

Step 2 A mask (mask 1) say silicon nitride is made to cover the surface of the PSG layer

Step 3 Etching is carried out for attaching the future cantilever beam

Step 4 Another mask (mask 2) is made for the deposition of polysilicon microstructural material

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Step 5 Using mask polysilicon is deposited over the PSG layer

Step 6 The PSG that remains in step 5 is subsequently etched away to produce the desired
cantilever beam. After etching, the structure is rinsed in deionized water thoroughly followed by
drying under infrared lamps. The most suitable etchant for the sacrificial PSG layer is 1:1 HF,
which is made of 1:1 HF:H2O+ 1:1 HCl:H2O.

Fig : Surface micromachining process

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Advantages
 not constrained by the thickness of silicon wafers:
 wide choices of thin film materials to be used;
 suitable for complex geometries such as microvalves and actuators

Disadvantages

 Requires the building of layers of materials on the substrate

 Complex masking design and productions
 Etching of sacrificial layer is necessary.
 The process is tedious and more expensive.
 There are serious engineering problems such as interfacial stresses and stiction

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Mechanical Problems Associated with Surface Micromachining

Three major mechanical problems of surface micromachining are (1) adhesion of layers,
(2) interfacial stresses, and (3) stiction.

Adhesion of Layers

Whenever two layers of materials, whether similar or dissmilar, are bonded together, a
possibility of delamination exists. A bilayer structure can delaminate at the interface either by
peeling of one layer from the other or by shear that causes the severing of the interfaces locally
along the interface. Excessive thermal and mechanical stress is the main cause for interfacial
failures. However, other causes including the surface conditions, e.g.the cleanliness, roughness,
and adsorption energy, could also contribute to the weakening of the interfacial bonding strength.

Interfacial stresses
There are typically three types of stresses that exist in the bilayer structures. The most
obvious one is the thermal stresses resulting from the mismatch of the coefficients of thermal
expansion (CTE) of the component materials. Severe thermal stress can cause the delamination of
the SiO2 layer from the silicon substrate when the bilayer structure is subjected to high enough
operating temperature.

The second type of interfacial stresses is the residual stresses that are inherent in the
microfabrication processes. A SiO2, layer grown on the top surface of a silicon substrate beam at
1000°C by a thermal oxidation process is shown in Figure (a). The resultant shape of the bilayer
beam at room temperature will be that shown in Figure (b) because of the significant difference

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in the CTE for both materials. Excessive tensile residual stress in SiO 2 layer can cause multiple
cracks in the layer.

The third type of stress that could be introduced in thin-film structures is the intrinsic
stress due to local change of atomic structure during microfabrication processes.

Stiction

The phenomenon of two separated pieces sticking together is called stiction. It often
occurs when the sacrificial layer is removed from the layers of material. The thin structure that
was once supported by the sacrificial layer may collapse on the other material. As in figure
stiction could happen with the thin polysilicon beam dropping onto the top surface of the silicon
substrate (the constraint base) after the removal of the sacrificial PSG layer. The two materials
would then stick together after the joint. Considerable mechanical forces are required to separate
the two stuck layers again and these excessive forces can break the delicate microstructure.
Stiction is the main cause for the large amount of scraps in surface micromachining. Stiction
occurs due to Van der Waals and chemical forces between surfaces with narrow gaps.

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Comparison of bulk and surface micromachining

Bulk Micromachining Surface Micromachining

1 Large features with substantial mass and Small features with low thickness and mass
thickness
2 Utilizes both sides of the wafer Multiple deposition and etching required to
build up structures
3 Vertical dimensions one or more wafer Vertical dimensions are limited to the
thickness thickness of the deposited layer leading to
compliant suspended structures with the
tendency to stick to
the support
4 Generally involves laminating Si wafer Surface micromachined device has its built-in
to Si or glass support and is more cost effective

5 Piezoresistive or capacitive sensing Capacitive and resonant sensing mechanisms

6 Wafers may be fragile near the end of

the production Cleanliness critical near end of process

7
Sawing, packaging, testing is difficult Sawing, packaging, testing is difficult
8 Some mature products or producers No mature products or producers
9 Not very compatible with IC Natural but complicated integration with
technology circuitry: integration is often required due to
the tiny capacitive signals

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LIGA process
The term LIGA is an acronym for the German terms Lithography (Lithographie),
electroforming (Galvanoformung), and molding (Abformung). The technique was first
developed at the Karlsruhe Nuclear Research Center in Karlsruhe, Germany. Non silicon based
microstructures can be manufactured by this process. Nickel is a common material for LIGA
products. Using LIGA, microstructures with high aspect ratio can be produced.

Fig: Major fabrication steps

The LIGA process begins with deep x-ray lithography that sets the desired patterns on a
thick film of photoresist. The X-rays used in this process are provided by a synchrotron
radiation source, which allows a high throughput because the high flux of collimated rays
shortens the exposure time. X-rays are used as the light source in photolithography because of
their short wavelength, which provides higher penetration power into the photoresist materials.
This high penetration power is necessary for high resolution in lithography, and for a high
aspect ratio in the depth.

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Substrate materials for LIGA

The substrate used in LIGA is often called as base plate. It must be an electrical
conductor, or an insulator coated with electrically conductive materials. Electrical conduction of
the substrate is necessary in order to facilitate electroplating, which is a part of the LIGA
process. Suitable materials for the substrates include: austenite steel; silicon wafers with a thin
titanium or Ag/Cr top layer; and copper plated with gold, titanium, and nickel. Glass plates with
thin metal plating could also be used as the substrate.

Photoresist Materials

Basic requirements for photoresist materials for the LIGA process include the following:

-It must be sensitive to X-ray radiation.

- It must have high resolution as well as high resistance to dry and wet etching.

-It must have thermal stability up to 140°C.

-The unexposed resist must be absolutely insoluble during development.

-It must exhibit very good adhesion to the substrate during electroplating.

Based on the requirements listed above, PMMA is considered to be an optimal choice of

photoresist material for the LIGA process. However, its low lithographic sensitivity makes the
lithographic process extremely slow. Another shortcoming of PMMA is its vulnerability to crack
due to stress.

Fabrication

The desired product in this example is a micro thin wall metal tube of square cross
section. Deposit a thick film of photoresist material on the surface of a substrate as shown in
Figure (a). A popular photoresist material that is sensitive to X-ray is poly methyl meth acrylate
(PMMA). Masks are used in the x-ray lithography. Most masking materials are transparent to X-
rays, so it is necessary to apply a thin film of gold to the area that will block x-ray transmission.

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The thin mask used for this purpose is silicon nitride with a thickness varying from 1 to 1.5 µm.
The deep X-ray lithography will cause the exposed area to be dissolved in the subsequent
development of the resist material (Figure b). The PMMA photoresist after the development will
have the outline of the product, i.e. the outside profile of the tube. This is followed by
electroplating of the PMMA photoresist with a desired metal, usually nickel, to produce the
tubular product of the required wall thickness (Figure c). The desired tubular product is produced
after the removal of the photoresist materials (ie, PMMA) by oxygen plasma or chemical
solvents. For most applications the desired product is metal molds for subsequent injection

molding of microplastic products.

Figure: Major steps in LIGA process (eg:tube)

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Figure: Major steps in LIGA process (eg: gear)

Advantages
 virtually unlimited aspect ratio of the microstructure geometry
 flexible microstructure configurations and geometry
 the only one of the three techniques that allows the production of metallic microstructures
 the best of the three manufacturing processes for mass production, with the provision for
injection molding.

Disadvantages

 The most expensive process of all

 Requires a special synchrotron radiation facility for deep X-ray lithography
 Requires the development of microinjection molding technology and a facility for mass
production purposes.

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Microstereo lithography

Microstereo lithography is a novel microfabrication process for fabricating high aspect

ratio and complex 3D microstructures on the µm - mm scale including curvilinear and re-entrant
microstructures that are difficult to make using conventional micromachining.It is an enabling
technology for making MEMS devices in materials other than silicon. It is sometimes referred to
as “Poor mans LIGA process”.

The principle behind this process is whenever a photopolymer is exposed to light, it turns
into solid. So selective exposure of liquid layer (photopolymer) to light is done.Using this
complex 3-D structure is built layer by layer with one layer built on another. Motivation behind
using this are the limitations of traditional processes such as:

 Inability to manufacture high aspect ratio and complex 3D microstructures.

Conventional fabrication processes has capability to manufacture 2-D parts or
planar components.
 Limitation on materials processed in conventional processes.Using
microstereolithgraphy there is wider choice of materials such as Ceramics,
Polymers, metal powder etc.

Types of Microstereo lithographic Process

Scanning Type

After dividing 3-D structure into planar layers, each layer/section is scanned by light (LASER)
line by line. Here the entire section is not exposed to light at a time.

Dynamic Mask Type

After dividing 3-D structure into planar layers, each layer/section is exposed to light at a time.
Here the mask changes its shape dynamically. So after exposing one entire layer to light, mask
changes its size & next entire section is exposed to light.

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 MODULE 4

Scanning Type

A laser curable photopolymer liquid is kept in a tank.An elevator which can be moved in
vertical direction is used to expose new layer after exposing one layer to light.The movement of
laser beam in one direction can be achieved by means of rotating mirror. Typically two mirrors
are used so that scanning in two directions (perpendicular to each other) can be done.

Fig: schematic diagram for scanning type Fig: vector scan

Elevator which is initially above liquid level in tank is dipped into tank to certain depth &
again brought up so that liquid of suitable thikness is on the top of it. Then it is exposed to laser.
As scanning is line by line (Vector scan), the actual section will be slightly different from desired
one. Generally accuracy is 5-10% which can be tolerated in case of large sections but in case of
submicron components it can not be tolerated.This is the limitation of this type of process. This
is used to build components having dimensions above 30 micron size. Once the section is built,
the elevator is dipped again so that surface tension effects will gone & once again it is brought up
so that suitable thickness of liquid is on top.Then same procedure is repeated for next section
which will be built on previous section.

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Dynamic Mask Type

In dynamic type, the mask changes its shape dynamically in which required area is kept
bright & remaining is kept dark. Inherent disadvantage of this process is that higher power of
LASER will damage mask. In this process entire section is exposed to light at a time. The
remaining set-up is just like the one used in case of scaning type. There is reasonable accuracy
with this type of process than the scanning type.

Fig: schematic diagram for dynamic mask type

Limitations

 Smooth 3D surfaces are difficult to produce with this as stepping effects will always be
present.
 Mass production of several components is another challenge.
 Extremely small features are difficult to produce.

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PREVIOUS YEAR QUESTION PAPER

1. Distinguish between wet and dry etching

2. Why is semiconductor preferred as substrate in MEMS

“Silicon and its compounds are used as ideal substrate materials for MEMS” Justify

Explain photolithography

Explain two types of scaling laws

Explain the process of ion implantation with the help of block schematic

Explain why isotropic etching is hardly used in micro manufacturing.

What are the properties of Silicon Nitride that make it attractive for MEMS and Microsystems

Differentiate between isotropic and anisotropic wet etching

What is PDMS.

12. Explain the differences between negative and positive photo resists

13. Bring out the advantage of dry oxidation over wet oxidation

14. Bring out the factors in favor of Silicon as a structural material

15. Isotropic etching is hardly used for micro-manufacturing. Why?

16. Why semiconductor substrates are preferred for MEMS

17. Draw the crystal structure of Silicon for [100] and [110] orientation

18. What is PMMA.

19. List out the pros and cons of CVD techniques.

20. Discuss the effect of scaling in heat conducting and heat convection.

21. Compare wet and dry oxidation.

22. List out the Silicon compounds used for MEMS.

23. List the features of polymers used in MEMS.

24. Compare between silicon and GaAs as materials for MEMS device fabrication.

25. Describe SU-8.

Essays

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 MODULE 4

27. List out the pros and cons of CVD techniques. Describe any one CVD technique

28. With neat sketches explain the process of photolithography

29. What are the different types of polymers used in the MEMS? Mention its uses in the construction of
MEMS

30. Explain the working of LB film microsensor with its structure

31. Estimate the time required to dope a silicon substrate by ion implantation with boron atoms at
100keV. The required maximum concentration of the dopant is 20×1020/cm3 at a depth of 0.2mm
beneath the substrate surface

32. With the help of sketches explain the process of ion implantation

33. Enumerate various substrate materials used in MEMS

34. Explain chemical vapor deposition used for obtaining Silicon Nitride thin film over Silicon substrate

35. Explain the steps involved in photolithographic process, for positive and negative photo resists

36. Write various process steps involved in MEMS fabrication with neat diagram

37. Explain different types of etching methods in MEMS

38. Explain the mechanical properties of Silicon and thin films

39. Discuss PDMS and PMMA with neat block diagram

40. Explain the role of polymers in MEMS

41. Explain the crystal structures and its physical and chemical properties of Silicon for [100], [110] and
[111] orientations

42. Describe the general procedure for lithography

43. Describe both chemical etching and plasma etching. Bring out the difference between the both

44. Explain the principle of plasma etching

45. Explain how oxidation principle is used in Micro system fabrication

46. Give short notes on diffusion process used in MEMS industry.

47. List out the various etching process and explain in detail with relevant diagrams

48. State three relevant properties of Silicon Carbide and Silicon Nitride for use in microsystems

49. Explain the steps involved in photolithography. State the chemicals used in each of the stages along with the
operating conditions

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 MODULE 4

50. Explain the oxide growth process in Silicon with relevant figures

51. With relevant figures/schematics state one application of silicon piezoresistors

52. What are the advantages of use of polymers in microsystems? Give two examples of polymers(full
chemical/commercial names)

53. Explain the Langmuir-Blodgett process with relevant figures. What are the advantages of LBfilms

51