Digital Electronics

19CSE204
III Semester
B. Tech. CSE
Amrita School of Engineering, Chennai
 Overview
• Counters
• Asynchronous Counter
• Synchronous Counter
• Other Types of Counters
• Ring Counter
• Johnson Counter
 Counters
• Counter is a special purpose added/subtractor which increments or decrement a
count by 1 for Up counter or Down counter respectively

• Counter circuits are used in digital systems for many purposes. They may count the
number of occurrences of certain events, generate timing intervals for control of
various tasks in a system, keep track of time elapsed between specific events, and so
on.

• Counters can be implemented using the adder/subtractor circuits and the registers.
However, since we only need to change the Contents of a counter by 1, it is not
necessary to use such elaborate circuits.

• Instead, we can use much simpler circuits that have a significantly lower cost. Counter
circuits can be designed using T and D flip-flops.
 Asynchronous Counter - Up Counter
• The simplest counter circuits can be built using
T flip-flops because the toggle feature is
naturally suited for the implementation of the
counting operation.

• Shown figure is a three-bit counter capable of

counting from 0 to 7.

• The clock inputs of the three flip-flops are

connected in cascade.

• The T input of each flip-flop is connected to a

constant 1, which means that the state of the flip-
flop will be reversed (toggled) at each positive
edge of its clock.
 Asynchronous Counter - Up Counter

0 1 0 1 0 1 0 1 0

0 0 1 1 0 0 1 1 0

0 0 0 0 1 1 1 1 0
 Asynchronous Counter - Up Counter
• This circuit is a modulo-8 counter. Because it counts in the upward direction, we call it
an up-counter.

• This counter has three stages, each comprising a single flip-flop. Only the first stage
responds directly to the Clock signal; we say that this stage is synchronized to the
clock.

• The other two stages respond after an additional delay. The change in Q1 appears after
a second propagation, the change in Q2 occurs after a third delay

• This behavior is similar to the rippling of carries in the ripple-carry adder circuit,
hence it is called as asynchronous counter, or a ripple counter
 Asynchronous Counter - Down Counter
• The only difference is that in the clock inputs of the second and third flip- flops are
driven by the Q outputs of the preceding stages, rather than by the Q’ outputs.
Asynchronous Counter - Down Counter
 Synchronous Counter
• The asynchronous counters are simple, but not very fast
• If a counter with a larger number of bits is constructed in this manner, then the delays
caused by the cascaded clocking scheme may become too long to meet the desired
performance requirements.
• We can build a faster counter by clocking all flip-flops at the same time. This kind of
counter is called as synchronous counter.
Synchronous Counter

• Q0 changes on each clock cycle

• Q1 changes only when Q0 = 1

• Q2 changes only when both Q1 and

Q0 are equal to 1
Synchronous Counter
 Ring Counter
• It is possible to devise a counter like circuit in which each flip-flop reaches the state
Qi = 1 for exactly one count, while for all other counts Qi = 0.

• Then Qi indicates directly an occurrence of the corresponding count.

• Since this does not represent binary numbers, it is better to say that the outputs of the
flips-flops represent a code.

• Such a circuit can be constructed from a simple shift register.

 Ring Counter

Q0 Q1 Q2 Q3
Initially 0 0 0 0
1 0 0 0
0 1 0 0 n different states
0 0 1 0
0 0 0 1
1 0 0 0
 Ring Counter
• The Q output of the last stage in the shift register is fed back as the input to the first
stage, which creates a ring like structure.

• To start a ring counter the preset signal of first flip-flop and clear signal of all
other flip-flops should be activated.

• If a single 1 is injected into the ring, this 1 will be shifted through the ring at
successive clock cycles.

• For example, in a four-bit structure, the possible codes Q0Q1Q2Q3 will be

1000,0100,0010, and 0001. So n-bit Ring counter has n different states.

• Such encoding, where there is a single 1 and the rest of the code variables are 0, is
called a one-hot code.
 Johnson Counter
• An interesting variation of the ring counter is obtained if, instead of the Q output, we
take the Q output of the last stage and feed it back to the first stage. Johnson counter is
also known as twisted Ring counter.

Q0 Q1 Q2 Q3
Initially 0 0 0 0
1 0 0 0
1 1 0 0
2n 1 1 1 0
states 1 1 1 1
0 1 1 1
0 0 1 1
0 0 0 1
0 0 0 0
 Johnson Counter
• An n-bit counter of this type generates a counting sequence of length 2n.

• To start a Johnson Counter the clear signal of all the flip-flops should be activated.

• For example, a four-bit counter produces the sequence 0000, 1000,1100,1110,1111,

0111, 0011, 0001,0000, and so on.

• Note that in this sequence, only a single bit has a different value for two consecutive
codes.