Homework 1 Digital Integrated Circuit Design: N-Channel MOSFET EQUATION
Homework 1 Digital Integrated Circuit Design: N-Channel MOSFET EQUATION
Homework 1 Digital Integrated Circuit Design: N-Channel MOSFET EQUATION
Sturation VSG > |VT |, VSD > VSG − |VT | IDS = 12 µp COX W
L
(VSG − |VT |)2 (1 + λVSD )
The simplest model in SPICE (Level 1 or default model) uses the above equations.
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Note for Exercise:
Ex. 1. Write a Shell script to read the input data in file ”pvt tran.lst” and replace
the information to ”tmp ngspice.sp”, then save to a new file.
pvt tran.lst
tmp ngspice.sp
Hint:
Ex. 2. Write Spice Netlist and simulate the circuit: Using input signal:
vA A 0 pwl(0 0, 50ns 0, ’50ns+0.1ns’ ”pvdd11”, 100ns ”pvdd11”, ’100ns+0.1ns’
0)
1. Cload = 100fF. Measure the delay time from A to Y (rising and falling)
2. Cload = 500fF. Measure the delay time from A to Y (rising and falling). Op-
timize this circuit to the delay time is smaller 0.5ns
Ex. 3. Design, simulate and measure rising/falling delay time of an Inverter drive
a loading 500fF. Make sure trise and tfall lesser than 300ps for all of variation of
voltage, process and temperature.
Hint: The result will be in table: all of results must less than 0.3ns
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P V T Trise (ns) Tf all (ns)
TT 1.1 25 ... ...
FF 1.21 125 ... ...
SS 0.99 -40 ... ...