1

CHAPTER 1
INTRODUCTION
Power factor is the ratio of true power or watts to apparent power or volt
amps. They are identical only when current and voltage are in phase then the
power factor is1.0. The power in an ac circuit is very seldom equal to the direct
product of the volts and amperes. In order to find the power of a single phase ac
circuit the product of volts and amperes must be multiplied by the power factor.
Ammeters and voltmeters indicate the effective value of amps and volts. True
power or watts can be measured with a wattmeter. If the true power is 1870 watts
and the volt amp reading is 2200 than the power factor is 0.85 or 85 percent.
True power divided by apparent power. The power factor is expressed in decimal
or percentage. Thus power factors of 0.8 are the same as 80 percent. Low power
factor is usually associated with motors and transformers. An incandescent bulb
would have a power factor of close to 1.0. A one hp motor has power factor
about 0.80. With low power factor loads, the current flowing through electrical
system components is higher than necessary to do the required work. These
results in excess heating, which can damage or shorten the life of equipment, a
low power factor can also cause low voltage conditions, resulting in dimming of
lights and sluggish motor operation. Low power factor is usually not that much
of a problem in residential homes. It does however become a problem in industry
where multiple large motors are used. So there is a requirement to correct the
power factor in industries. Generally the power factor correction capacitors are
used to try to correct this problem.
 2

1.1 INTRODUCTION TO POWER FACTOR

For a DC circuit the power is P=VI and this relationship also holds for the
instantaneous power in an AC circuit. However, the average power in an AC
circuit expressed in terms of the rms voltage and current is
Pavg = VI cosφ (1.1)
Where, φ is the phase angle between the voltage and current. The additional term
is called the power factor. Power factor triangle is shown in fig 1.1.

Fig 1.1: power factor triangle

From the phasor diagram for AC impedance, it can be seen that the power factor
isR/Z. For a purely resistive AC circuit, R=Z and the power factor = 1.
1.1.1 Instantaneous power
As in DC circuits, the instantaneous electric power in an AC circuit is
given by P=VI where V and I are the instantaneous voltage and current.
Instantaneous voltage and current is shown in fig 1.2.Since
V = Vmsinωt
I = Im sin (ωt - φ) (1.2)

Fig1.2:Instantaneous voltage and current

 3

Then the instantaneous power at any time t can be expressed as

Pinstantaneous = VmImsinωt sin (ωt-φ) (1.3)
After using trigonometric identity:
sin (ωt-φ) = sinωtcosφ- cosωtsinφ (1.4)
The power becomes:
Pinstantaneous = VmIm sin²ωt cosφ - VmImsinωtsinφcosωt(1.5)
Averaging this power over a complete cycle gives the average power.

1.1.2 Average power

Normally the average power is the power of interest in AC circuits. Since
the expression for the instantaneous power

is a continuously varying one with time, the average must be obtained by

integration. Averaging over one period T of the sinusoidal function will give the
average power. The second term in the power expression above averages to zero
since it is an odd function of t. The average of the first term is given by

(1.6)
Since the rms voltage and current are given by
V=Vm / √2(1.7)
I=Im / √2(1.8)
The average power can be expressed as
Pavg =VI cosφ
 4

1.1.3 Average power integral

Finding the value of the average power for sinusoidal voltages involves the
integral

(1.9)
The period T of the sinusoid is related to the angular frequency ω and angle θ by
2π
T= ω

ωT=2л(or) θ=ωt (1.10)

Using these relationships, the integral above can be recast in the form:

(1.11)
The average of sin2q or cos² q is equal to ½. This can be shown using the
trigonometry identity:

(1.12)
This reduces the integral to the value 1/2 since the second term on the right has
an integral of zero over the full period
1.2. PHASE DIAGRAM
When capacitors or inductors are involved in an AC circuit, the current
and voltage do not peak at the same time. The fraction of a period difference
between thepeaks expressed in degrees is said to be the phase difference.
The phase difference is <=90°. It is customary to use the angle by which
the voltage leads the current. This leads to a positive phase for inductive circuits
since current lags the voltage in an inductive circuit.
 5

The phase is negative for a capacitive circuit since the current leads the
voltage. The useful mnemonic ELI the ICE man helps to remember the sign of
the phase. The phase relation is often depicted graphically in a phasor diagram

Fig 1.3: Phase diagram

1.3 PHASOR DIAGRAMS
The reference for zero phase is taken to be the positive x-axis and is
associated with the resistor since voltage and current are in phase. The length of
the phasorisProportional to the magnitude of the quantity represented, and its
angle represents its phase relative to that of the current through the resistor. The
phasor diagram for theRLC series circuit shows in fig 1.4

Fig1.4: Phasor diagram

Equivalent voltage and phase angle is given as:

Equivalent impedance and phase angle is given as:

 6

1.4AC RESPONSE OF INDUCTOR CAPACITOR AND RESISTOR

1.4.1 Inductor
An inductor with AC supply is shown in fig 1.5 and phasor diagram is
shown in fig 1.6 which shows the phase angle between current and voltage. In
case of inductor voltage lead current by 90°. The voltage across an inductor leads
the current because the Lenz' law behavior resists the buildup of the current, and
it takes a finite time for an imposed voltage to force the buildup of current to its
maximum.

Fig1.5 Inductor with AC supply

Fig1.6 Phasor diagram of inductor

1.4.2 Capacitor
A capacitor with AC supply and phasor diagram is shown in fig 1.7 which
shows the phase angle between current and voltage. In case ofCapacitorvoltage
lags current by 90°. The voltage across a capacitor lags the current because the
current must flow to build up charge, and the voltage is proportional to that
charge which is built up on the capacitor plates.
 7

Fig 1.7:phasor diagram of capacitor

1.4.3 Resistor
A resistor with AC supply is shown in fig 1.8 and phasor diagram is
shown in fig 1.9 which shows the phase angle between voltage and current is 0°.
For ordinary currents and frequencies, the behavior of a resistor is that of a
dissipative element which converts electrical energy into heat. It is independent
of the direction of current flow and independent of the frequency. So we say that
the AC impedance of a resistor is the same as its DC resistance.

Fig1.8 Resistor with AC supply

Fig 1.9:Phasor diagram of resistance

 8

1.5NEEDS OF POWER FACTOR CONTROLLER

Power factor correction (PFC) is a technique of counteracting the
undesirable effects of electric loads that create a power factor that is less than
one. Power factor correction may be applied either by an electrical power
transmission utility to improve the stability and efficiency of the transmission
network or correction may be installed by individual electrical customers to
reduce the costs charged to them by their electricity supplier.

EXPLANATION
An electrical load that operates on alternating current requires apparent
power, which consists of real power plus reactive power.
Real power is the power actually consumed by the load. Reactive power is
repeatedly demanded by the load and returned to the power source, and it is the
cyclical effect that occurs when alternating current passes through a load that
contains a reactive component.
The presence of reactive power causes the real power to be less than the
apparent power, and so, the electric load has a power factor of less than 1.The
reactive power increases the current flowing between the power source and the
load, which increases the power losses through transmission and distribution
lines.
This results in operational and financial losses for power companies.
Therefore, power companies require their customers, especially those with large
loads, to maintain their power factors above a specified amount (usually 0.90 or
higher) or be subject to additional charges. Electrical engineers involved with the
generation, transmission, distribution and consumption of electrical power have
an interest in the power factor of loads because power factors affect efficiencies
and costs for both the electrical power industry and the consumers.
 9

In addition to the increased operating costs, reactive power can require

the use of wiring, switches, circuit breakers, transformers and transmission lines
with higher current capacities. Power factor correction attempts to adjust the
power factor of an AC load or an AC power transmission system to unity (1.00)
through various methods. Simple methods include switching in or out banks of
capacitors or inductors which act to cancel the inductive or capacitive effects of
the load, respectively. For example, the inductive effect of motor loads may be
offset by locally connected capacitors. It is also possible to effect power factor
correction with an unloaded synchronous motor connected across the supply.
The power factor of the motor is varied by adjusting the field excitation and can
be made to behave like a capacitor when over excited. Non-linear loads create
harmonic currents in addition to the original AC current.
The simple correction techniques described above do not cancel out the
reactive power at harmonic frequencies, so more sophisticated techniques must
be used to correct for non-linear loads
1.6ELECTRICITY INDUSTRY ASPECTS
PFC is desirable because the source of electrical energy must be capable
of supplying real power as well as any reactive power demanded by the load.
This can require larger, more expensive power plant equipment, transmission
lines, transformers, switches, etc. than would be necessary for only real power
delivered.
Also, resistive losses in the transmission lines mean that some of the
generated power is wasted because the extra current needed to supply reactive
power only serves to heat up the power lines. The electric utilities therefore put a
limit on the power factor of the loads that they will supply. The ideal figure for
load power factor is 1, (that is, a purely resistive load), because it requires the
smallest current to transmit a given amount of real power.
 10

Real loads deviate from this ideal. Electric motor loads are phase lagging
(inductive), therefore requiring capacitor banks to counter this inductance.
Sometimes, when the power factor is leading due to capacitive loading, inductors
(also known as reactors in this context) are used to correct the power factor. In
the electricity industry, inductors are said to consume reactive power and
capacitors are said to supply it, even though the reactive power is actually just
moving back and forth between each AC cycle. Electricity utilities measure
reactive power used by high demand customers and charge higher rates
accordingly. Some consumers install power factor correction schemes at their
factories to cut down on these higher costs.
 11

CHAPTER2
POWER FACTOR CONTROLLER
Generally there are two types of technique are used to control the power
factor These are:
2.1 PASSIVE PFC
This is a simple way of correcting the nonlinearity of a load by using
capacitor banks. It is not as effective as active PFC, switching the capacitors into
or out of the circuit causes harmonics, which is why active PFC or a
synchronous motor is preferred
2.2 ACTIVE PFC
An active power factor corrector (active PFC) is a power electronic system
that controls the amount of power drawn by a load in order to obtain a Power
factor as close as possible to unity. In most applications, the active PFC controls
the input current of the load so that the current waveform is proportional to the
mains voltage waveform (a sine wave).Some types of active PFC are: Boost,
Buck and Buck-boost. Active power factor correctors can be single-stage or
multi-stage. Active PFC is the most effective and can produce a PFC of 0.99
(99%)
2.3 SYNCHRONOUS PFC
Synchronous motors can also be used for PFC. Shaft less motors is used,
so that no-load can be connected and run freely on the line at capacitive (leading)
power factor for the purposes of PFC.
2.4 CAPACITIVE POWER FACTOR CORRECTION (CPFC)
Capacitive Power Factor correction is applied to circuits, which include
induction motors as a means of reducing the inductive component of the current
and thereby reduce the losses in the supply.
 12

There should be no effect on the operation of the motor itself. An

induction motor draws current from the supply, which is made up of
resistivecomponents and inductive components. The resistive components are:
Load current and Loss current; and the inductive components are: Leakage
reactance and Magnetizing current. Fig2.1 is showing relations between
magnetizing current, motor current and work current

Fig2.1:Showing relations between magnetizing current, motor current and work

Current

The current due to the leakage reactance is dependent on the total current
drawn by the motor, but the magnetizing current is independent of the load on
the motor. The magnetizing current will typically be between 20% and 60% of
the rated full load current of the motor. The magnetizing current is the current
that establishes the flux in the iron and is very necessary if the motor is going to
operate. The magnetizing current does not actually contribute to the actual work
output of the motor. It is catalyst that allows the motor to work properly. The
magnetizing current and the leakage reactance can be considered passenger
components of current that will not affect the power drawn by the motor, but will
contribute to the power dissipated in the supply and distribution system. Take for
example a motor with a current draw of 100Amps and a power factor of 0.75.
The resistive component of the current is 75 Amps and this is what the KWh
meter measures.
The higher current will result in an increase in the distribution losses of
(100 x 100) / (75 x 75) = 1.777 or a 78% increase in the supply losses.
 13

In the interest of reducing the losses in the distribution system, power

factor correction is added to neutralize a portion of the magnetizing current of
the motor. Typically, the corrected power factor will be 0.92 - 0.95. Some power
retailers offer incentives for operating with a power factor of better than 0.9,
while others penalize consumers with a poor power factor. There are many ways
that this is metered, but the net result is that in order to reduce wasted energy in
the distribution system, the consumer will be encouraged to apply power factor
correction. Power factor correction is achieved by the addition of capacitors in
parallel with the connected motor circuits and can be applied at the starter, or
applied at the switchboard or distribution panel. The resulting capacitive current
is leading current and is used to cancel the lagging inductive current flowing
from the supply.
 14

CHAPTER 3
BLOCK DIAGRAMS AND DESCRIPTIONS

The block diagram of the microcontroller based power factor corrector is

shown in Fig3.1.Microcontroller of PIC18F452 with a crystal of 8MHz has been
utilized in the proposed scheme. The static compensator employed in the system
is a parallel combination of a fixed capacitor C and a TRIAC controlled reactor
(inductor L). A small inductance L1 is connected in series with C to prevent
parallel resonance. Two back-to-back thyristors are used to control the current
flow through the reactor. The supplied voltage and current signals, taken through
a potential transformer and a current transformer, respectively, are applied to
band pass filters (BPF 1 and BPF 2). The outputs of these two filters are the
fundamental complex waveforms of the supplied voltage and current,
respectively. Subsequently, the two sinusoidal waveforms are being changed to
square waves through two zero-crossing detectors (ZCD 1 and ZCD 2) as the
microcontroller can only detect the digital signal input, or known as ‘pulse’.
 15

Fig 3.1: Overview of the block diagram for the microcontroller-based power
factor Corrector.
3.1VOLTAGE TRANSDUCER LV 25-P

For the electronic measurement of voltages: DC, AC, pulsed..,with a

galvanic isolation between the primary circuit (high voltage)and the secondary
circuit (electronic circuit).

Fig3.2: Voltage transducer

Features
 Closed loop (compensated) voltage transducer using the Hall effect
 Insulated plastic case recognized according to UL 94-V0.
 16

Principle of use
For voltage measurements, a current proportional to the measured voltage
must be passed through an external resistorR 1 which is selected by the user and
installed in series with the primary circuit of the transducer.
Advantages
 Excellent accuracy
 Very good linearity
 Low thermal drift
 Low response time
 High bandwidth
 High immunity to external interference
 Low disturbance in common mode.

3.2CURRENT TRANSDUCER LA 25-NP

For the electronic measurement of currents: DC, AC, pulsed, mixed, with
a galvanic isolation between the primary circuit(high power) and the secondary
circuit (electronic circuit).

Fig3.3 Current transducer

Features
 Closed loop (compensated) multi range
 17

 current transducer using the

 Hall effect
 Insulated plastic case recognized According to UL 94-V0.
Advantages
 Excellent accuracy
 Very good linearity
 Low temperature drift
 Optimized response time
 Wide frequency bandwidth
 No insertion losses
 High immunity to external interference
 Current overload capability.
3.3ZEROCROSSING DETECTORS

Zero-crossing detector is an applied form of comparator. Either of

the circuits discussed can be employed as the zero-crossing detector provided the
reference voltage Vref is made zero
Zero-crossing detector using inverting op-amp comparator is depicted in
fig3.4.
The output voltage waveform shown in figure indicates when and in what
direction an input signal vin crosses zero volt. In some applications the input
signal may be low frequency one (i.e. input may be a slowly changing
waveform). In such a case output voltage V OUT may not switch quickly from
one saturation state to the other. Because of the noise at the input terminals of the
op-amp, there may be fluctuation in output voltage between two saturation states
(+ Vsat and – Vsat voltages). Thus zero crossings may be detected for noise
voltages as well as input signal vin. Both of these problems can be overcome, if
we use regenerative or positive feeding causing the output voltage vout to
 18

change faster and eliminating the false output transitions that may be caused due
to noise at the input of the op-amp.

Fig3.4 Zero Crossing Detector

3.4 SWITHCHING DEVICES

A switch is an electrical component that can break an electrical circuit,
interrupting the current or diverting it from one conductorIn engineering to
another.

The most familiar form of switch is a manually Operated electro

mechanical device with one or more sets of electrical contacts, which are
connected to external circuits.

Each set of contacts can be in one of two states: either "closed" meaning
the contacts are touching and electricity can flow between them, or "open",
meaning the contacts are separated and the switch is non-conducting. The
mechanism actuating the transition between these two states (open or closed) can
be either a "toggle" (flip switch for continuous "on" or "off") or "momentary"
(push-for "on" or push-for "off") type.
 19

A switch may be directly manipulated by a human as a control signal to a

system, such as a computer keyboard button, or to control power flow in a
circuit, such as a light switch. Automatically operated switches can be used to
control the motions of machines, for example, to indicate that a garage door has
reached its full open position or that a machine tool is in a position to accept
another work piece. Switches may be operated by process variables such as
pressure, temperature, flow, current, voltage, and force, acting as sensors in a
process and used to automatically control a system. For example, thermostat is a
temperature-operated switch used to control a heating process. A switch that is
operated by another electrical circuit is called a relay. Large switches may be
remotely operated by a motor drive mechanism.

Some switches are used to isolate electric power from a system, providing
a visible point of isolation that can be padlocked if necessary to prevent
accidental operation of a machine during maintenance, or to prevent electric
shock.

3.4.1 Silicon Controlled Rectifier (SCR)

A silicon controlled rectifier is a semiconductor device that acts as a true
electronic switch. It can change alternating current into direct current and at the
same time can control the amount of power fed to the load. Thus SCR combines
the features of a rectifier and a transistor.
Constructional details: When a pn junction is added to a junction transistor,
the resulting three pn junction device is called a silicon controlled rectifier. Fig.
(i) shows its construction. It is clear that it is essentially an ordinary rectifier (pn)
and a junction transistor (npn) combined in one unit to form pnpn device. Three
terminals are taken; one from the outer p-type material called anode A, second
from the outer n-type material called cathode K and the third from the base of
transistor section and is called gate G. In the normal operating conditions of
 20

SCR, anode is held at high positive potentialw.r.t. cathode and gate at small
positive potential w.r.t. cathode. Fig.3.5(ii) shows the symbol of SCR. The
silicon controlled rectifier is a solid state equivalent of thyratron. The gate, anode
and cathode of SCR correspond to the grid, plate and cathode of thyratron. For
this reason, SCR is sometimes called thyristor.

Fig3.5 symbol of SCR

3.4.2 Working of SCR
In a silicon controlled rectifier, load is connected in series with anode. The
anode is always kept at positive potential w.r.t. cathode. The working of SCR
can be studied under the following two heads:
Why not germanium controlled rectifier?:The device is made of silicon because
leakage current in silicon is very small as compared to germanium. Since the
device is used as a switch, it will carry leakage current in the off condition which
should be as small as possible.
It got this name because it is a silicon device and is used as a rectifier and that
rectification can be controlled.
Typical SCR Packages
(i) When gate is open. Fig3.6. shows the SCR circuit with gate open i.e. no
voltage applied to the gate. Under this condition, junction J2 is reverse
biased while junctions J1 and J3 are forward biased. Hence, the situation
in the junctions J1 and J3 is just as in an pn transistor with base open.
Consequently, no current flows through the load RL and the SCR iscut
 21

off. However, if the applied voltage is gradually increased, a stage is

reached when reverse biased junction J2 breaks down. TheSCR now
conducts heavily and is said to be in the ON state. The applied voltage at
which SCRconducts heavily without gate voltage is called Break over
voltage.

Fig 3.6 Working of SCR

(ii) When gate is positive w.r.t. cathode. The SCR can be made to conduct
heavily at smaller applied voltage by applying a small positive potential to the
gate as shown in Fig.3.6.
Now junction J3 is forward biased and junction J2 is reverse biased. The
electrons from n-type material start moving across junction J3 towards left
whereas holes from p-type towards the right. Consequently, the electrons from
junction J3 are attracted across junction J2 and gate current starts flowing. As
soon as the gate current flows, anode current increases. The increased anode
current in turn makes more electrons available at junction J2. This process
continues and in an extremely small time, junction J2breaks down and the SCR
starts conducting heavily. Once SCR starts conducting, the gate (the reason for
this name is obvious) loses all control. Even if gate voltage is removed, the
anode current does not decrease at all. The only way to stop conduction (i.e.
bring SCR in off condition) is to reduce the applied voltage to zero.
 22

Fig 3.7 SCR conduction

3.4.3 SCR in Normal Operation

In order to operate the SCR in normal operation, the following points are
kept in view :
(i) The supply voltage is generally much less than break over voltage.
(ii) The SCR is turned on by passing an appropriate amount of gate current (a
few mA) and not bybreak over voltage.
(iii) When SCR is operated from a.c. supply, the peak reverse voltage which
comes during negative half-cycle should not exceed the reverse breakdown
voltage.
(iv) WhenSCR is to be turned OFF from the ON state, anode current should be
reduced to holding current.
(v) If gate current is increased above the required value, the SCR will close at
much reduced supply voltage.
3.4.4 SCR as a Switch
The SCR has only two states, namely; ON state and OFF state and no state
in between. When appropriate gate current is passed, the SCR starts conducting
heavily and remains in this position indefinitely even if gate voltage is removed.
This corresponds to the ON condition. However, when the anode current
is reduced to the holding current, the SCR is turned OFF. It is clear that
 23

behaviour ofSCR is similar to a mechanical switch. As SCR is an electronic

device, therefore, it is more appropriate to call it an electronic switch.
An SCR has the following advantages over a mechanical orelectromechanical
switch (relay):
(i) It has no moving parts. Consequently, it gives noiseless operation at high
efficiency.
(ii) The switching speed is very high upto 109 operations per second.
(iii) It permits control over large current (30–100 A) in the load by means of a
small gate current(a few mA).
(iv)It has small size and gives trouble free service.

3.4.5 SCR Switching

We have seen that SCR behaves as a switch i.e. it has only two states viz. ON
state and OFF state. It is profitable to discuss the methods employed to turn-on
or turn-off an SCR.
1. SCR turn-on methods. In order to turn on the SCR, the gate voltage VG is
increased uptoa minimum value to initiate triggering. This minimum value
of gate voltage at which SCR is turned ON is called gate triggering
voltage VGT. The resulting gate current is called gate triggering
currentIGT. Thus to turn on an SCR all that we have to do is to apply
positive gate voltage equal to VGT or passa gate current equal to IGT. For
most of the SCRs, VGT = 2 to 10 V and IGT = 100 μA to 1500 mA. We
shall discuss two methods to turn on an SCR.
 24

Fig 3.10 SCR switching

(i) D.C. gate trigger circuit. Fig. 3.10 shows a typical circuit used for triggering
an SCR with a d.c. gate bias. When the switch is closed, the gate receives
sufficient positive voltage (= VGT) to turn the SCR on. The resistance R1
connected in the circuit provides noise suppression and improves theturn-on
time. The turn-on time primarily depends upon the magnitude of the gate current.
The higher the gate-triggered current, the shorter the turn-on time.

Fig 3.11trigger circuit

(ii) A.C. trigger circuit. An SCR can also be turned on with positive cycle of
a.c. gate current. Fig. 3.11 (ii) shows such a circuit.
(iii) During the positive half-cycle of the gate current, at some point IG= IGT,
the device is turned on as shown in Fig. 3.11 (i).
 25

2. SCR turn-off methods. The SCR turn-off poses more problems than SCR turn-
on. It is because once the device is ON, the gate loses all control. There are many
methods of SCR turn-off butonly two will be discussed.
(i) Anode current interruption. When the anode current is reduced below a
minimum value called holding current, the SCR turns off. The simple way to
turn off the SCR is to open the line switchS as shown in Fig.3.11.
(iv) Forced commutation. The method of discharging a capacitor in parallel
with an SCR to turn off the SCR is called forced commutation. Fig. 3.12
shows the forced commutation of SCR where capacitor C performs the
commutation. Assuming the SCRs are switches with SCR1 ON andSCR2
OFF, current flows through the load and C as shown in Fig. 3.12.
(v) When SCR2 is triggered on,C is effectively paralleled across SCR1. The
charge on C is then opposite to SCR1’s forward voltage,SCR1 is thus
turned off and the current is transferred to R–SCR2 path.

Fig 3.12 commutation circuit

3.4.6 Features and benefits of SCR power controllers over other forms of power
control include:
 26

High reliability:
Because the SCR power controller is a solid-state device, there are no inherent
wear-out modes. Thus, they provide virtually limitless and trouble free
operation.

Infinite resolution:
Power, current or voltage can be controlled from zero to 100% with infinite
resolution. This capability allows extremely accurate, step less control of the
process.

Extremely fast response:

The SCR controller can switch load power on and off extremely fastproviding
the means to respond rapidly to command changes, load changes and power
supply changes.
This feature allows the control of fast responding loads and eliminates the
negative effects of variations in load or supply voltages that can occur with other
types of control. This really helps increase heater life.

Selectable power control parameters:

The SCR power controller can control the average load voltage, the RMS value
of the load voltage, the RMS or the average load current or load power. It can
also provide useful features such as current and voltage limiting. The ability to
control the desired parameter as a function of a command signal and to
incorporate limiting features is not normally available with other types
of control.

Minimum Maintenance:
Because they are solid state there are no moving parts to wear out or replace.
 27

Therefore, the routine replacement required in some forms of power control is

eliminated.

CHAPTER4

MICROCONTROLLERS
4.1 HIGH-PERFORMANCE RISC CPU:

 Only 35 single-word instructions to learn

 All single-cycle instructions except for programbranches, which are two-cycle
 Operating speed: DC – 20 MHz clock inputDC – 200 ns instruction cycle
 Up to 8K x 14 words of Flash Program Memory,Up to 368 x 8 bytes of Data
Memory(RAM),Up to 256 x 8 bytes of EEPROM Data Memory
 Pinout compatible to other 28-pin or 40/44-pinPIC16CXXX and
PIC16FXXX
Microcontrollers

4.2 PERIPHERAL FEATURES:

 28

 Timer0: 8-bit timer/counter with 8-bit prescaler

 Timer1: 16-bit timer/counter with prescaler, can be incremented during Sleep
via external crystal/clock
 Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler
 Two Capture, Compare, PWM modules
• Capture is 16-bit, max. resolution is 12.5 ns
• Compare is 16-bit, max. resolution is 200 ns
• PWM max. resolution is 10-bit
 Synchronous Serial Port (SSP) with SPI™(Master mode) and I2C™
(Master/Slave)
 Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI)
with 9-bit address detection
 Brown-out detection circuitry for Brown-out Reset (BOR)

4.3 SPECIAL MICROCONTROLLER FEATURES:

 100,000 erase/write cycle Enhanced Flash program memory typical

 1,000,000 erase/write cycle Data EEPROM memory typical
 Data EEPROM Retention > 40 years
 Self-reprogrammable under software control
 In-Circuit Serial Programming™ (ICSP™) via two pins
 Single-supply 5V In-Circuit Serial Programming
 Programmable code protection
 Power saving Sleep mode
 Selectable oscillator options

4.4 PIN DIAGRAM

 29

Figure 4.1Pin diagram of 18F452

4.5 PIC18F452 BLOCK DIAGRAM

 30

fi
g4.2: Architecture of pic18f452

4.6 CAPTURE/COMPARE/PWMMODULES
 31

Each Capture/Compare/PWM (CCP) module containsa 16-bit register

which can operate as a:

• 16-bit Capture register

• 16-bit Compare register

• PWM Master/Slave Duty Cycle register

Both the CCP1 and CCP2 modules are identical in operation, with the
exception being the operation of the special event trigger. Table 8-1 and Table 8-
2 show the resources and interactions of the CCP module(s). Inthe following
sections, the operation of a CCP module described with respect to CCP1. CCP2
operates the same as CCP1 except where noted.

4.6.1 CCP1 Module:

Capture/Compare/PWM Register 1 (CCPR1) is comprised of two 8-bit

registers: CCPR1L (low byte) andCCPR1H (high byte). The CCP1CON register
controls the operation of CCP1. The special event triggersis generated by a
compare match and will reset Timer1.

4.6.2 CCP2 Module:

Capture/Compare/PWM Register 2 (CCPR2) is comprised of two 8-bit

registers: CCPR2L (low byte) and CCPR2H (high byte). The CCP2CON register
controls the operation of CCP2. The special event trigger is generated by a
compare match and will reset Timer1 and start an A/D conversion (if the A/D
module is enabled).

TABLE 4.1: Interaction of two CCP modules

 32

CCP1CON REGISTER/CCP2CON REGISTER

Bit 7-6 Unimplemented: Read as ‘0’

Bit 5-4 CCPxX:CCPxY: PWM Least Significant bits
Capture mode:Unused.
Compare mode: Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found
in CCPRxL.
bit 3-0 CCPxM3:CCPxM0: CCPx Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCPxIF bit is set)
1001 = Compare mode, clear output on match (CCPxIF bit is set)
 33

1010 = Compare mode, generate software interrupt on match (CCPxIF bit is set,
CCPx pin is unaffected)
1011 = Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is
unaffected); CCP1resets TMR1; CCP2 resets TMR1 and starts an A/D
conversion (if A/D module is enabled)
11xx = PWM mode

4.7 CAPTURE MODE

In Capture mode, CCPR1H:CCPR1L captures the 16-bit value of the
TMR1 register when an event occurs on pin RC2/CCP1. An event is defined as
one of the following:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
The type of event is configured by control bits, CCP1M3:CCP1M0
(CCPxCON<3:0>). When a capture is made, the interrupt request flag bit,
CCP1IF(PIR1<2>), is set. The interrupt flag must be cleared in software. If
another capture occurs before the value in register CCPR1 is read, the old
captured value is over written by the new value
4.7.1 Capture Mode Operation Block Diagram

Fig 4.3 Block diagram of capture mode

 34

4.7.2 Timer1 Mode Selection

Timer1 must be running in Timer mode, or Synchronized Counter mode,
for the CCP module to use the capture feature. In Asynchronous Counter mode,
theCaptureoperation may not work.
Software interrupt
When the Capture mode is changed, a false capture interrupt may be
generated. The user should keep bitCCP1IE (PIE1<2>) clear to avoid false
interrupts and should clear the flag bit, CCP1IF, following any such change in
operating mode.

CCP prescaler
There are four prescaler settings, specified by bitsCCP1M3:CCP1M0.
Whenever the CCP module is turned off, or the CCP module is not in Capture
mode,the prescaler counter is cleared. Any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may generate an
interrupt. Also, the prescaler counter will not be cleared; therefore, the first
capture may be from a non-zero prescaler. Example 8-1 shows the
recommendedmethod for switching between capture prescalers. This example
also clears the prescaler counter and will not generate the “false” interrupt.

4.8 PWM MODE (PWM)

In Pulse Width Modulation mode, the CCPx pin produces up to a 10-bit
resolution PWM output. Since the CCP1 pin is multiplexed with the PORTC
data latch, the TRISC<2> bit must be cleared to make the CCP1pin an output.
Fig4.4 shows a simplified block diagram of the CCP module in PWM
mode. For a step-by-step procedure on how to set up the CCP module for PWM
operation, see Section 8.3.3 “Setup for PWM Operation”.
 35

4.8.1 Simplified Pwm Block Diagram

Fig4.4 Block diagram for pwm opeartion

4.8.2 PWM OUTPUT

Fig4.5 Pwm output

 36

4.8.3 PWM PERIOD

The PWM period is specified by writing to the PR2register. The PWM
period can be calculated using the following formula:
PWM Period = [(PR2) + 1] • 4 • TOSC •(TMR2 Prescale Value)
PWM frequency is defined as 1/ [PWM period].
When TMR2 is equal to PR2, the following three events occur on the next
increment cycle:
 TMR2 is cleared
 The CCP1 pin is set (exception: if PWM duty cycle = 0%, the CCP1 pin
will not be set)
 The PWM duty cycle is latched from CCPR1L intoCCPR1H

4.8.4 PWM DUTY CYCLE

The PWM duty cycle is specified by writing to theCCPR1L register and to the
CCP1CON<5:4> bits. Up to 10-bit resolution is available. The CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the twoLSbs. This 10-bit value
is represented byCCPR1L:CCP1CON<5:4>. The following equation is used to
calculate the PWM duty cycle in time:
PWM Duty Cycle =(CCPR1L:CCP1CON<5:4>) •TOSC • (TMR2 Prescale
Value)
CCPR1L and CCP1CON<5:4> can be written to at anytime, but the duty cycle
value is not latched intoCCPR1H until after a match between PR2 and
TMR2occurs (i.e., the period is complete). In PWM mode,CCPR1H is a read-
only register. The CCPR1H register and a 2-bit internal latch are used to double-
buffer the PWM duty cycleThisdouble-buffering is essential for glitch-free
PWM operation. When the CCPR1H and 2-bit latch match TMR2, concatenated
with an internal 2-bit Q clock or 2 bits of the TMR2 prescaler, the CCP1 pin is
cleared.
 37

4.9 FEATURES
 C compiler Optimized RISC architecture

 10 MIPS speed, 8bit, 77 instructions

 Analog to Digital converter, 8 channels, 10 bit,

 200Ksps ADC Module

 Self-Programming

 40 MHz Max Speed, + internal oscillator

 LIN USART

 2 PWM 10 bit

 Dedicated In-Circuit Debugging hardware

 Parallel + serial interfaces, RS-232, RS-485

 3 External Interrupts

 100,000 re-write cycles for program memory, 1,000,000 for data

EEPROM

CHAPTER 5
 38

CAPACITOR BANK
Frequency is standardized at constant 50 Hz, or 60 Hz;power factor
correction is veiled as a solution to such fixed network frequency, the only key
solution is by addition of capacitor in shunt to the load. Capacitors are
commonly used within a lot of power system, especially electronic constructed
circuitry. Though common it is consequently least understood by majority as one
most beneficial component for power system.
• Release of system capacity
• Reduction of kVAR generation requirements
• Reduction of system loss
• Regulation or improvement in voltage
These benefits require only small amount of investment and maintenance
compare to a lot of power system components. Budgeting expenses itself already
a solid reason for why capacitors are most welcome in many powersystem. In
three-phase power system, capacitors normally installed within an isolating non-
conductor metal box, which called capacitor bank; they are either fixed or
switched. Fixed banks are connected permanently to the primary conductors
through fused switches. Switched banks are tied to the primary system through
automated switches, allowing them to be put on line and taken offline as needed.
Distribution power system usually connects capacitor in parallel (shunt) rather
connecting in series. The function of shunt power capacitor is to provide leading
(capacitive) kVARs to an electrical system when and where needed. Lagging
(inductive)kVARs appear when there are inductors (coils) exist within electrical
(e.g. motor) or electronic (personal computer) equipments, as the amount grows.

The increment of inductive kVARs will increase as well, thus the demand
of capacitive kVARs to compensate is pretty much required in order to reduce
 39

unnecessary lost. The actual capacitor in farads of a capacitor bank can be

calculated using the following equation:

where, VAR = capacitor unit VAR rating

C = capacitor (farads)
f = frequency (cycles/second)
VR = capacitor unit rated voltage
5.1 RELATIONSHIP OF CAPACITOR WITH POWER FACTOR
Capacitor is the main component that supplies capacitive reactance, which
is negative reactive power. Since, the power factor is the ratio of real power and
apparent power, where apparent power has the relation wither active power and
real power as shown in the power triangle in fig5.1. As majority power system
has inductive loads thus normally only lagging power factor Occurs hence
capacitors are used to compensate by producing leading current to the load to
reduce the lagging current, thereby shrink the phase angle distance between the
real power and apparent power.

Fig5.1: Power triangle

Table5.1 list a number of common loads appears in general industrial

systems and their typical power factor. In general, power capacitors shall be Y-
 40

connected on the three-phase distribution feeder. Grounding the neutral is

essential for the fuses to operate in case of any event of capacitor fault. For a
small ungrounded Y-connected capacitor bank, faulty capacitor would not blow
the fuse to isolate faulty capacitor. Any event of this could lead to an explosion
to the capacitor bank. However, isolating the neutral of the Y-connected of a
capacitor bank has the advantage of reducing harmonics.(Quote) The method can
only be an alternative when grounding the neutral would cause operating
difficulty for a particular installation. In case of insulation failure inside the unit,
phase-to-ground fault can still occurs to anungrounded-connected capacitor
bank even with its enclosure properly grounded. The most effective solution is to
insert reactors in series with each capacitor group connected between the phase
wire and the neutral of a 3-phase bank. This method issued to mitigate any
resonant circuit, while reduction of induction triple harmonic frequency current
can be made

5.2 DETERMINE SIZE OF CAPACITOR BANKS

Standard capacitor sizes are 50, 100, 150, 200, 300 and400 kVAR. Since
three-phase installations are pretty much the same as single-phase installation,
which single phase is just one of the phase among three phase connection. Of
course, the formula for both phases will be different. Since capacitors can be
connected more than one per phase in order to increase the bank size, it is
recommended to select two or at most three capacitor unit sizes to avoid stocking
the sizes.

Table 5.1: Typical power factors of end use equipment

 41

Fig 5.2 Reactive current without capacitor

Fig 5.3: Reactive current with capacitor (maximum loss reduction)

In a fixed capacitor installation, one should at first determine desired
power factor value before attempting to design one. By installing fixed capacitor
 42

can approximately improve the power factor around 94% to 96%. Higher power
factor may only be acquired with switched capacitor banks. When using
switched capacitor to correct the power factor of a circuit, the switch control is
set to close the bank onto the line when the load KVARs equal two thirds of the
bank’s rated KVAR. This scheme is tend to reduce loss by driving the line
leading with first turn on before it is turn off, this is referred as the “two-thirds
rule.” Taking a daily load cycle, as shown in figure 5.2 Compare with fixed
capacitor bank, switching capacitor bank is generally more expensive thus it is
essential to take accounting of the cost of installation so that its time value worth
for the investment.

CHAPTER 6
SOFTWARE DEVELOPMENT ENVIRONMENT
 43

6.1 INTRODUCTION TO MIKRO C

Mikro C is a powerful, feature rich development tool for PIC micros. It is
designed to provide the programmer with the easiest possible solution for
developing Applications for embedded systems, without compromising
performance or control. PIC and C fit together well: PIC is the most popular 8-
bit chip in the world, used in a wide variety of applications, and C, prized for its
efficiency, is the natural choice for developing embedded systems.Mikro C
provides a successful match featuring highly advanced IDE, ANSI compliant
compiler, broad set of hardware libraries, comprehensive documentation, and
plenty of ready-to-run examples.

6.1.1 FEATURES OF MIKRO C

Mikro C allows you to quickly develop and deploy complex applications:
 Write your C source code using the built-in Code Editor (Code and
Parameter Assistants, Code Folding, Syntax Highlighting, Auto
Correct, Code Templates, and more.)
 Use included mikro C PRO for PIC libraries to dramatically speed up
the development: data acquisition, memory, displays, conversions,
communication etc.
 Monitor your program structure, variables, and functions in the Code
Explorer.
 Generate commented, human-readable assembly, and standard HEX
compatible with all programmers.
 Use the integrated mikro ICD (In-Circuit Debugger) Real-Time
debugging tool to monitor program execution on the hardware level.
 Inspect program flow and debug executable logic with the
integrated Software Simulator.
 44

 Generate COFF(Common Object File Format) file for software and

hardware debugging under Microchip's MPLAB software.
 Active Comments enable you to make your comments alive and
interactive.
 Get detailed reports and graphs: RAM and ROM map, code statistics,
assembly listing, calling tree, and more.

6.1.2 Compilation and Assembling.

As shown Mikro C code needs two steps to be transformed to Machine code,

the first step is to transform the C code to Assembly code, which is called
Compilation.
The second step is to transform the Assembly code to Machine Code, and this
process is called Assembling. So, In spite of being easy to write your code in C
Language, Mikro C Language is slower than the Assembly language because it
needs two steps to be transformed to machine language

6.2INTRODUCTION TOPROTEUS VSM

Proteus Virtual System Modeling (VSM) combines mixed mode SPICE

circuit simulation, animated components and microprocessor models to facilitate
 45

co-simulation of complete microcontroller based designs. For the first time ever,
it is possible to develop and test such designs before a physical prototype is
constructed.

This is possible because you can interact with the design using on screen
indicators such as LED and LCD displays and actuators such as switches and
buttons. The simulation takes place in real time (or near enough to it): a 1GMHz
Pentium III can simulate a basic 8051 system clocking at over 12MHz. Proteus
VSM also provides extensive debugging facilities including breakpoints, single
stepping and variable display for both assembly code and high level language
source.

6.2.1Schematic Entry

Proteus VSM uses our proven Schematic Capture software to provide the
environment for design entry and development. ISIS is a long established
product and combines ease of use with powerful editing tools. It is capable of
supporting schematic capture for both simulation and PCB design. Designs
entered in to Proteus VSM for testing can be net listed for PCB layout either
with our own PCB Design products or with third party PCB layout tools. ISIS
also provides a very high degree of control over the drawing appearance, in
terms of line widths, fill styles, fonts, etc. These capabilities are used to the full
in providing the graphics necessary for circuit animation.

6.2.2Circuit Simulation

At the heart of Proteus VSM is ProSPICE. This is an established product

that combines uses a SPICE3f5 analogue simulator kernel with a fast event-
 46

driven digital simulator to provide seamless mixed-mode simulation. The uses of

a SPICE kernel lets you utilize any of the numerous manufacturer-supplied
SPICE models now available and around 6000 of these are included with the
package.

Proteus VSM includes a number of virtual instruments including an

Oscilloscope, Logic Analyzer, Function Generator, Pattern Generator, Counter
Timer and Virtual Terminal as well as simple voltmeters and ammeters. In
addition, we provide dedicated Master/Slave/Monitor mode protocol analyzers’
for SPI and I2C - simply wire them onto the serial lines and monitor or interact
with the data live during simulation. A truly invaluable (and inexpensive) way to
get your communication software right prior to hardware prototyping.

6.3 MCU SIMULATION OVERVIEW

The most exciting and important feature of Proteus VSM is its ability to
simulate the interaction between software running on a microcontroller and any
analog or digital electronics connected to it.

The micro-controller model sits on the schematic along with the other
elements of your product design. It simulates the execution of your object code
(machine code), just like a real chip. If the program code writes to a port, the
logic levels in circuit change accordingly, and if the circuit changes the state of
the processor's pins, this will be seen by your program code, just as in real life.

The VSM CPU models fully simulate I/O ports, interrupts, timers,
USARTs and all other peripherals present on each supported processor. It is
anything but a simple software simulator since the interaction of all these
peripherals with the external circuit is fully modeled down to waveform level
and the entire system is therefore simulated.VSM can even simulate designs
 47

containing multiple CPUs, since it is a simple enough matter to place two or

more processors on a schematic and wire them together.

6.4 PROTEUS VSM FOR PIC 16

Proteus VSM for PIC16 contains everything you need to develop, test and
virtually prototype your embedded system designs based around the Microchip
Technologies PIC16 series of microcontrollers. The unique nature of schematic
based microcontroller simulation with Proteus facilitates rapid, flexible and
parallel development of both the system hardware and the system firmware. This
design synergy allows engineers to evolve their projects more quickly,
empowering them with the flexibility to make hardware or firmware changes at
will and reducing the time to market.

CHAPTER 7

RESULTS

7.1 SIMULATION RESULT IN PROTEUS:

 48

7.1.1 Phase angle difference between voltage and current

(+) U3(V+)

U3
TR2

7
1
+2.66
AC mA
3
6
2
+170 R2
100R
AC Volts
R1

4
5
LM741
1000R
L1
19H U4(V+)
TRAN-2P2S
U4

7
1
U1(V+) 3
6 LCD1
2 LM016L

4
5
LM741
U1
TR1 7
3 1

VDD
VSS
VEE
6

RW
RS

D0
D1
D2
D3
D4
D5
D6
D7
A

E
2
B RV1

1
2
3
4
5
6
7
8
9
10
11
12
13
14
+5.36
4
5

AC Volts LM741 C

D
U2(V+)
TRAN-2P2S
1k

U2 U7:A U5
1 1 15
7
1

RE3/MCLR/VPP RC0/T1OSO/T1CKI
3 16
3 RC1/T1OSI/CCP2
2 2 17
6 RA0/AN0/ULPWU/C12IN0- RC2/P1A/CCP1
3 18
2 RA1/AN1/C12IN1- RC3/SCK/SCL
74HC86 4 23
RA2/AN2/VREF-/CVREF/C2IN+ RC4/SDI/SDA
5 24
RA3/AN3/VREF+/C1IN+ RC5/SDO
6 25
RA4/T0CKI/C1OUT RC6/TX/CK
4
5

LM741 7 26
RA5/AN4/SS/C2OUT RC7/RX/DT
14
RA6/OSC2/CLKOUT
13 19
RA7/OSC1/CLKIN RD0
20
RD1
33 21
RB0/AN12/INT RD2
34 22
RB1/AN10/C12IN3- RD3
35 27
RB2/AN8 RD4
36 28
RB3/AN9/PGM/C12IN2- RD5/P1B
37 29
RB4/AN11 RD6/P1C
38 30
RB5/AN13/T1G RD7/P1D
39
RB6/ICSPCLK
40 8
RB7/ICSPDAT RE0/AN5
9
RE1/AN6
10
RE2/AN7
PIC16F887

Fig: Phase angle difference between voltage and current

7.1.2 Actual power factor

 49
RV1
2k
+0.07 66%
U3(V+)
AC Amps
C4 TR2
+2.40
+0.91 AC mA
AC Amps C3 55u
+162 U3
AC Volts

7
1
60u
C2
+0.96 R2 3
V1 AC Volts 0.4k 6
VSINE 2

50u
TRAN-2P2S

4
5
LM741
D1
L1 R1
5H 100R UF4002 C1

10u

B
U1(V+)
U7:A
TR1 1 C

U1
3 LCD1 D
LM741 2 LM016L
7
1

74HC86
+5.12 3
6
AC Volts
2

NAME=$IOSCILLOSCOPE
U2(RA1/AN1)
4
5

U6:A(VCC) V=1.12383

VDD
VSS
VEE
TRAN-2P2S

RW
RS

D0
D1
D2
D3
D4
D5
D6
D7
VCC U2

E
U6:A 13
OSC1/CLKI RC0/T1OSO/T1CKI
15

1
2
3
4
5
6
7
8
9
10
11
12
13
14
4 1 16
MCLR/VPP RC1/T1OSI/CCP2A
17
T73S5D15-5V RC2/CCP1
RL1 3 2
RA0/AN0 RC3/SCK/SCL
18
1 3 23
2
RL4 U5:B(VCC) RA1/AN1 RC4/SDI/SDA
4 24
RA2/AN2/VREF- RC5/SDO
V4 U5:B 5
RA3/AN3/VREF+ RC6/TX/CK
25 VCC
4 6 26
VSINE 11 RA4/T0CKI RC7/RX/DT
TS954ID 7
5 RA5/AN4/SS/LVDIN
14 19
7 U4 RA6/OSC2/CLKO RD0/PSP0
20
6 20 1 RD1/PSP1
33 21
T73S5D15-5V V3 19 2 34
RB0/INT0 RD2/PSP2
22
18 3 RB1/INT1 RD3/PSP3
35 27
11 17 4 RB2/INT2 RD4/PSP4
TS954ID 36 28
RL2 16 5 37
RB3/CCP2B RD5/PSP5
29
15 6 RB4 RD6/PSP6
38 30
VSINE 14 7 RB5/PGM RD7/PSP7
U5:A 39
V2 4 13 8 40
RB6/PGC
8
VSINE 12 9 RB7/PGD RE0/RD/AN5
9
11 10 RE1/WR/AN6
3 10
RE2/CS/AN7
1
2 LED-BARGRAPH-RED PIC18F452
T73S5D15-5V TS954ID

11

Fig: Actual power factor

 50

7.1.3 Capacitor value calculation

RV1
2k
+0.07 66%
U3(V+)
AC Amps
C4 TR2
+2.40
+0.91 AC mA
AC Amps C3 55u
+162 U3
AC Volts

7
1
60u
C2
+0.96 R2 3
V1 AC Volts 0.4k 6
VSINE 2

50u
TRAN-2P2S

4
5
LM741
D1
L1 R1
5H 100R UF4002 C1

10u

B
U1(V+)
U7:A
TR1 1 C

U1
3 LCD1 D
LM741 2 LM016L
7
1

74HC86
+5.12 3
6
AC Volts
2

NAME=$IOSCILLOSCOPE
U2(RA1/AN1)
4
5

U6:A(VCC) V=1.1231

VDD
VSS
VEE
TRAN-2P2S

RW
RS

D0
D1
D2
D3
D4
D5
D6
D7
VCC U2

E
U6:A 13
OSC1/CLKI RC0/T1OSO/T1CKI
15

1
2
3
4
5
6
7
8
9
10
11
12
13
14
4 1 16
MCLR/VPP RC1/T1OSI/CCP2A
17
T73S5D15-5V RC2/CCP1
RL1 3 2
RA0/AN0 RC3/SCK/SCL
18
1 3 23
2
RL4 U5:B(VCC) RA1/AN1 RC4/SDI/SDA
4 24
RA2/AN2/VREF- RC5/SDO
V4 U5:B 5
RA3/AN3/VREF+ RC6/TX/CK
25 VCC
4 6 26
VSINE 11 RA4/T0CKI RC7/RX/DT
TS954ID 7
5 RA5/AN4/SS/LVDIN
14 19
7 U4 RA6/OSC2/CLKO RD0/PSP0
20
6 20 1 RD1/PSP1
33 21
T73S5D15-5V V3 19 2 34
RB0/INT0 RD2/PSP2
22
18 3 RB1/INT1 RD3/PSP3
35 27
11 17 4 RB2/INT2 RD4/PSP4
TS954ID 36 28
RL2 16 5 37
RB3/CCP2B RD5/PSP5
29
15 6 RB4 RD6/PSP6
38 30
VSINE 14 7 RB5/PGM RD7/PSP7
U5:A 39
V2 4 13 8 40
RB6/PGC
8
VSINE 12 9 RB7/PGD RE0/RD/AN5
9
11 10 RE1/WR/AN6
3 10
RE2/CS/AN7
1
2 LED-BARGRAPH-RED PIC18F452
T73S5D15-5V TS954ID

11

Fig: Capacitor value calculation

 51

7.1.4 After power factor correction

RV1
2k
+0.15 55%
U3(V+)
AC Amps
C4 TR2
+4.59
+0.87 AC mA
AC Amps C3 55u
+162 U3
AC Volts

7
1
60u
C2
+1.83 R2 3
V1 AC Volts 0.4k 6
VSINE 2

50u
TRAN-2P2S

4
5
LM741
D1
L1 R1
5H 100R UF4002 C1

10u

B
U1(V+)
U7:A
TR1 1 C

U1
3 LCD1 D
LM741 2 LM016L
7
1

74HC86
+5.11 3
6
AC Volts
2

NAME=$IOSCILLOSCOPE
U2(RA1/AN1)
4
5

U6:A(VCC) V=2.10427

VDD
VSS
VEE
TRAN-2P2S

RW
RS

D0
D1
D2
D3
D4
D5
D6
D7
VCC U2

E
U6:A 13
OSC1/CLKI RC0/T1OSO/T1CKI
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
4 1 16
MCLR/VPP RC1/T1OSI/CCP2A
17
3 T73S5D15-5V RC2/CCP1
RL1 2
RA0/AN0 RC3/SCK/SCL
18
1
2
RL4 U5:B(VCC) 3
RA1/AN1 RC4/SDI/SDA
23
4 24
RA2/AN2/VREF- RC5/SDO
V4 U5:B 5
RA3/AN3/VREF+ RC6/TX/CK
25 VCC
4 6 26
VSINE 11 RA4/T0CKI RC7/RX/DT
TS954ID 7
5 RA5/AN4/SS/LVDIN
14 19
7 U4 RA6/OSC2/CLKO RD0/PSP0
20
6 20 1 RD1/PSP1
33 21
T73S5D15-5V V3 19 2 34
RB0/INT0 RD2/PSP2
22
18 3 RB1/INT1 RD3/PSP3
35 27
11 17 4 RB2/INT2 RD4/PSP4
TS954ID 36 28
RL2 16 5 37
RB3/CCP2B RD5/PSP5
29
15 6 RB4 RD6/PSP6
38 30
VSINE 14 7 RB5/PGM RD7/PSP7
U5:A 39
V2 4 13 8 40
RB6/PGC
8
VSINE 12 9 RB7/PGD RE0/RD/AN5
9
11 10 RE1/WR/AN6
3 10
RE2/CS/AN7
1
2 LED-BARGRAPH-RED PIC18F452
T73S5D15-5V TS954ID

11

Fig: After power factor correction

 52

7.2 FOR RESISTIVE LOAD

7.3 FOR INDUCTIVE LOAD

 53

7.4 X-OR GATE OUTPUT

COLOUR REPRESENTATION:

input wave form current wave form

voltage wave form XOR wave form

7.5POWER FACTOR CALCULATION

Φ=(τ/T)*360
τ=2.19ms
T=19.75ms
Φ=39.9
Cos Φ=0.76
 54

Table 7.1 power fctor calculation

SL.NO ON TIME(τ) TOTAL PHASE POWER
In (ms) TIME(T) FACTOR(Cos
ANGLE
In (ms) Φ)
Φ= (τ/T)*360

1 1.30 8.40 55.71 0.66

2 1.0 8.80 40.91 0.75
3 2.30 8.30
7.6CAPACITOR CALCULATION 99.76 0.16
4 1.20 8.30 52.04 0.26
Apparent power=VI
Real power=VI cosφ
Reactive power(Qc)=√(app.power²-real power²)
Capacitive reactance(Xc)=V²/Qc
Capacitor=1/2лf Xc

Table 7.2 capacitance calculation

SL. VOLTAGE CURRENT POWER REAL REACTIVE APPARENT CAPACITIVE Capacitor=1
NO (V) (I) FACTOR(c POWER POWER((Qc)= POWER REACTANCE /2лf Xc
osφ) (P=VI cosφ) √(app.power²- (S=VI) (Xc=V²/Qc)
real power²)

1 230 5 0.6 690 920 1150 58 59.4

2 230 5 0.5 575 996 1150 53.11 60
3 230 5 0.4 460 1054 1150 50 63.7
4 230 5 0.35 402.5 1077 1150 49 65
5 230 5 0.2 230 1127 1150 47 68
6 230 5 0.1 115 1144 1150 46 69.2
7 230 5 0.75 862.5 760.6 1150 69.5 45.4
 55

CHAPTER 8
CONCLUSION
A PIC microcontroller based power factor controller is capable of adding
capacitor banks across the load automatically when the power factor is lagging
and is capable of removing capacitor banks from load when there is leading
power factor. This work also facilitates to monitor the power factor changes on
LCD in real time basis This is suitable for applications where manual switching
of capacitors is to be replaced by automatic switching.
 56

REFERENCES

1. Nagarajan.M and Kandasamy.K.V,(2012)”optimal power factor correction

using pic micro controller”
2. H.saadat (1999),“Power System Analysis”, McGrawHill,
3. Nadarbarsoum,”Programming of pic microcontroller for power factor
correction”
4. M.E.EI-Hawary, Electrical Power System Design and Analysis.
5. www.microchip.com.
6. VinayaSkanda,Minimizing Cost and Power loss by Optimal Placement of
Capacitor using ETAP- Microchip Technology Inc.
7. D. Roy Choudhury and ShailJain (1994), Linear Integrated Circuits, Wiley
Eastern Ltd.
8. L. ShrimanthSudheer, S.S. PatilJl.(March 2009),Microcontroller based
phase meter of Instrum.Soc. of India Vol. 39 No. 1
9. B.C. Kok,C. Uttraphan, and H.H. Goh, A Conceptual Design of
Microcontroller-Based Power Factor Corrector Circuit by