Chapter 4: Processor Fundamentals

4.1 Central Processing Unit (CPU) Architecture

4.2 Assembly Language

4.3 Bit manipulation

21/10/2022 By: Noureddine Tadjerout 1

 Resources:

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 Resources:

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international-as-and-a-level-computer-science-9618/published-resources/
Lesson Objectives:

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4.1 Central Processing Unit (CPU) Architecture
4.1.1: The von Neumann model of a computer system
Watch the video for the Von Neumann Architecture
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4.1.1: The von Neumann model of a computer system
John von Neumann was the first person to describe the basic principles of a computer system and its
architecture

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4.1.1: The von Neumann model of a computer system
John von Neumann was the first person to describe the basic principles of a computer system and its
architecture in a publication.

The model von Neumann described has the following basic features:

There is a processor - the central processing unit (CPU).

The processor has direct access to memory.
The memory contains a ‘stored program’ (which can be replaced by another at any time) and the data
required by the program.
The stored program consists of individual instructions.
The processor executes instructions sequentially.

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4.1.1: The von Neumann model of a computer system
Von Neumann layout
Figure 4.1.2 shows a slightly more detailed diagram of the von Neumann architecture. It brings to our
attention another new concept in this computer model – the idea of ADDRESSES and REGISTERS. Addresses
indicate where the data is stored and registers are needed so that data can be manipulated within the
computer..

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4.1.1: The von Neumann model of a computer system

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4.1.1: The von Neumann model of a computer system

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4.1.1: The von Neumann model of a computer system

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4.1.1: The von Neumann model of a computer system

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4.1.1: The von Neumann model of a computer system

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4.1.1: The von Neumann model of a computer system

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4.1.1: The von Neumann model of a computer system

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4.1.1: The von Neumann model of a computer system

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4.1.2: Central processing unit (CPU) architecture
Watch the video for design and implementation of CPU
https://www.youtube.com/watch?v=fcroyPCRllo
4.1.2: Central processing unit (CPU) architecture
Watch the video for design and implementation of CPU
https://www.youtube.com/watch?v=2ls7B5D2Ya8
4.1.2: Central processing unit (CPU) architecture
Watch the video for How a CPU Works
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4.1.2: Central processing unit (CPU) architecture
4.1.2: Central processing unit (CPU) architecture
4.1.2: Central processing unit (CPU) architecture
Purpose of the Central Processing Unit ( CPU)
The purpose of the CPU is to carry out the set of instructions given to the processor from a program.

This is done through a combination of:

Arithmetic
logic
input / output operations
control operations

Instructions are usually written by programmers in high level languages because they are easier for humans
and write, understand and maintain, but these need to translated in to the binary instructions that a
computer can process.

Compiling vs Interpreting

With some programming languages (such as C) this translation needs to be done before you
can run the script, using a process known as compiling. These programming languages tend to
be highly efficient and therefore good for processor intensive tasks, e.g. 3D Gaming, Video
Editing.
4.1.2: Central processing unit (CPU) architecture
Purpose of the Central Processing Unit ( CPU)
With other languages (such as Python) this translation is done as the script is being executed;
this is a process known as interpreting. Interpreted languages tend to be much quicker to
develop (because your script does not need to be compiled every time you make a change to
the file) but are less efficient than the compile languages.
4.1.2: Central processing unit (CPU) architecture

Location of the CPU

The CPU is located on the motherboard, in the CPU socket.
The CPU produces a great deal of heat, which needs to be drawn away quickly, otherwise the
CPU would overheat. You usually cannot see the CPU because it is normally hidden by
the heat-sink and the CPU fan. The heat-sink is usually a large cube shaped piece of metal with
lots of fins. On top of the heat-sink sits a fan, which blows the heat away from the heat-sink
and into the PC case.

The heat-sink is normally bonded to the CPU with a special thermal paste, this is because
otherwise there would be a tiny layer of air between the CPU and the heat-sink and this would
interfere with the conduction of heat from the CPU to the heatsink.
Micro-controllers like the Raspberry Pi usually don’t need a heat-sink and fan fitted, because
they are highly efficient low-power processors(the same as the ones used in a mid-range
smartphone) but sometimes if they are used as media centres or over-clocked for gaming, then
a heat-sink might be used.
4.1.2: Central processing unit (CPU) architecture
Example 1 – Displaying a cat image on screen
To display an image of a cat the computer needs to:

INPUT – Wait for the user to click their mouse on a cat link.

CONTROL – Tell the hard drive to look for that image on the disk

LOGIC – If the hard drive can find the image, send the image to the main memory

ARITHMETIC – Calculate where on the screen each pixel is to be displayed

OUTPUT – For each pixel tell the LCD monitor it’s RGB value (the screen calculated
how bright to turn on each RGB LED
4.1.2: Central processing unit (CPU) architecture
CPU Performance
CPU performance is affected by a number of key characteristics:

Clock Speed or System clock

A system clock is used to produce timing signals on the control bus to ensure this vital
synchronization takes place – without the clock the computer would simply crash.

The processor requires a clock to work correctly. A clock cycle is equivalent to 1Hz, ie one cycle
per second. The speed of a computer is usually at gigahertz (GHz) level, equivalent to billions of
cycles per second. Typical clock speeds of today's CPUs range from 2 to 4GHz.

a 3.2 Ghz processor can process 3,200,000,000 processes per second, in theory. This is
dependent of course on the processor receiving all the instructions it needs from the main
memory.
4.1.2: Central processing unit (CPU) architecture
CPU Performance
Immediate access store (IAS)
The IAS holds all the data and programs that the processor (CPU) needs to access. The CPU
takes data and programs held in backing store and puts them into the IAS temporarily. This is
done because read/write operations carried out using the IAS are considerably faster than
read/write operations to backing store. Consequently, any key data needed by an application
will be stored temporarily in IAS to speed up operations. The IAS is another name for primary
(RAM) memory.
Cache Size:
In order to ensure that the next instruction is loaded and ready to be processed by the CPU,
commonly executed instructions are stored in the Cache memory area of the CPU. The larger
the cache memory, the more commonly used instructions can stored and therefore it is less
likely that the CPU will have to stop and wait for instructions to be loaded. Modern CPUs have
a cache size up to 1 or 2 Megabytes.

Cache is a small amount of high-performance RAM (random access memory) built into the
CPU. This amount of RAM will store the data used by the processor many times and it does not
require the use of space from the system memory. This type of data plays a very important role
in the rapid processing of games, video editors and other applications on the system.
4.1.2: Central processing unit (CPU) architecture
CPU Performance

Number of cores
Many modern computers contain dual, quad or even 8 core processors (effectively 8 separate
CPUs on one chip). Most computers are used for multitasking applications, for example you
might be listening to music playing on YouTube at the same time as playing a computer game.
The most efficient way to handle multitasking is to assign one core of the processor to one
particular application. This means that if one core has to wait from data to load from the hard
disk, the other cores are not affected.
The overall theoretical speed of a processor can be calculated by multiplying the number of
cores by the processor speed.
e.g.
4.2 Ghz Dual Core processor = 4.2 x 2 = 8.4Ghz
2.2 Ghz Quad Core processor = 2.2 x 4 = 8.8Ghz
4.1.2: Central processing unit (CPU) architecture
CPU Performance
Number of cores
Although the 4.2 Ghz processor has a higher base speed, the quad core processor has a higher
effective speed.
Quad core processors only run faster than single core processors if the operating system and
software being used is able to take advantage of multi-threading, otherwise the extra cores will
merely sit idle.
4.1.2: Central processing unit (CPU) architecture
CPU Performance
Word length
Word length is the word length of the CPU. This is the number of bits that the CPU can handle
simultaneously within a specific time period. For example, 32-bit processors offer faster
processing speeds than 16-bit processors because it simply has a wider word length. Word
length of a normal computer system ranges from 32 to 64 bits.

Here are three examples of how CPU speed and word length can vary:

The 8088 processor has 4.77MHz clock speed and word length is 8 bits.

The 80486 processor has clock speeds from 50 to 80MHz and has a word length of 32 bits.

The Pentium 4 processor has a clock speed of between 1.5 gigahertz and 3.2 gigahertz, and has
a word length of 64 bits.
4.1.2: Central processing unit (CPU) architecture
CPU Performance
The width of the address bus
The address bus width can be interpreted as the width of the address bus and serves to
determine the maximum number of address locations. For example, if you have an 8-bit
address bus, this means you can own up to 256 addresses. These addresses or memory
locations will be numbered from 0 to 255.
Of course, the wider the width of your address bus, the more accessible memory will be.
How is the CPU produced?
4.1.2: Central processing unit (CPU) architecture
In order to understand how the von Neumann model could be put into practice in a real computer system,
we need first to identify the individual hardware components of a CPU and define their functions.
Let’s consider a system that has the minimum number of components needed. Figure 4.1.3 gives a simplified
schematic diagram of a processor.

Figure 4.1.3 A schematic diagram of the architecture of a simple CPU

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4.1.2: Central processing unit (CPU) architecture
Von Neumann computer architecture design consists of a Control Unit, Arithmetic and Logic Unit (ALU),
Memory Unit, Registers and Inputs/Outputs. Von Neumann architecture is based on the stored-program
computer concept, where instruction data and program data are stored in the same memory. This design is
still used in most computers produced today. no

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4.1.2: Central processing unit (CPU) architecture
Table 4.1 describes the function of each of the three buses shown in Figure 4.1.2
Buses essentially move data around the computer and also send out control signals
to make sure everything is properly synchronized.

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4.1.2: Central processing unit (CPU) architecture
Central Processing Unit (CPU): The Central Processing Unit (CPU) is the electronic circuit responsible for
executing the instructions of a computer program also the CPU , process data, do calculation and decision

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4.1.2: Central processing unit (CPU) architecture
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4.1.2: Central processing unit (CPU) architecture
The dotted outline shows the boundary of the processor. The logical arrangement of some of the processor
components is indicated. The arrows show possible directions of flow of data.
As the following discussion will show, the data for some of the arrows is actually an address or an instruction.
However, in general, data might be an address, an instruction or a value.

Arithmetic and logic unit (ALU) (or Arithmetic Logic Unit): The ALU allows arithmetic (add, subtract etc) and
logic (AND, OR, NOT etc) operations to be carried out. ALU to do calculations and comparisons and ALU is
responsible for the arithmetic or logic processing requirements of the instructions in a running program.

Control Unit : is controlling the flow of data throughout the processor and ensuring that program instructions
are handled correctly, also control unit is a clock that is used by the unit to synchronize processes, there are
two clocks. The first is an internal clock that controls the cycles of activity within the processor. The other is
the system clock that controls activities outside the processor.
The control unit controls the operation of the CPU, memory and input/ output devices.

The job of the control unit is to coordinate and control all the other parts of the CPU. It tells the registers &
ALU what to do with an instruction that is passed to them.

The CU decodes the instructions retrieved from memory and instructs the ALU to perform an arithmetic or
logic instruction on the data from the decoded instruction.
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4.1.2: Central processing unit (CPU) architecture
Index Register (IX): The (IX) stores an integer number that will be used to change an
address value
Current Instruction Register: When a program instruction is fetch, it is stored in the
current instruction register (CIR). It is the task of the processor to make sense of it and execute it.
Status Register ( Also Called Flag Register): All of these special purpose register
deal with an entire byte, A status register is used when an instruction requires some form of
arithmetic or logic processing. Each bit is known as a flag.

Processor types and cores: A core, or CPU core, is the "brain" of a CPU. It
receives instructions, and performs calculations, or operations, to satisfy those instructions. A
CPU can have multiple cores.
A processor with two cores is called a dual-core processor; with four cores, a quad-core; six
cores, hexa-core; eight cores, octa-core. As of 2019, the majority of consumer CPUs feature
between two and twelve cores. Workstation and server CPUs may feature as many as 48.
Each core of a CPU can perform operations separately from the others. Or, multiple cores may
work together to perform parallel operations on a shared set of data in the CPU's memory cache.
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4.1.2: Central processing unit (CPU) architecture
Registers
The registers form part of the CPU Cache, temporarily storing data ready for processing or send
to the RAM. This register is used when performing operations involving index addressing.
PC – Program Control Register
The program control register stores the address of the current instruction. Once the current
instruction has been fetched and decoded, the program control register changes to the address
of the next instruction.
IR – Instruction Register
The instruction register contains the current instruction itself, retrieved from its stored address.
MAR – Memory Address Register
The memory address register contains the memory location of either the next instruction to be
fetched or the location of where the results of the current process are to be stored
MDR – Memory Data Register
The memory data register contains either the data retrieved from memory (either an instruction
or an operand) during the current fetch cycle at the address stipulated in the MAR, or the data
the is due to be written to memory
ACC – Accumulator
The accumulator receives the results of the current process from the ALU and stores it for the
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use in the next Fetch-Decode-Execute cycle.
4.1.2: Central processing unit (CPU) architecture
Buses
Buses are the physical wires along which data is passed, both within the CPU itself and across the
motherboard.
CPU Bus
The CPU bus is used to pass data around the CPU between the CU,ALU and registers.
Control Bus
The Control bus sends signals to the RAM, indicating whether to initiate a read or write on the
address received along the address bus
Address Bus
The address bus is the wire along which the address of the memory location in RAM required for
the read/write is sent.
Data Bus
The data bus is the wire along which the data is sent either to or from the RAM (depending
whether a read or write has been initiated.

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4.1.2: Central processing unit (CPU) architecture
Caches Memory:
Cache Memory is a special very high-speed memory. It is used to speed up and synchronizing
with high-speed CPU. Cache memory is costlier than main memory or disk memory but
economical than CPU registers. Cache memory is an extremely fast memory type that acts as a
buffer between RAM and the CPU. It holds frequently requested data and instructions so that
they are immediately available to the CPU when needed.

Cache memory is used to reduce the average time to access data from the Main memory. The
cache is a smaller and faster memory which stores copies of the data from frequently used main
memory locations. There are various different independent caches in a CPU, which store
instructions and data

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4.1.2: Central processing unit (CPU) architecture
Bus Width:
A computer bus (often simply called bus) is part of most computers. Its role is to
transfer data, signals, or power between some of the components that make up a computer.
The size or width of a bus is how many bits it carries in parallel. Common bus sizes are: 4 bits, 8
bits, 12 bits, 16 bits, 24 bits, 32 bits, 64 bits, 80 bits, 96 bits, and 128 bits.

Bus width refers to the number of bits that can be sent to the CPU simultaneously, and bus speed
refers to the number of times a group of bits can be sent each second. A bus cycle occurs every
time data travels from memory to the CPU

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4.1.2: Central processing unit (CPU) architecture
(Internal ) Clock Speed:
Computers use an internal clock to synchronize all of their calculations. The clock ensures that
the various circuits inside a computer work together at the same time.

Clock speed is measured by how many ticks per second the clock makes. The unit of
measurement called a hertz (Hz), which is technically one cycle per second, is used to
measure clock speed.

In the case of computer clock speed, one hertz equals one tick per second. The clock speed of
computers is usually measured in megahertz (MHz) or gigahertz (GHz). One megahertz equals
one million ticks per second, and one gigahertz equals one billion ticks per second.

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4.1.2: Central processing unit (CPU) architecture
Port and Peripherals:
A Computer Port is an interface or a point of connection between the computer and its peripheral
devices. Some of the common peripherals are mouse, keyboard, monitor or display unit, printer,
speaker, flash drive etc.
The main function of a computer port is to act as a point of attachment, where the cable from the
peripheral can be plugged in and allows data to flow from and to the device.

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4.1.2: Central processing unit (CPU) architecture
Motherboard Ports
Computers are only useful if humans an interact with them through the use of Input, Output,
Storage and Communication devices. This is achieved through the use of motherboard ports. All
motherboards have different ports depending on their date of manufacture and their purpose,
but most general purpose computers have a number of common ports.
They can connect to a variety of devices including:
Input devices, such as mice/keyboards
Output devices such as speakers and printers and displays
Networking devices such as routers
External storage devices, such as USD Flash Drives and external hard drive

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Visual Graphics Array Port
A VGA port was the most common port used to connect external monitors (screens) and
projectors up until around 2010. They are now being gradually being replaced by the more
versatile HDMI ports. The video.

• Can support video signals up to 2048×1536px

• Some legacy devices only support VGA
• Only used to transmit video data

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High Definition Media Interface:
This is the modern replacement for VGA and can be used to carry video, sound and control
information. HDMI have a high transmission capacity meaning that you can send higher
resolution data and you can also send sound data via one cable.

• Current maximum resolution 4K (3840 x 2160) but newer Ultra High Speed HDMI can carry
up to 10K at 120FPS.
• Less cables used as video and sound are sent on the same cable.
• Remote control signals can be passed back along the cable to control playback
• Video transmissions support encryption to reduce video piracy.

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Universal Serial Bus
These were originally introduced to allow connection of a wide variety of external peripherals
(mice, keyboards, printers, external hard drives) without the need for a specific port for each
device. This meant that devices could be plugged into any available port and can be hot-
swapped with the need to manually configure them each time. The original specification had a
fairly slow transfer speed, however USB 2.0 and 3.0 greatly increase the bi-directional transfer
speed and this means that can support a wider variety of devices (including the transmission of
video/audio).

• Highly Versatile, supporting a wide variety of devices

• Fewer ports required as ports can be shared, very important for laptops.
• Different connector types (A/B/C/Mini) on devices mean different types of cables are still
required

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Ethernet Network Interface Controller

This port allows a computer wired access to the local area network (such as your home network)
and access to the Internet via a router

• Faster than WIFI based internet access

• Lower Latency and less interference
• Only really suitable for desktop machines and static devices as a cable is required

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Analogue / Digital Audio Input/Output

Most motherboards come with a built in audio input/output sound controller. The ports allow
speakers, headphones and microphones to be plugged into the device. Built in sound cards are
generally of a lower quality than discrete sound cards and therefore should not be used for high
quality recordings or playback

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4.1.2: Central processing unit (CPU) architecture
Universal Serial Bus (USB):
A Universal Serial Bus (USB) is basically a newer port that is used as a common interface to
connect several different types of devices such as for example Keyboards, Printers.

The USB is Bi-directional data transfer for example it can read and write to the connected USB
external disk drive all data bit transferred along a single line (serial) in sequence. They are
several type of USB , Type A, Type B and micro USB , all of there have either 4 or 9 pin
connector .

High Definition Multimedia Interface (HDMI):

Data is sent from the processor to the connected HDMI monitor . The communication is
unidirectional ( single direction) The port has a 19 pin connector hence the HDMI bus has 19
lines

Video Graphics Array(VGA):

VGA was the standard port and bus used for screen output before the increased use of HDMI .
The port is unidirectional
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 The fetch–execute cycle
• Fetch - Retrieve an instruction from memory.
• Decode - Translate the retrieved instruction into a series of
computer commands.
• Execute - Execute the computer commands.
• Store - Send and write the results back in memory.
Computer processors use pipelining (micro processing technique
that handles multiple stages of different computer instructions at
once), which allows the processor to begin fetching a second
instruction before it has completed the machine cycle for another
instruction

Noureddine Tadjerout
The fetch–execute (F–E) cycle

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 The fetch–execute cycle
• Figure below shows how the fetch–execute cycle is
carried out in the von Neumann computer model.

Noureddine Tadjerout
The fetch–execute (F–E) cycle
The full name for this is the fetch, decode and execute cycle. This is illustrated by the flowchart

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The fetch–execute (F–E) cycle

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By: Noureddine Tadjerout
By: Noureddine Tadjerout
Fetch Decode Execute Cycle

Kahoot Activity:

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Register Transfer Notation
https://www.youtube.com/watch?v=op5HGBH62V4

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Register Transfer Notation

Register transfer notation used to describe how data is passed between CPU registers during the
execution of instructions. It is written in human readable format as close to assembly language
as possible. You will need to be familiar with the basic usage of RTN when answering exam
questions or for Computer Science interviews.
The video below shows how transfer notation can be used to describe the steps of the fetch-
execute cycle.

Common Notation

Saving values to registers

ACC <– [MDR]

In the example above the contents of the MDR are copied to the ACC. Note how the arrow
points left, just the same as when you assign a variable in Python or similar language.

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Common Notation
Incrementing Register Values

CU <– [CU] + 1

In the example above the contents of the CU are incremented by one

Saving values from direct memory addresses

MDR <– [[MAR]]

In the example above the contents of the main memory location referenced in MAR are loaded
into the MDR, not the MAR contents themselves. This type of referencing is denoted with
double brackets.

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Common Notation
Accessing a subset of a register value

MAR <– MDR(L)

The contents of the MDR will often contain both an opcode and an operand but often only part
of the value is needed. This can be specified a number of different ways but may use the High
Byte(H) / Low Byte(L) to indicate whether to opcode(high byte) or operand(low byte) is to be
used. High byte and low byte represent each half of an instruction in a 16bit processor, with the
4 most significant bits being to the left and the least significant bits to the right.

Conditional Operation

R1 : ACC <– [ACC] + 1

In the example above the contents of the ACC are only incremented if the content of R1 is
1(True)

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 Register Transfer Notation Quizizz

https://quizizz.com/admin/quiz/600a289c298968001be226b5/register
-transfer-notation

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Interrupts:
https://www.youtube.com/watch?v=iKlAWIKEyuw

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Interrupts:
Interrupts are signals sent to the CPU by external devices, normally I/O devices. They tell the
CPU to stop its current activities and execute the appropriate part of the operating system.
An example of an interrupt is a signal to stop Microsoft Word so that a PowerPoint
presentation can gear up. When an interrupt is received by the CPU, the computer system must
identify the source of the interrupt signal and run appropriate program code to deal with the
event, this called the Interrupt Service Routine (ISR) or Interrupt handler, then the computer
system must return to the processing of the program at the point reached when the interrupt
was received.
There are many different reasons for an interrupt to be generated. Some examples are:
• a fatal error in a program
• a hardware fault
• a need for 1/ 0 processing to begin
• user interaction
• a timer signal.
Clock :
The clock sends out a number of pulses in a given time interval (clock speed)
• Each processor instruction takes a certain number of clock cycles to execute
• The higher the clock frequency, the shorter the execution time for the instruction
Increasing the clock frequency improves performance 71
Interrupts:

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4.1 Central Processing Unit (CPU) Architecture : Key Terms:
4.1 Central Processing Unit (CPU) Architecture : Key Terms:
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Lesson Objectives - 4.2: Assembly Language

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Lesson Objectives - 4.2: Assembly Language
Lesson Objectives - 4.2: Assembly Language
Lesson Objectives - 4.2: Assembly Language
Lesson Objectives - 4.2: Assembly Language
4.2: Assembly Language
Fetch-decode-execute cycle
https://www.youtube.com/watch?v=nAbLDiytl2M

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4.2: Assembly Language
Fetch-decode-execute cycle
https://www.youtube.com/watch?v=Y4O2-ilSw-o

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4.2: Assembly Language
Fetch Decode Execute Cycle
https://youtu.be/IL44-Mfp8x4

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Recap again of Fetch Decode Execute Cycle

Fetch Phase

In this phase of the cycle, the processor:

1. Gets the memory address of the current instruction from the program counter PC
2. Passes the address to the memory address register (MAR)
3. Sends the address along the address bus.
4. The RAM retrieves the data stored at that address and passes the data back along the data
bus.
5. The data is the stored in the memory data register (MDR) ready for decoding.

Decode Phase

In this phase the data in the MDR is passed to the control unit (CU) which then decodes the
instruction and then signals to the ALU what instruction is to be completed.

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Recap again of Fetch Decode Execute Cycle

Execute Phase

In the final phase of the fetch decode execute cycle the instruction is executed.

This instruction could comprise of:

• Reading operand data in to the accumulator from the RAM

• Performing arithmetic on operand data
• Performing logical functions (conditionals / loops)
• Writing data from the accumulator to the RAM

Once this step is complete the CPU moves on to the next instruction

121
4.2: Assembly Language
Assembly language is a low-level programming language. It equates to machine code but is
more readable. It can be directly translated into machine code, but it uses mnemonics to
represent the instructions to make it easier to understand.

Uses of assembly language

Although assembly languages are easier to program with than machine code, it is still time-
consuming and specialist work. It is mainly reserved for writing specific instructions for
embedded systems such as washing machines or air-conditioning control

Assemblers
In order to convert assembly language into machine code it needs to be translated using
an assembler. This converts each statement into the specific machine code needed for
the hardware on which it is being run. There is a one-to-one relationship between an assembly
language instruction and its machine code equivalent. Each CPU has its own version of machine
code and assembly language.

122
4.2: Assembly Language
Writing assembly language programs
Operands vs Opcodes
Each assembly language statement is split into an opcode and an operand. The opcode is
the instruction that is executed by the CPU and the operand is the data or memory
location used to execute that instruction.

ADD 4
Opcode = ADD Operand = 4 – This means add the number stored at memory location 4 to the
number stored in the accumulator.

Full Example

• LOAD 3
• SUB 4
• STORE 5
This example above means:
load the contents of memory location 3 in to the accumulator
Subtract the contents of memory location 4 from the data in the accumulator
Store the result of the subtraction to memory location 5 123
4.2: Assembly Language
Operands vs Opcodes

124
4.2: Assembly Language
Operands vs Opcodes
An operand (written using hexadecimal notation) provides the data itself, or the location where
the data to be processed is stored. Some instructions do not require an operand and some may
require more than one operand.

The table below is a small assembly language program with a description of the opcode and
operand components during execution.

125
4.2: Assembly Language
Watch video for the Machine Code Instructions
https://www.youtube.com/watch?v=Mv2XQgpbTNE
4.2: Assembly Language
Watch video for the Assembly Language
https://www.youtube.com/watch?v=oEIT76DZ470
4.2: Assembly Language
Watch video for the Assembly language Symbol Table
https://www.youtube.com/watch?v=NoRNhCOvuhM
4.2: Assembly Language
Watch video for the Two Pass Assemblers
https://youtu.be/BUZycVrWPa4
4.2: Assembly Language
Two Pass Assemblers:
Symbolic Addressing vs Absolute Addressing:
When we write computer programs in a high level language we use Symbolic Addressing,
where we refer to memory locations using identifier names for variables, functions , data
structures etc.
Example program to calculate profit:

LDD REVENUE
SUB COST
STR PROFIT

This program is easy for humans to read. If we used absolute addressing instead it would be
very difficult to understand the purpose of the code.
This has two key advantages in assembly language programming:

First it makes the programs easier to read as we are using words that mean something to us.
Second it means that if the memory location where that data is stored changes we only have
to change it once in our program
4.2: Assembly Language
Two Pass Assemblers:
Symbolic Addressing vs Absolute Addressing:
The computer cannot process these symbolic addresses so when the program is assembled
all symbolic addresses are replaced with the memory address assigned to that symbol. The
assembler builds a symbol table or symbolic names and the corresponding addresses in
memory.

Profit program after the symbolic addresses have been swapped out

LDD #4454
SUB #3326
STR #4410
4.2: Assembly Language
Two Pass Assemblers
The two pass assembler performs two passes over the source program.

In the first pass, it reads the entire source program, looking only for label definitions. All the
labels are collected, assigned address, and placed in the symbol table in this pass, no
instructions as assembled and at the end the symbol table should contain all the labels defined
in the program. To assign address to labels, the assembles maintains a Location Counter (LC).

In the second pass the instructions are again read and are assembled using the symbol table.
Basically, the assembler goes through the program one line at a time, and generates machine
code for that instruction. Then the assembler proceeds to the next instruction. In this way, the
entire machine code program is created. For most instructions this process works fine, for
example for instructions that only reference registers, the assembler can compute the machine
code easily, since the assembler knows where the registers are
4.2: Assembly Language
Two Pass Assemblers
4.2: Assembly Language
Difference between One Pass and Two Pass Assemblers

The difference between one pass and two pass assemblers are:

A one pass assembler passes over the source file exactly once, in the same pass collecting the
labels, resolving future references and doing the actual assembly. The difficult part is to resolve
future label references (the problem of forward referencing) and assemble code in one pass.
The one pass assembler prepares an intermediate file, which is used as input by the two pass
assembler.

A two pass assembler does two passes over the source file (the second pass can be over an
intermediate file generated in the first pass of the assembler). In the first pass all it does is
looks for label definitions and introduces them in the symbol table (a dynamic table which
includes the label name and address for each label in the source program). In the second pass,
after the symbol table is complete, it does the actual assembly by translating the operations
into machine codes and so on.
 2 Pass Assemblers

Done by: learnlearn.uk

 Low Level Assembly Language
High Level Programming Languages
(Device Drivers / Embedded
Python / C ++ Systems / Real-time systems

print("Hello World") e.g. STR 5

Interpreter / Compiler Assembler

Executable Machine Code

Executable by the CPU / Different for every machine

0100 01101001

Done by: learnlearn.uk

2 Pass Assembler Process
Symbol
Table
Variables / Labels

Literal Table
Constants

Assembly Pass 1 Pass 2 Object Executable

Linker
Code Analysis Synthesis
Code Machine Code

Opcode At Run Time

Table
opcode → binary
Executable Loader

Done by: learnlearn.uk

Pass 1 - Analysis
This part scans the program looking for symbols, labels,
variables, etc and organises them in tables
● Passes through the instructions in sequence, looking for
symbol addresses
● Create a symbol and literal table
● Keep track of the location counter
● Process Pseudo operations(macros / directives?)
● Error Checking

Macros Directives
Names subroutines can be used Configuration instructions for
more than once. Designed to assembler (such as memory
make programming easier and allocation)
more module Not a program instruction itself.
 ORG #100

BeginProg LDV #countUp Labels

OUTCH These are used to by the programmer to
CMP NumA
refer to specific lines in the code, rather
JMP Finish
than to referring to them by a line
number.
JNE MoveOn

MoveOn LDD countUp

This makes the program easier to read for
INC
humans as is allows the code to be
STO countUp broken down into sections
JMP BeginProg

Finish LDM #25 This makes the program easier to read for
END humans as is allows the code to be
countUp 200
broken down into sections
21

35

NumA 20

Done by: learnlearn.uk

 ORG #100

BeginProg LDV #countUp

Labels
OUTCH
These are used to by the programmer
CMP NumA
to refer to specific lines in the code,
JMP Finish
rather than to referring to them by a
JNE MoveOn
line number.
MoveOn LDD countUp

INC This makes the program easier to read

STO countUp for humans as is allows the code to be
JMP BeginProg broken down into sections
Finish LDM #25

END
This makes the program
countUp 200
easier to read for humans as
21

35
is allows the code to be
NumA 20

Done by: learnlearn.uk

 Pass 1 Analysis
walkthrough

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp

OUTCH

CMP NumA

JMP Finish

JNE MoveOn

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH

CMP NumA

JMP Finish

JNE MoveOn

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH
countUp

CMP NumA

JMP Finish

JNE MoveOn

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH
countUp

CMP NumA NumA

JMP Finish

JNE MoveOn

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH
countUp

CMP NumA NumA

JMP Finish Finish

JNE MoveOn

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH
countUp

CMP NumA NumA

JMP Finish Finish

JNE MoveOn MoveOn

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH
countUp

CMP NumA NumA

JMP Finish Finish

JNE MoveOn MoveOn 105

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH
countUp

CMP NumA NumA

JMP Finish Finish 109

JNE MoveOn MoveOn 105

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH
countUp 111

CMP NumA NumA

JMP Finish Finish 109

JNE MoveOn MoveOn 105

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 ORG #100
Symbol Table
BeginProg LDV #countUp
BeginProg 100

OUTCH
countUp 111

CMP NumA NumA 114

JMP Finish Finish 109

JNE MoveOn MoveOn 105

MoveOn LDD countUp

INC

STO countUp

JMP BeginProg

Finish LDM #25

END

countUp 200

21

35

NumA 20

Done by: learnlearn.uk

 Pass 2
If no errors are found in pass one then the second pass assembles
the code into object code.
This process often includes:
● Symbolic addresses are replaced with absolute addresses
● Symbolic opcodes are replace with binary opcodes

Done by: learnlearn.uk

 2 Pass Assembly
Symbol
Process
Table
Variables / Labels

Literal Table
Constants

Assembly Pass 1 Pass 2 Object Executable

Linker
Code Analysis Synthesis Code Machine Code

Opcode At Run Time

Table
opcode → binary
Executable Loader

Done by: learnlearn.uk

AS/Level Exam Question 1
AS/Level Exam Answer 1
4.2: Assembly Language
Modes of Addressing:
https://www.youtube.com/watch?v=-81aGFRGFJc
4.2: Assembly Language
Modes of Addressing:
Immediate Addressing
The operand is actual value to be used.
So if the instruction LDM 4 – the number 4 would be sent to the accumulator
4.2: Assembly Language
Modes of Addressing:
Direct Addressing
The operand is the address of the value to be used.
If the instruction is LDD 1 then the value stored at address 1 will sent to the accumulator.
4.2: Assembly Language
Modes of Addressing:
Indirect Addressing
The operand is the address of the address to be used. This is similar to direct, but with one
more hop in the process.
4.2: Assembly Language
Modes of Addressing:
Indexed Addressing
The operand plus the contents of the Index Register is the address of the value to be used.
.
4.2: Assembly Language
Modes of Addressing:
Relative Addressing
The operand is the offset from the current address of the value to be used.
4.2: Assembly Language
Macro
• A group of instructions given a name // subroutine
• A group of instructions that need to be executed several times within the same
program
• The statements are written once and called using the name whenever they need
to be executed
• Macro code is inserted into the source file at each place it is called

Directive

• An instruction that directs the assembler to do something

• A directive is not a program instruction
• It is information for the assembler
• example of the use of a directive are State the start address for the program //tell the
assembler to set aside space for variables // include an external file etc
4.2: Assembly Language
Absolute addressing:

• The operand is a numeric address // The numeric address is given //

referring directly to a memory location

Example: Absolute addressing: For example, ADD 240

Symbolic addressing:

• The operand is a word/symbol // A word/symbol represents the memory

location/address

Example: Symbolic addressing: For example, ADD num2

4.2: Assembly Language
What is ASCII code?:
ASCII stands for (American Standard Code for Information Interexchange). An ASCII is an
alphanumeric code that is used for representing the numbers, alphabets, punctuations
symbols and other characters, It is known as ASCII code.
It is a code that represents the represent 10 decimal digits, 26 alphabets, and certain other
symbols such as punctuation marks and special characters. Most of the modern encoding
character is based on ASCII, although they also support many other characters.

Advantage using of ASCII code:

ASCII uses 8 bits to represent a character.
ASCII can represent 128 characters.
ASCII sets the most significant bit as a parity bit.
Extended ASCII can allow for the representation of 256 characters and disregards that use of
a parity bit.
ASCII is less demanding on memory use than Unicode.

Disadvantage of ASCII code:

The main problem with ASCII is that it has an 8-bit character that means the maximum of 255
characters can be represented.
4.2: Assembly Language
What is Unicode code?:
Unicode is a universal character encoding standard. It defines to represents the text files, documents,
web pages, and most of the world’s writing systems, It is known as “Unicode”. The Unicodes provide a
consistent way of coding multilingual plain, which makes it easier to text all the files internationally.
Unicode can be implemented by different character encodings. The most commonly used encodings are
UTF-8( Which uses one byte for any ASCII characters, Which have the same code value in both ASCII and
UTF-8 coding and end up to 4 bytes for other characters.
Unicode is required with XML, the Java language programming language, JavaScript, XML, LDAP, and
other web-based technologies etc.
Advantage using of Unicode:
• It is simplified application development.
• It can store characters from more than one language.
• It has Multi-lingual applications in data, (UI)user interface, and reports.
• It is the universal coding scheme followed throughout the world.
• And, the UTF-8 is an efficient encoding for storing and transmitting Unicode characters.
Disadvantage of Unicode:
A significant disadvantage of the Unicode is its memory requirement for UTF-16 and UTF-32.
Unicode requires more space because it has a large variety of characters.
It uses more bytes for larger alphabetic symbols.
4.2: Assembly Language
Difference B/W Unicode And ASCII.
4.2: Assembly Language
Modes of Addressing:
When an instruction require res a value to be loaded into a register there are different ways
of identifying the value. These different ways are described as the 'addressing modes'. In
Section 6.01, it was stated that, for our simple processor, two bits of the opcode in a machine
code instruction would be used to define the addressing mode. This allows four different
modes which are described in Table below.
4.2: Assembly Language
Modes of Addressing:
4.2: Assembly Language
AS/Level Exam Question 1
4.2: Assembly Language
AS/Level Exam Question 1
4.2: Assembly Language
AS/Level Exam Answer 1
4.2: Assembly Language
AS/Level Exam Question 2
4.2: Assembly Language
AS/Level Exam Answer 2
4.2: Assembly Language
AS/Level Exam Question 3
4.2: Assembly Language
AS/Level Exam Answer 3
4.2: Assembly Language
AS/Level Exam Question 4
4.2: Assembly Language
AS/Level Exam Question 4
4.2: Assembly Language
AS/Level Exam Question 4
4.2: Assembly Language
AS/Level Exam Question 4
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4.2: Assembly Language
AS/Level Exam Answer 4
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AS/Level Exam Answer 4
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4.2: Assembly Language
AS/Level Exam Answer 5
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Lesson Objectives
Lesson Objectives - 4.3: Bit manipulation
4.3.1: Bit manipulation
https://www.youtube.com/watch?v=zFTM44hYalg
4.3.1: Bit manipulation
Watch the video for the Binary Shifts Tutorial
https://www.youtube.com/watch?v=G-9fwJbgRjA
4.3: Bit manipulation
Shift Operations or Instruction:

• A shift moves the bits around in some data

• A shift can be toward the left (i.e., toward the most significant bits), or toward the right
(i.e., toward the least significant bits)

There are two kinds of shifts:

• Logical Shifts

• Arithmetic Shifts

• Cyclic Shift
 4.3: Bit manipulation
Logical Shift:
Logical Left Shift

In a left shift each bit is simply moved to the left with the empty space on the right replaced
with zero.

Example

000110
<< 2
011000

Notice the ones have moved along 2 spaces

 4.3: Bit manipulation
Logical Shift:
Logical Right Shift

In a logical right shift the bits are shifted to the right and the most significant bit(empty bit to
the left ) is replace with zero. The least significant bit(Any bit falling off the right) is discarded

Example

0011001
>>1
0001100

Some programming languages don’t have an in-built logical right shift, they only have an
arithmetic right shift
 4.3: Bit manipulation
Arithmetic Shift:
Arithmetic Left Shift

Arithmetic left shifts work the same as logical left shifts. The bit is shifted to the left (the sign bit
is discarded) with zeroes add at the right hand end.

Example

000110
<< 2
011000
 4.3: Bit manipulation
Arithmetic Shift:
Arithmetic Right Shift

In an arithmetic right shift the bit is shifted to the right but the most significant bit is copied to
the next most significant bit position on the left.

This is used when the most significant bit is the sign bit (1s/2s Compliment) indicating + / –
value. The least significant bit is discarded

Example:

10110100
>>3
11110110