Design for Testing

Handbook
Scope: DFT checks all the aspects of a PCB design and pinpoints hidden defects, incorrect
arrangements of components, and other faults, if present. This Design for Testing Handbook
conveys the fundamental idea of various testing techniques, and their benefits and drawbacks.

Table of Contents

1. Design for testing fundamentals................................................. 5

2. Importance of DFT...................................................................... 7
3. Parameters to include in DFT..................................................... 7
4. PCB testing strategies............................................................... 8
4.1 Border edge clearance ........................................................................... 8
4.2 Fiducials.................................................................................................. 8
4.3 Vias......................................................................................................... 8
4.4 Probes near component legs................................................................ 9
4.5 Size of the board.................................................................................... 9
4.6 Cleaning the assembly........................................................................... 9
4.7 Probe points on the ground and power planes..................................... 9
4.8 Maximizing test accessibility................................................................. 10
4.9 Checking the component height............................................................ 10

5. Types of board testing................................................................ 10

5.1 Bare board testing................................................................................... 10
5.2 Assembled board testing....................................................................... 10

6. PCB E-test.................................................................................. 11
6.1 Flying probe testing................................................................................. 11
6.1.1 FPT procedure............................................................................... 12
6.1.2 Guidelines for test point design and placement......................... 13
6.1.2.1 Accessibility to nets......................................................... 13
6.1.2.2 Features of test points..................................................... 13
6.1.2.3 Board clamping................................................................. 14
6.1.2.4 Board dimensions.............................................................

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6.1.2.5 Maximum component height............................................ 14
6.1.2.6 Test point distances......................................................... 14
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Table of Contents
6.1.2.7 Fiducial recognition.......................................................... 15
6.1.2.8 Wire connection................................................................ 15
6.1.2.9 Option for openfix............................................................. 15
6.1.3 FPT benefits................................................................................... 16
6.1.4 FPT drawbacks.............................................................................. 16
6.1.5 What FPT checks and verifies...................................................... 16
6.2 In-circuit testing....................................................................................... 16
6.2.1 Directives to achieve perfect ICT................................................ 16
6.2.1.1 Accessibility to nets......................................................... 16
6.2.1.2 Accessibility to NC nets (no connect) or Not used........... 16
6.2.1.3 Access choice................................................................... 17
6.2.1.4 Board clamping or Locating points................................ 17
6.2.1.5 Definition of holes............................................................. 17
6.2.1.6 Test point minimum dimensions..................................... 18
6.2.1.7 Minimum test point size according to board dimensions 18
6.2.1.8 Solder mask and test point............................................... 19
6.2.1.9 Distance between the test points.................................... 19
6.2.1.10 Nail choice...................................................................... 19
6.2.1.11 Minimum interaxis.......................................................... 20
6.2.1.12 Distance between the test point and the component
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edge................................................................................
6.2.1.13 Test point under a BGA component............................. 21
6.2.1.14 Test point density.......................................................... 21
6.2.1.15 Precautions.................................................................... 21
6.2.1.16 Accuracy measurement................................................ 21
6.2.1.17 Access to the board power supply................................ 21
6.2.1.18 Wire rework.................................................................... 21
6.2.2 ICT benefits.................................................................................... 22
6.2.3 ICT drawbacks............................................................................... 22
6.2.4 What ICT checks and verifies....................................................... 22

7. Other testing methods............................................................... 23

7.1 Functional testing................................................................................... 23
7.1.1 FCT benefits................................................................................... 23

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7.1.2 FCT drawbacks............................................................................. 23
7.1.3 What FCT checks and verifies..................................................... 23
7.2 Automated optical inspection............................................................... 23
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Table of Contents
7.2.1 How AOI works.............................................................................. 24
7.2.2 AOI benefits................................................................................... 25
7.2.3 AOI drawbacks.............................................................................. 25
7.2.4 What AOI checks and verifies...................................................... 25
7.3 Burn-in testing......................................................................................... 25
7.3.1 Burn-in test benefits...................................................................... 25
7.3.2 Burn-in test drawbacks.................................................................. 26
7.3.3 What burn-in test checks and verifies.......................................... 26
7.4 Automated X-ray inspection.................................................................... 26
7.4.1 AXI process flow........................................................................... 26
7.4.2 AXI benefits................................................................................... 27
7.4.3 AXI drawbacks............................................................................... 27
7.4.4 What AXI checks and verifies....................................................... 27
7.5 Visual inspection..................................................................................... 27
7.5.1 Visual inspection benefits............................................................ 28
7.5.2 Visual inspection drawbacks........................................................ 28
7.5.3 What visual inspection checks and verifies................................. 28

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 FLYING P
TESTING

SEICA TESTING CAPABILITES

Performs Open and Short Circuit testing

Measures component values. Resistor values of

.ln - lOOMn, Caps value from lpF -lOOmF and In­
ductance values from luH -lOH can be checked

Tests component placement and polarity

Identifies missing components

BETTER
TESTING
BETTER
BOARDS
Testing a PCB after manufacturing plays a pivotal role in procuring a flawless design. Design for
testing (DFT) evaluates the board’s accuracy based on functionality and manufacturability. It not
only ensures a perfect design but also cuts down the manufacturing cost, substantially.

1. Design for testing fundamentals

DFT is a method of operational and functional testing of a circuit board. This methodology
identifies any short, open circuit, wrong placement of the components, or faulty components.
Design for testing incorporates the addition of some test points on the PCB depending on the
design requirements and the parameters of interest. This testing method is performed to validate
three major questions:

• Is the board designed precisely?

• Is the board fabricated flawlessly?
• Do all the components, ICs, and connections operate perfectly?

Apart from these, the other major issues considered are:

• Component misplacement: One of the key aspects of board design is where and how a
component is to be mounted on the board. For example, placing taller components in front
of shorter ones causes serious solder joint issues.

Left: Correct positioning of components.

Right: Incorrect positioning of components

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Inaccurate component clearance: Appropriate gap between a component to another and a
component to the board edges is crucial. Close spacing will increase the risk of a defective
design.

Improper surface-mount pad size: It is a typical design problem. Improper pad sizes result in
tombstoning. Here, passive SMT components such as capacitors, and resistors get lifted off
from their pad. This is commonly known as the tombstone effect.

Top: Component strongly soldered on a PCB.

Bottom: Tombstone defect

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• Excess or less solder mask: If the solder mask between pads is inadequate, the electrical
connections can degrade.
• Wrong or faulty electrical components: Determination and rectification of wrong and defective
components are critical before the designs are ready for production. If it remains unnoticed, it
can turn out to be an expensive mistake.

To check the manufacturability of your circuit design, try our Better DFM tool. This will help you in
simplifying the product design and enhances the functional performance of your board.

2. Importance of DFT

In the earlier days, the number of components was hardly around 100 to 200. Hence, the
board had enough room to place test points. Now, the entire fabrication technology has gone
through a revolutionary change. HDI PCB designs include thousands of components and solder
connections. The space constraint becomes a concerning issue in deciding proper test positions
on a dense board. If any component or connector hampers the design, it would be a nightmare
for fabricators and designers.

DFT engineers and product developers establish a set of testing methods to find out any
inaccuracies and produce a high-quality circuit board.

3. Parameters to include in DFT

Here are some of the parameters that you can include in board testing to ensure efficiency and
precision.

• Test points: Test point or fixture insertion is a requisite technique in DFT to increase test
efficiency. The position of a test point is decided based on how many components it can
cover. The fixtures are distributed strategically in such a way that they can easily access
different parts on the board. Signal integrity issues can be mitigated by arranging accurate
power and ground test points. Typically, the dimensions for the bottom-access pad used
for flying probe and bed-of-nails tests are 40 mils and above.

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• Test traces: You can position test points on the traces that imitate the sensitive traces.
These test points can be connected to oscilloscopes, TDRs, or signal generators to know
the behavior of the signals. A test point can be placed in the auxiliary clock output for trigger
or synchronization during testing.

• Inclusion of LEDs: Incorporate LEDs in testing methods to determine whether the power is
switched on or off. Debug LEDs are a suitable choice for FPGA or microcontrollers since
they require debugging errors in the code.

• Selection of the test method: Choose the method that best suits your design. Flying
probe test is preferable for small production because of its simple setup and slow testing
speed. In-circuit test (ICT) involves fixed programming and is suitable for large
production.

• Headers: These are a kind of test point connected to vias to measure the voltages across it.

• Additional circuit features: If the board has enough room, some circuitries are introduced
to check the voltage and current of the components. These are non-essential yet helpful in
validating the components’ rating.

4. PCB testing strategies

4.1. Border edge clearance

This is essential to keep sufficient, unoccupied space along the opposite edges of the board.
Border edge clearances are helpful in holding the testing machine, perfectly. Generally, the
standard width of the unavailable edges is maintained at 3 mm. Often, panel wastes are also
implemented for the same purpose.

4.2. Fiducials

The testing machines need some reference points to know the exact position of the probes.
The reference points, known as fiducials, are located on the panel waste, and on the PCB itself,
if the waste has been removed. The most suitable and recommended fiducials are top-left and
bottom-right of the board.

4.3. Vias

The vias incorporated in the board design need to be non-masked to position a probe
on the edge of them.
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 Blue: Masked via Red: Non-masked via.
Image credit:electronics.stackexchange.

4.4 Probes near component legs

Probing near the component legs call for sufficient area on the toe. This helps in establishing a
good solder joint. Having said that, probing right on top of the component legs can lead to errors
since any potential open circuit could be temporarily corrected at the test point due to the pressure
exerted by the probe, causing the leg to stick to the pad.

4.5. Size of the board

Place the test access points as close together as possible. It is particularly applicable for designing
a large board.

4.6. Cleaning the assembly

Cleaning the assembly is essential to perform probing. This ensures the removal of unwanted flux.
If the probe position is repeatedly moved to establish a strong contact it will result in increased test
time and false fails.

4.7. Probe points on the ground and power planes

Keep probe points on the ground and power planes on the bottom side of a board. This allows fixed
probes to act as temporary fixtures that expedite the detection of shorts. Further, the overall test
time can be reduced.

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4.8. Maximizing test accessibility

Increase the test accessibility on one side of the assembly. Insert one probable point for each
network. Testing both sides of the board can increase the cost since the PCB needs to be turned
over to test the other side. This can be neglected if a double-sided testing machine is used.
4.9. Checking the component height

There is a maximum component height allowed for both the probed and the unprobed region of
a PCB, typically around 40 mm and 90 mm, respectively. The tall components are placed on the
bottom side if it is unprobed or fitted after the test. They can create a no-fly zone on the assembly
and also hinder test access.

5. Types of board testing

Here are the two important testing techniques:

5.1. Bare board testing

Bare board testing is performed to check the PCB’s connectivity before assembling the
components. Following are the two ways to perform this kind of testing:

• The isolation test verifies the resistance between two electrical connections.
• The continuity test checks if there is any presence of an open circuit within the board.

5.2. Assembled board testing

Assembled board testing is executed after assembling the components. This process ensures
the circuit board’s integrity and correct functionality of the components.

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6. PCB E-test

E-test examines the electrical conductivity of the circuit board with respect to the netlist file
obtained from the schematic. E-tests can be carried out using two methods, flying probe and
fixture method. The criteria for choosing these methods vary as per requirements.

In the Sierra Circuits’ custom quote tool, you can include electrical testing for your board while
requesting an estimation. Click on the check box shown below. If you have any specific testing
requirements, you can mention the same in the general notes section. Time taken to
perform the test can vary depending on the number of nets to be tested.

6.1. Flying probe testing

The bare board and assembled board both can incorporate the flying probe test (FPT) in passive
and active mode, respectively. The probes comprise needles for checking. The test points can
include passive components like resistors, capacitors, inductors, untented vias, or terminating
ends of the components. It can detect the value of non-powered elements, and open or short
circuits, measure voltages, and check the placement of diodes and transistors. The time taken
to finish FPT depends on the number of nets to be tested. Usually, for a normal prototype board,
it can take 30 mins to 3 hours.

11 Expert working in FPT machine

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6.1.1. FPT procedure

1. At first, the test program is generated offline by the test program-generating application
that runs on a PC. FPT requires the BOM, ECAD, and ODB++ files. The generated FPT
test program is now loaded into the tester.

2. The assembled or bare board is placed on a conveyer belt so that it can travel inside the
tester area where the probes are.

3. During the test program, the probes will apply electrical test signals and power to the
test points and detect shorts, opens, and wrong component placement.

Vertical testing in FPT

4. Equipped camera in FPT inspects component polarity and performs diode impedance
test on inputs of integrated devices. Though, the integrated device’s functional behavior
is outside the testing scope.

At Sierra Circuits, we use Seica Spa Pilot V8 for flying probe testing. This latest machine provides
maximum performance, increased test speed, and low to medium volume run. Simultaneous
vertical probing on both sides of the circuit board quickens the debugging process and enhances
the flexibility for prototyping.

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 Seica Spa Pilot V8 FPT machine. Image credit: Seica

6.1.2. Guidelines for test point design and placement

6.1.2.1. Accessibility to nets

• Nets linked to the active components must be accessible on the same side of the
test probes. This leads to enabling the “openfix” option. Apply the same rule for
SMD components as well.
• For better efficacy, maintain a distance of 2.8 mm between the probe and the
probe sensor.
• This condition does not apply to the vertical testing procedure and to the board
that is to be tested on both sides.

(6.1.2.1. to 6.1.2.9, source: DFT (Design for Testability) for SEICA systems)

6.1.2.2. Features of test points

• Preferrable contact points of the FPT process are:

• Test pads without solder resist
• Vias
• Through-holes

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• PTH and SMD component pads

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 • Size of a test point:
• Dimensions depend on the probe type
• The minimum size is 6 mils (20 mils recommended)
• The spacing between one test point to another should be minimum of 10 mils and
20 mils

• Vias:
• The diameter should be between 8 to 20 mils (10 mils recommended)
• Vias must be occluded and free from the solder resist
• For SMD components, particularly with steps slower than 25 mils, apply a
solder pad, that is longer than the component pin. This enables the testing
probe to contact the test point not on the pin but on the soldering pad itself

• For horizontal architecture (PILOT L4/H4), components should be 4 to 5 cm higher than the
opposite of the test side

6.1.2.3. Board clamping

• The board is secured with a clamp/conveyed via, either horizontally (Pilot L4) or
vertically (Pilot V8)
• For testers with horizontal architecture, provide support after every 150 mm or the
distance based on your design requirement on both axes (except the Aerial and V8 test
systems) to keep the board flat

6.1.2.4. Board dimensions

• Maximum board dimensions of 600 x 1010 mm for Pilot L4 testers

• Maximum board dimensions of 600 x 540 mm for Pilot V8 testers

6.1.2.5. Maximum component height

• CAD data must include the component height

• Component height calculations for horizontal Pilot L4 testers:
Maximum board height + components on the head side: 40 mm including the
board width
Maximum board height + components on the bottom side: 100 mm
• Component height calculations for vertical Pilot V8 testers:
Maximum board height + components on either side: 40 mm including the board
width
• Design team provides a list of components whose height is over 17 mm

6.1.2.6. Test point distances

• The clearance is the distance between the center of the test point and the side
of the components
• The minimum distance between a test point and the component can be estimated
by the formula: L = (0.29 x Height) + 0.7 (in mm)

•
E.g. For height H= 4 mm, L= (0,29 x 4)+ 0,7 = 1,86 mm
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 Distance between test point to component

6.1.2.7 Fiducial recognition

• Include 3 fiducials for each board

• Position the fiducials in a triangle shape on either side of the board. It is
essential to achieve different arrangements of the fiducials to eliminate side
errors
• For the larger boards with dimensions greater than 400 mm, place local
fiducials concerning the fine-pitch components which must be visible after
the component has been mounted
6.1.2.8 Wire connection

Wiring should be refrained from colliding with the test points

6.1.2.9 Option for openfix

• To avail openfix, nets to be tested and connected to the active components,

must be accessible on the same side of the testing probe. This is applicable
to SMD connectors also
• For better results, maintain a distance of 2.8 mm between the probe and the
probe sensor

2.8 mm distance is maintained between the probe and the

probe sensor

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 6.1.3. FPT benefits
• Cost-effective
• Greater test coverage
• Do not require a fixture
• Quick implementation
6.1.4. FPT drawbacks
• Time-consuming since probes move between measurement points
• Tough to set up if the board does not include any test point, test via, or masked via
• The lump-sum capacitance can only be tested for the capacitors in parallel

6.1.5. What FPT checks and verifies

• Performance of the components
• Flaws in assembly
• Open traces
• Short connections
• Misplacement of components
• Value of capacitance, resistance, and inductance

6.2 In-circuit testing

In-circuit test is also known as the bed of nails testing method. This process incorporates some
pre-mounted, electrical probes aligned under the board through the preset access points. The
accurate, and stable electrical connection between the probes and the PCB can be established
in this way. The testing probes cause the current to flow through the predetermined test points.

ICT can check for shorts or open circuits, solder mask shortcomings, misplacement or absence
of components, etc. This method comprises testing fixtures to hold the board with the probes
correctly, and test jigs to check multiple components on a board, simultaneously. This test
method saves time.
6.2.1. Directives to make your board ICT compatible

6.2.1.1 Accessibility to nets

As a general rule, all the nets must be accessible on the same side to the
measuring heads, preferably the flip side, comprising the maximum number of
components. A limited number of access points is permissible on the opposite side to
eliminate the hindrance of accessibility to test pads and to increase the test coverage.
This principle is not applicable to Aerial or V8 test systems.

(6.2.1.1 to 6.2.1.18, source: DFT (Design for Testability) for SEICA systems)

6.2.1.2 Accessibility to nets

• The NC nets, which are fill-in pins, need not be accessible

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• The unused nets, which are functional pins, will have accessibility, except for the
Jtag nets (short-circuit detection)
• All the connector pins should be accessible

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 6.2.1.3 Access choice

Following priority order is to be maintained while accessing the nets:

• Test points
• Connection points: through-hole component, connectors
• Vias

6.2.1.4 Board clamping or locating points

Depending on the board size, two or three locating points are required.

• At least two in the bigger diagonal

• Three, if the board side is greater than 400 mm
• More than 3 for the larger board,
• Include two locating points for each rigid part of the flex-rigid boards

6.2.1.5 Definition of holes

• Preferrable hole diameter is 2.7 mm with ±0.05 tolerance

• Hole locating tolerance is ±0.1 mm
• The solder mask blank is 0.3 mm around the locating holes
• Minimum clearance area:
3 mm between the locating holes and the board edge
3 mm between the edge of the locating holes and each physical element
of the board, including the external copper nets
• The locating holes will not be metalized and shall never be used for other
purposes

Specifications required to define holes

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6.2.1.6 Test point minimum dimensions

Test point diameter Reliability

1 mm Highest

Minimum value 0.9 mm

recommended for TOP
side (component side)

Minimum value 0.7 mm

recommended for
BOTTOM side

By default for BOTTOM 0.6 mm Lowest

side (Prohibited on the TOP
side)

6.2.1.7 Minimum test point size according to board dimensions

Board length <75 75-150 150-300 >300

and width in
mm

Recommended 0.7 mm 0.7 mm 0.7 mm 0.9 mm

test pad
diameter

Minimum 0.6 mm 0.6 mm 0.6 mm 0.7 mm

accepted test
pad diameter

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 6.2.1.8 Solder mask and test point

There must not be a solder mask on the test point. The solder mask can not be placed tangent
to the test point.

Solder mask should not be on test point

6.2.1.9 Distance between the test points

The distance between the interaxis test points decides the kind of nail used to manufacture
the test fixture. There are three types of nails, with different kinds of heads according to the
contacts required: point, tulip, and diamond.

6.2.1.10 Nail choice

The choice of the nails determines the cost and reliability. Nails of 1.27mm diameter are used
nails when all other possibilities can not be executed.

Nail Cost factor Reliability

2.54 mm (100 mils) 1 Highest

1.905 mm (75 mils) 2

1.27 mm (50 mils) 4 Lowest

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6.2.1.11 Minimum interaxis

Minimum interaxis Type of nail

Minimum recommended 2 .1 mm 2.54 mm

value

Minimum recommended 1.7 mm 1.905 mm

value

TOP side prohibited by 1.25 mm 1.27mm

default

6.2.1.12 Distance between the test point and the component edge

Component type Distance

Height < 2 mm 0.7 mm

Height > 4 mm 1.91 mm

Board edge 0.9 mm

Hole edge 0.9 mm

Locating edge 3 mm

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 6.2.1.13 Test point under a BGA component

With a significant amount of pressure, exerted by the nails under BGA components, there is a
high risk of breaking the solder joints. Hence, it is crucial to avoid placing a test point under
a BGA component. At least, leave a 5.08 mm (200 mils) gap on the four sides of the BGA to
allow the placement of the upper contrast with a 3 mm diameter. This clearance is common
if two BGA components are placed side by side.

Separating distance between two BGAs

6.2.1.14 Test point density

Distribute the test points on the entire surface to mitigate distortions and mechanic warpage.
The test point density should be lower on the board edge with respect to the average board
density.
6.2.1.15 Precautions

Check and ensure that the access to the test points is not covered by a connector or by
mechanical parts mounted after manufacturing and before the in-circuit test.

6.2.1.16 Accuracy measurement

Incorporate a doubled test point on either side of the component or 4-wire measurement for
the components such as resistors below 100 Ohms, and capacitors with an accuracy of 0.1%
or with lower functional value.
6.2.1.17 Access to the board power supply

For each power supply, four test points are scheduled to supply a current lower than 1 A. An
additional test point can be added to give a rise of 0.5A in the current. It is feasible to schedule
as many test points as possible according to the powers on the connector of the board.
6.2.1.18 Wire rework

It is significant to keep in mind that while executing wire rework test points must be excluded
from any kind of wiring connection.

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6.2.2 ICT benefits

• Used for large production volume

• Provides coverage up to 90%
• Accurate; free from human error

6.2.3 ICT drawbacks

• Not suitable for small volume production
• Voids or inadequate solder masks can not be detected
• Expensive; technologies like test jigs add to more costs

6.2.4 What ICT checks and verifies

• Incorrectly inserted component
• Wrong component
• Improper orientation of diodes, transistors or ICs
• Short circuits and open circuits

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7. Other testing methods

7.1 Functional testing

FCT is implemented for quality control and ensures the intended operation of a device. The
test parameters are provided by the designers depending on the design. This technique
often incorporates simple switch-on/switch-off tests, and sometimes it requires complex
software and precise protocols. Functional testing directly checks the board’s function in real
environmental conditions.

7.1.1 FCT benefits

• Low cost
• Versatile and can be customized as per the design
• Doesn’t impact the lifespan of the board, unlike other tests that exert excessive stress
on it

7.1.2 FCT drawbacks

• Requires experienced technicians

7.1.3 What FCT checks and verifies

• Checks the entire assembly

• Verifies boards’ functions in different working conditions

7.2 Automated optical inspection

AOI incorporates 2D or 3D cameras that click high-resolution images and verify the schematics.
Here, various surface feature defects such as stains, scratches, and open and short circuits
are checked. It also scans for missing, incorrect, and wrongly placed components. Automated
optical inspection is used with another type of testing method to obtain the correct results.
For instance, AOI with the flying probe, and AOI with the in-circuit test. It can be included
directly on the production line to prevent any premature board failure.

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7.2.1 How AOI works

1.Capture images: Automated optical inspection incorporates an advanced, expensive

camera. These cameras range from extended graphics array (XGA) to multi-megapixels
high-resolution sensors. After component placement and soldering, the board is passed
through the AOI device. The camera captures multiple images. Successful assembly
creates a golden standard. In the subsequent production runs, AOI scans and compares
new images with the existing golden standard.

Machine vision camera used in AOI

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 a. Optical system resolution or imaging resolution is critical. It determines the extent of
the details visible to the AOI. The resolution is influenced by inspection speed, accuracy,
and size of the smallest component used on the circuit board. The camera’s sensor, lens,
and the distance from the board are also key factors in determining imaging resolution.
b. Field of view (FOV) is defined by the resolution of the camera sensor. It is the area of
the board that can be covered by a single image.

2. Proper illumination for visual inspection: It is paramount to scan and inspect various
parts. Different kinds of lights such as incandescent, fluorescent, infrared (IR), and
ultraviolet (UV) are involved in AOI. New technologies incorporate LEDs as the light source
to procure an even and consistent form of lighting. The lighting system consists of red,
white, green, and blue LEDs in a configurable lighting module. These LEDs provide an even
and consistent form of lighting.

7.2.2 AOI benefits

• Fatal defects can be detected with accuracy

• Consistent approach

7.2.3 AOI drawbacks

• Only surface defects can be detected

• Time-consuming process
• Setups are subject to change based on design
• Detection based on the database is not always 100% accurate

7.2.4 What AOI checks and verifies

• Lifted and misplaced component

• Open circuits
• Solder shorts
• Insufficient or excess solder

7.3 Burn-in testing

The burn-in testing is an early check-up of the board to prevent dangerous failures after
executing fabrication. The method involves exceeding the specified operating limits to trigger
the failures. This is an efficient way to detect the maximum operational rating of the board.
Here, the various operating conditions refer to voltage, current, temperature, operating
frequency, power, and other factors pertinent to the design.

7.3.1 Burn-in test benefits

• Increases product reliability

• Verifies the functionality of the board concerning the ambient conditions

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 7.3.2 Burn-in test drawbacks

• The exerted stress beyond the rating can reduce the board’s lifespan.
• The process involves more time as well as more effort.

7.3.3 What burn-in test checks and verifies

• Examines the reliability of the specified parameters of the components

7.4 Automated X-ray inspection

Automated X-ray inspection (AXI) detects errors in hidden components, solder connections,
BGA packages, internal traces, and barrels with the help of X-ray imaging. The machine’s
software creates real-time 2D images of components and scans the defects in a non-
destructive way.

7.4.1 AXI process flow

1. The PCB, under test, is exposed to the X-ray radiation generated by a tube.
2. A detector can capture X-rays passing through the sample board and transform
them into a visual representation. Generally, heavy materials absorb more
radiation than lighter ones. On X-ray scanned images, heavy materials appear darker
whereas lighter materials are more translucent to the radiation. In the case of PCBA,
solder joints are made of heavy materials, and other parts such as packages, silicon
ICs, and component leads are made of light materials. Hence, high-quality solder joints
look darker on images than other parts.

X-ray scanned image of PCB 26

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 3. X-ray inspection systems should have enough magnification to ensure the correct
information during defect analysis.

X-ray inspection machine at Sierra Circuits

7.4.2 AXI benefits

• An X-ray machine can easily check the internal layers from the top of the board.

7.4.3 AXI drawbacks

• This requires experienced and skilled technicians.

• The process demands more labor and cost.

7.4.4 What AXI checks and verifies

• Misalignment of components
• Solder void
• Solder quality
• BGA open and short connections

7.5 Visual inspection

Here a technician inspects the circuit board with bare eyes or by using a microscope. This
method can determine deformed surface features, coating quality, the position of vias, the
unveiled components’ alignment, the absence of components, and other glitches.

27
Copyright Sierra Circuits Inc., 2022
 Visual inspection of PCB

7.5.1 Visual inspection benefits

• Easy and basic method

7.5.2 Visual inspection drawbacks

• Subject to human errors

• Minor and invisible defects can not be detected

7.5.3 What visual inspection checks and verifies

• Missing component
• Contaminated solder paste
• Solder joint reflow
• Warpage issues

Design for testing is fundamentally a reviewing process to find and fix any manufacturing
errors and eliminates excess processes. Without this periodic testing, PCB manufacturers can
face serious production errors. DFT ensures fabricating boards with high yields and minimum
turnaround times.

28
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 The Designer's Toolkit
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1108 West Evelyn Avenue Sunnyvale, CA 94086
+1 (408) 735-7137
www.protoexpress.com