IMPORTANT FORMULAS TO REMEMBER

CHAPTER 1: DIODE CIRCUITS

1.Diode models:

Figure 1: Approximate and ideal semiconductor diode models.

2. V-I Characteristics:
A diode is an active unidirectional of non-linear device.

Figure 2: V-I characteristics

Breakdown voltage of diode is the manufactures specification. So, in any type of PN-junction.
1
VBr. 
Doping

3.Diode Resistance:

3.1.Dynamic Resistance of Diode:

dV VT
r = ;r =
dl l
l  l0 for a forward current l = 26 mA

rsi > rGe

Diode small signal conductance:
ID
g=
VT
4.Temperature Dependence of V-I Characteristics:
1.Reverse saturation current approximately doubles for every 10°C rise in temperature
I02(T) = I01 × 2(T2–T1)/10
2.For either silicon or Ge at room temperature,
dV
= −2.5mV/ C
dT

5.Summary of series & parallel clipper :

Positive Negative

Simple series clippers (Ideal diode)

Based series Clippers (Ideal Diodes)

Figure 3
6.CLAMPER

6.1. Negative clamper

Fig 4(a): Ideal clamper circuit

Fig 4(b): waveform

6.2. Negative clamper with voltage source:

Figure 5(a)
 Figure 5(b): Waveform
6.2. Positive clamper :

Figure 6(a): Positive clamper circuit

Figure 6(b): Waveform

7.VOLTAGE MULTIPLIER :

7.1. Voltage doubler:

Figure 7(a): Voltage doubler circuit

VAB = Vm + Vm = 2Vm
 7.2. Voltage tripler/Quadrupler :

Figure 7(b): Voltage tripler/Quadrupler circuit

8. DIODE AS RECTIFIER:

8.1. Half wave Rectifier

Figure 8(a): Half Wave Rectifier

 Figure 8 (b): Input and Output waveform

Vm
a. Vo (DC ) =


Vo (DC ) Vm Im
b. Io (DC ) = = =
R R 

Vm
c. Vo (rms ) =
2

Im
Io (rms ) =
d. 2

2 2
 Vo (rms )   Io (rms ) 
=   – 1 =   –1
 Vo (DC )   Io (DC ) 
e.

 = 1.21 (%) = 121%

f. ➔

PIV = Vm
g.
Po ( dc )
=  100
Pin ( ac )
h. ➔  = 40.5%

i. FF = 1.57

j. TUF = 28%
Im I
k. Peak factor = = m 2
Irms Im /2
l. Time period = T = 2π , Frequency f(out) = f(in)
8.2.Disadvantage of half wave rectifier:
(i) Vo (DC) = 0.318 Vm
Output DC voltage is only 31.8% of peak input voltage Vm
(ii) η = 40.5%
Efficiency is only 40.5%, that is only 40.5% is converted into DC remaining will be
lost.
9.Full Wave Rectifier:
9.1.Centre-Tapped Full-wave Rectifier:

Fig 9(a)

(b)
Figure 9: (b) Centre tap rectifier circuit, (c) waveform
2Vm
Vo (DC ) = = 0.636Vm
i.

 2Im
Io (DC ) = = 0.636 Im
ii. 

Vm
Vo (rms ) =
2
iii.
Im
Io (rms ) =
2
iv.
 = 0.483 (%) = 48.3%
v. ➔

 = 81%
vi.
PIV = 2Vm
vii.

Figure 10

TUF(primary) + TUF(sec ondary)

TUF =
viii. 2
PDC
(TUF)p = = 69%
(Pac )p

ix. FF = 1.11

Im Im
Peak factor = =  2
Irms Im / 2
x.

xi. Time period, T = T/2 = π , Frequency f(out) = 2*f(in)

 9.2. Bridge Rectifier

Figure 11: Bride Rectifier

10. FILTERS

A filter circuit is a device to remove the AC components of the rectified output,

but allows the DC components to reach the load.
10.1 Capacitor filter:

Figure 12: Basic capacitor filter circuit

Figure 13(a): Full wave rectifier with capacitor filter

Figure 13 (b): Filtered output voltage

1
r.f. =
4 3fCRL
10.2 Inductive filter:

Figure 14: Inductive Filter circuit

√2 R L RL
Ripple factor = ⋅ ⇒
3 2ωL 3√2ωL

10.3 LC filter:

Figure 15: LC Filter circuit

Inductance is higher with respect to capacitance.

2 XC
r.f. =
3 XL

10.4 π- section filter:

Figure 16: π – section filter circuit

√2 X C1 ⋅ X C2
ripple factor. =
XL ⋅ R L
Here, XC1, XC2, XL are reactance and RL is resistive load.

10.5.RC filter :
RC filters are formed by replacing the inductor component of the π-section filter.

Figure 17: RC filter circuit

 2XC1 XC2
Ripple factor =
R  RL

CHAPTER 2:VOLTAGE REGULATORS

1.REGULATOR

i. The output resistance of the regulator should as low as possible, ideally zero.
ii. The maximum power dissipation by the Zener diode should be as low as possible.
Forward Biased Zener Diode
Ideal Practical
(VA > VK)

Fig 1. Equivalent Circuit of Zener Diode

Reverse Biased Zener Diode

Ideal Practical
(VA < VK)

Breakdown Region Zener Diode

Ideal Practical
(VK > VZ)
 Figure 2: Equivalent Circuit of Zener Diode

CHAPTER 3 : BJT BIASING & STABILIZATION

1. SIMPLIFIED STRUCTURE OF BJT AND MODE OF OPERATION:

Table-1

BJT Modes of operation

Mode EBJ CBJ

Cut-off Reverse Reverse

Active Forward Reverse

Reverse Active Reverse Forward

Saturation Forward Forward

2.Relation between current gain :

For dc mode, common emitter current gain
IC
=
IB

And, common base current gain

IC
=
IE

 
= & =
 +1 1−

3.Calculation of Stability (S)

Ic 1+
S= = …….(xi)
Ico I
1–  B
Ic

IB
• For any BJT circuit lies between 0 and –1. So, S lies between 1 and (1 + β)
Ic
 • Since smaller stability factor is desired, so ideally Stability factor should be equal to
1.

4.BJT BIASING
4.1 Fixed Bias:

S =1+

Disadvantage
• If β = 100, the stability factor is 101 and the collector current is 101 times that
ICO, reverse saturation current. Hence the stability factor for a fixed biased circuit
is very high. So, it will be the least stable biasing arrangement.
4.2 Collector to base bias circuit :
 +1
S=
 RC 
1+  
 R C + RB 

Advantage
• Stability factor is smaller than (β + 1), hence an improvement in stability is
obtained over fixed bias circuit.
Disadvantage
• Stability factor depends upon RC. If Rc becomes smaller or zero, then stability
factor becomes very large and IC does not remain stable.
• Resistance RB connected from collector to base cause negative feedback due to
which voltage gain of the amplifiers circuit decreases.
4.3. Self-bias or Voltage-Divider bias:
1+
S=
 RE
1+
Rb + RE

Important point
• S varies between 1 for small Rb/RE and 1 + β for Rb/RE → 
• Smaller value of Rb, better to stabilization
(Note: even if Rb becomes zero, the value of S can’t be reduced below unity. Hence
Ic always increases more than Ico.)
 CHAPTER 4 : CURRENT MIRROR CIRCUITS

1.CURRENT MIRROR CIRCUIT

NOTE : for Current Mirror:

High output resis tan ce

Low input resis tan ce

1.1.Dc Analysis Of Bipolar Transistor Current Mirror

Figure 1

IC1 1
 Mirror Ratio = MR = =
IRe f 2
1+


NOTE : Generalized Formula

IRn
IC1 = Here, n = no. of transistors.
n+1
1+


1.2.Drawback Of Single Current Mirror

(a) The main drawback of a single Current Mirror is that the no. of transistors
cannot be more than 10.
n·IR
i.e., I0 = nIC1 = Here n = no. of transistors n  10
n+1
1+


(b) Single Current Mirror holds only for higher values of β.

(c) This Mirror concept is only used for perfectly matched transistors.
∴ we used Modified Current Mirror that can be used for n (no. of transistors) greater
than 10 and β limitation is also removed.
2. MODIFIED CURRENT MIRROR: [n > 10]

Figure 3
 2 
IR = IC1 1 + 
  (1 +  ) 

IR
 IC1 =
2
1+
 (  + 1)

NOTE: In General, for n current sources,

IR
IC = for n > 10
n+1
1+
 (  + 1)

Applications of Current Mirror

(i) It can be used as a Current Regulator
(ii) It is used in biasing circuits
(iii) It is used is differential Amplifiers as a current source at the emitter terminal.
 CHAPTER 5 : BJT AMPLIFIERS
1. HYBRID EQUIVALENT MODEL:

Figure 1: Hybrid equivalent Circuit

I0 hf
Ai = =
▪ Ii 1 + h0RL

V0 hfRL
AV = =−
▪ Vi hi + (hh
i 0 − hfhr )RL

Vi hf
Zi = = hi − hrRL Ai = hi − hrRL
Ii 1 + h0RL
▪
V0 1
Z0 = =
I0 h0 − hrhf (hi + R s )
▪

1.1 Summary of h-parameters:

Table-1 h-parameter for Common-Emitter Configuration
h-parameters Expression
Vbe
Input impedance hie = ohms
ib VCE = const

Vbe
Reverse voltage gain hre = unitless
Vce IB = const

ic
Forward current gain hfe = unitless
ib VCE = const

Ic
Output conductance hoe = siemens
Vce IB = const
 Table 2: Conversion table for Hybrid Parameters
Common-base to Common-emitter to Common-base to
common-emitter common-base common-collector
hib hie hib
hie = hib = hic =
1 + hfb 1 + hfe 1 + hfb
hibhob hiehob
hre = − hrb hrb = − hre hrc = 1
1 + hfb 1 + hfe
hfb hfe −1
hfe = − hfb = − hfc =
1 + hfb 1 + hfe 1 + hfb
hob hoe hob
hoe = hob = hoc =
1 + hfb 1 + hfe 1 + hfb

Table 3: Typical values of h-parameters for CE, CC and CB Transistor Configurations

h-Parameters Common-emitter Common-collector Common-base

hi 1 kΩ 1 kΩ 20 Ω

hr 2.5 × 10–4 1 3 × 10–4

hf 50 –50 –0.98

1/h0 40 kΩ 40 kΩ 2 MΩ

2. Base Current and input Resistance at the Base :

The small signal input resistance between base and emitter, looking into the base, is
denoted by rπ and is defined as

vbe  V VT
r = = = T or r =
ib gm IB IC
3.Emitter Current and the input Resistance at the Emitter :

vbe VT r
re = = = 
ie IE 1+
4.SMALL SIGNAL HYBRID-Π EQUIVALENT CIRCUIT OF BJT:

Figure 2
 Vbe V VT
= r = T =
ib IBQ ICQ

ICQ
gm =
VT

VT ICQ
rgm = · =
ICQ VT

5.BASIC TRANSISTOR AMPLIFIER CONFIGURATIONS :

Table 4

Four equivalent two-ports network

Gain Property Equivalent circuit Gain Property

Output voltage proportional to

Voltage amplifier
input voltage

Output current proportional to

Current amplifier
input current

Transconductance Output current proportional to

amplifier input voltage

Transresistance Output voltage proportional to

amplifier input current
6.Different Types of Amplifiers comparison:

Table 5: Different Types of Amplifiers & its performance parameters

Voltage Gain AV Input Impedance Output Impedance Current Gain AI
Commo  " Ri = rπ || RB ro || RC −R'C
n
R = gmRL"
r L Ri' = RS + (Ri ) R'C + RC
(R '
C = RC || ro )
Emitter
with RE (R "
L = ro || RC || RL )
Commo RL" −gmRL" Ri = r + (1 + ) RE RC -β
=
n r + (1 +  ) RE 1 + gmRE
Emitter
Ri' = Rs + Ri
without
RE
Commo (1 +  ) RE" Ri = r + (1 + ) RE'  R + r  ( + 1) ro   + 1  
1 RE || ro ||  S  ( )
n
r + (1 +  ) RE"  (1 +  )  (RE + ro )
Collecto
Ri' = (RS || RB ) + Ri
r (R "
E = RE || ro )
Commo  r RC gmRC  r 
( RC || RC ) = gm (RC || RL )   || RE   1
 (1 +  )
n Base r 1+ R C + RL 


7. FREQUENCY RESPONSE OF COMMON EMITTER AMPLIFIER:

Figure 3: Capacitive Coupled Common Emitter Amplifier

 Figure 4: Magnitude of gain of the CE amplifier versus frequency

7.1. Cut-off Frequency

For a given circuit with equivalent resistance (R eq) and equivalent capacitance (C eq),
the 3-dB cut-off frequency is given by
1
f3dB =
2Ceq R e q

Thus, we calculate 3 dB frequencies due to CC1, CC2, CE as below.

• The effect of CC1 is determined with CE and CC2 assumed to be acting as perfect
short circuit as shown in fig, So,
1
( f3dB )C
C1
=
2CC1 ((RB || r ) + R S )

Figure 5 :The effect of Cc1 is determined with

CE and Cc2 assumed to be acting as perfect short circuit
• The 3 dB frequency due to CC2 is given by
1
( f3dB)CC2
=
2CC2 (R C + RL )
 Figure 6 :The effect of Cc2 is determined with Cc1 and CE
assumed to be as perfect short circuit.

• The 3 dB frequency due to CE is given by

1
( f3dB )C =
R || R S 
E 
2CE  re + B
  + 1 
 CHAPTER 6 : MOSFET Biasing & Amplifiers

1.MOS TRANSCONDUCTANCE:

1.1.Transconductand in saturation region:

nCoxW
I D (sat) = (VGS − Vth )2
2L
I D
gm =
VGS

W
g m =  n Cox (VGS − VTH )
L

W
gm = 2nCox ID = 2KID
L

1.2 Various dependencies of gm

Table 1
W W W
constant variable variable
L L L
VGS–VTH variable VGS–VTH constant VGS–VTH constant

gm  ID gm  ID W
gm 
L

g m  VGS − VTH W 1
gm  gm 
L VGS − VTH

2. DIFFERENT BIASING METHODS

2.1 Drain to gate bias configuration:

VDS = VGS

Drain to gate bias always enables MOSFET in saturation region

 2.2 Fixed bias configuration:

Figure 2 (a) and (b)

DRAWBACK OF FIXED BIAS:

It is a dual battery design which makes it expensive and more space
occupied bias Configuration.
2.3 Self bias configuration:

(VGS )Q
 (ID )Q = −
RS
Vds= Vdd-Id(Rs+Rd)
3.SMALL SIGNAL AC EQUIVALENT MODEL

• Comparison between BJT and MOSFET:

 MOSFET

BJT

Voltage Controlled Current Source (VCCS)

Current Controlled Current Source (CCCS)

Here,
Here, gm = transconductance
gm = transconductance rd = dynamic resistance
rd = dynamic resistance ID = f(VGS, IDS)
ro = output resistance
ID ID
∴ In BJT, high input impedance and low ID =  VGS +  VDS
output impedance VGS VDS
Therefore, BJT = CCCS gm 1/rd
⇒ Current amplifier Therefore, MOSFET = VCCS
⇒ Transconductance amplifier

Table 2: Comparison between BJT and MOSFET

4.ANALYSIS OF COMMON SOURCE AMPLIFIER

Figure 2 : CS Configuration of E-MOSFET with potential divider biasing (Bypassed Rs)

PARAMETER EXACT With rd >> RD

ZI RG RG

ZO RD||rd RD
 AV -gm(RD|| rd) -gmRD

Table 2: Summarized performance of common source amplifier

5.ANALYSIS OF COMMON DRAIN AMPLIFIER:

Figure 3: Circuit diagram of Common Drain Amplifier

PARAMETER EXACT rd>>RD

ZI RG RG
1 1
Z0 || R S || R S
gm gm
gm (rd || R s ) gm Rs
AV
1 + gm (rd || R s ) 1 + gm Rs

Table 3: Summarized performance of Common Drain Amplifier

6.ANALYSIS OF COMMON GATE AMPLIFIER

Figure 5: Common Gate Amplifier

 Figure 6: Simplified small signal model

Zin ' =
(r0 + RD )
(1 + gmr0 )

 1 
Zin =  R S ||  (if r0 is infinity)
 gm 

Z0 = RD || r0

Z0 = R D (if r0 is infinity)

 RD  
  gmRD + 
V0  r0  
Av = =  
Vin  RD 
 1 +  
  r0  

Voltage gain = Av = gmRD

 CHAPTER 7 : MULTI STAGE AMPLIFIERS

1.Cascading Amplifier

Figure 1: Two stage Amplifier.

A = A1  A2

V0
A=
Vin

2.EFFECT OF CASCADING ON BANDWIDTH

2.1. Identical Stages:

The lower cutoff frequency for the multi stage amplifier is given by :

fL
(fC )low =
21/n − 1

and the upper cutoff frequency for multi-stage amplifier is given by:

(fC )high = fH  21/n − 1

Here,
n = no. of stages
fL , fH are low & high frequency respectively.

Thus, bandwidth of multi-stage amplifier is Bw = fC ( )high − ( fC )low

2.2.Non-Identical stages:
Here for every gain, separate bandwidth is present.

Figure 2: Cascading of non-identical stages

 fLn = 1.1 fL21 + fL22 + ...fLn

2
 1.1
Similarly, fHn =
1 1 1
2
+ 2 .... 2
fH1 fH2 fHn

3.EFFECT OF CASCADING ON RISE TIME (tr)

3.1. For Single Stage:

0.35
tr =
fH

Here, tr = rise-time
fH = bandwidth
3.2. For Multi Stage:

tr = 1.1 tr12 + tr22 + tr32

∴ Rise time of Multistage:
Conclusion:
(i) Bandwidth of multi-stage amplifier is always less than bandwidth of single stage
amplifier (Gain = more)
(ii) Rise-time of multi-stage amplifier is always greater than rise time of single stage
amplifier.
4.Comparison of different type of coupling :
Table 1

Transformer
Characteristic R-C coupling Direct Coupling
coupling

Frequency Excellent in audio

Poor Best
Response frequency range

Cost Less More Least

Space & Weight Less More Least

Impedance
Not good Excellent Good
Matching

Power amplifying extremely

Use Voltage amplification
amplification low frequency

5. POPULAR CASCADING DESIGN:

5.1.1 Cascade Amplifier: (CE – CB configuration)-

 Figure 3: Cascode Amplifier Configuration
cascode amplifier has a high gain, moderately high input impedance, a high output
impedance, and a high bandwidth.
5.1.2 Transconductance of below cascode amplifier:

Figure 4: Cascode Amplifier

( gm )cascode = gm1

5.2 Darlington Pair [CC – CC]

Figure 5: Darlington pair configuration

5.3 DIFFERENCE:
 Emitter Follower Darlington pair

(i) AI = β AI = AI1  AI2

(ii) AV = 1 (CC = voltage buffer)
IE1 IE2
(iii) Zi = RL AI = 
IB1 IB2
(iv) Z0 = re

(1 + 1 )IB1 (1 + 2 )IB2
AI = 
IB1 IB2

AI = (1 + 1 )  (1 + 2 )

 overall   1  2

(ii) Zi = (1 + 1 )(1 + 2 ) RL  12RL

Table 3: Difference between Emitter follower and Darlington pair

Following are the important characteristics of Darlington pair:
• Extremely high input impedance.
• Extremely high current gain.
• Extremely low output impedance.
 CHAPTER 8: FEEDBACK AMPLIFIERS

1. Difference between positive and negative feedback:

Positive feedback Negative feedback

V0 = AVi V0 = AVi

V i = Vs + Vf V i = Vs – V f

V0 = A(Vs + Vf) V0 = A(Vs – Vf)

V0 = A(Vs + βV0) V0 = A(Vs – βV0)

V0(1 – βA) = AVS V0(1+ βA) = AVS

V0 A V0 A
= =
Vs 1 – A Vs 1 + A

Table 1: Difference between positive and negative feedback

1.1 Conclusion
(1) Apf > A > Anf.

A
(2) A nf = A >>> 1
1 + A

1
A nf = stability.


NOTE- Negative feedback theory is applied for stable system like Amplifier.

A
(3) A pf =
1 − A

Figure 1

NOTE- Positive feedback theory is applied for unstable system like oscillator

2. EFFECTS OF NEGATIVE FEEDBACK

2.1 Advantage of Negative feedback amplifier

 A
Af =
1 + A

A f A f 1
=  sensitivity
A f A 1 + A
(1 +  A) → desensitivity

2.2 Increase in input impedance

Figure 2
Zif = Zi (1 + A)

2.3 Decrease in output impedance

Z0
Zof =
1 + A
2.4 Increase in BW

Figure 3

Lower cutoff frequency decreases

fL
f 'L =
1 + A

Upper cutoff frequency increases

 f 'H = (1 + A) fH

BW’ = BW(1 + A  )

3.TOPOLOGY

Figure 4-Block diagram analysis

3.1 At input side
At input side voltage mixed in series and current mixed in shunt.

Figure 5
3.2 At output side
In output side current sampled in series and voltage sampled in shunt.

Figure 6
4.Amplifier Characteristics-
The amplifier characteristics which are affected by various negative feedback are
listed in the following table 2
Amplifier Nomenclature Input Output
Impedance Impedance
 Voltage Amplifier Voltage series Zi =  Z0 = 0
OR Increases Decreases
Series voltage Zif = Zi (1 + Aβ)
OR
Series shunt
OR
Voltage Voltage
Transreistance Amplifier Voltage shunt Zi = 0. Z0 = 0.
OR Decrease Decrease
Shunt voltage Zi Z0
OR 1 + A 1 + A
Shunt shunt
OR
Voltage current
OR
Transconductance Current series Zi =  Z0 = 
Amplifier OR Input impedance output impedance
Series current increases increases
OR Zi (1 + A  ) Z0(1 + A  )
Series series
OR
Current voltage
Current Amplifier Current shunt Input impedance output impedance
or decreases increases
Shunt Current Zi = 0 Z0 = 
or Zi Z0(1 + A  )
Shunt series 1 + A

or
Current
Current

Table 2

5.TYPES OF NEGATIVE FEEDBACK AMPLIFIERSRS:

 Figure 4.1: Voltage Series Topology

Figure 4.2 : Voltage Shunt Topology

Figure 4.3 : Current Series Topology

Figure 4.4: Current Shunt Topology

CHAPTER 9 :POWER AMPLIFIERS

1. BASICS OF POWER AMPLIFIERS

 1.1.CLASS A POWER AMPLIFIERS

Pin = voltage × current = VCC(IC)Q

2
V2  Vm  1 V 2
(Pout )ac = I2RC = =  = m
RC  2  RC 2RC

I = RMS value of ac output current through load.

V = RMS value of ac voltage
Overall efficiency (η):

(Pout )ac
()overall =
(Pin )dc

Here,
()overall  30%
Transformer coupled class A power Amplifier: -

VCC  (IC )Q 1
()collector = =
2VCC  (IC )Q 2

1
=  100% = 50%
2
CONCLUSION:
Therefore, the efficiency of class A power amplifier is nearly to 30% whereas it has got
improved to 50% by using the transformer coupled class A power amplifier.
1.2. CLASS B POWER AMPLIFIERS:
POWER EFFICIENCY OF CLASS B PUSH PULL AMPLIFIER

(Pout )ac
()overall =
(Pin )dc


= = 0.785 = 78.5%
4
1.3. CLASS AB AMPLIFIER

The conduction angle of class AB amplifier is somewhere between 180° to 360°

depending upon the operating point selected.
Efficiency of class AB is in between 50-60%

1.4. CLASS C AMPLIFIERS

The conduction angle for class C is less than 180°
2.COMPARISON
 Class A Class B Class AB Class C

Efficiency 50% 78.5% Between A & B 100%

100°-150°
180°-220°
Conduction angle 360° 180° (less than 180°)
(Greater than 180°)

Table 1: Comparative study between different Power Amplifiers

 CHAPTER 10 : DIFFERENTIAL AMPLIFIERS

1. Basics of Differential Amplifier:

Fig. 1 Ideal differential amplifier

The differential amplifier amplifies the difference between two input voltage signals. Hence it is also
called difference amplifier.
Vo ∝ (V1 – V2)
2. Differential Gain (Ad)
Vo = Ad(V1 – V2)
Where, Ad = differential gain
The difference between the two inputs (V 1 – V2) is generally called difference voltage and denoted as
Vd .
Vo = A d Vd
Hence, the differential gain can be expressed as,
Vo
Ad =
Vd

Generally, the differential gain is expressed in its decibel (dB) value as,
Ad = 20 Log10 (Ad) in dB
3. Common Mode Gain (Ac):
The output voltage of the practical differential amplifier also depends on the average common level
of the two inputs. Such an average level of the two input signals is called common mode signal
denoted as Vc.
V1 + V2
∴ Vc =
2
The gain with which it amplifies the common mode signal to produce the output is called as common mode gain
of the differential amplifier denoted as Ac.
∴ Vo = Ac Vc
So, the total output of any differential amplifier can be expressed as,
∴ V o = Ad V d + A C V c
4. Common Mode Rejection Ratio (CMRR)
`The ability of a differential amplifier to reject a common mode signals is expressed by a ratio called
common mode rejection ratio denoted as CMRR.
It is defined as the ratio of the differential voltage gain Ad to common mode voltage gain Ac.

Ad
∴ CMRR =  =
Ac

*Ideally the common mode voltage gain is zero, hence the ideal value of CMRR is inifinite.
*For a practical differential amplifier A d is large and Ac is small hence the value of CMRR is also very
large.
*Many a times, CMRR is also expressed in dB, as

Ad
CMRR in dB = 20 log dB
Ac

The output voltage can be expressed in terms of CMRR as below:

∴ Vo = Ad Vd + Ac Vc
 A V 
= Ad Vd 1 + c c 
 A d Vd 

 
 
1 Vc 
∴ Vo = Ad Vd 1 +
 Ad  Vd 
   
  Ac  

 1 V 
∴ Vo = Ad Vd 1 +  c
 CMRR Vd 

5. Different types of Differential Amplifier:

Ad Voltage RE Input R0 Output
Configuration Circuit
gain resistance resistance

Dual Input, hfe RC

1. Balanced 2(RS + hie) RC
RS + h ie
Output
 Dual Input, hfe RC
2. Unbalanced
Output (
2 RS + h ie ) 2(RS + hie) RC

Single Input, hfe RC

3. Balanced 2(RS + hie) RC
RS + h ie
Output

Single Input, hfe RC

4. Unbalanced
Output (
2 RS + h ie ) 2(RS + hie) RC

Table 5
The expression for the common mode gain Ac remains same for all the configurations which is,
hfe RC
Ac =
RS + h ie + 3RE (1 + hfe )

CHAPTER 11 : OPERATIONAL AMPLIFIERS

1. OPAMP INTRODUCTION:

1.1 COMPARISON BETWEEN IDEAL OPAMP AND PRACTICAL OPAMP:

Property Ideal Practical (Typical)

Open-loop gain Infinite Very high (>1000)

Open-loop bandwidth Infinite Dominant pole (≅ 10 Hz)

CMRR Infinite High (> 60 dB)

Input Resistance Infinite High (> 1 MΩ)

Output Resistance Zero Low (< 100 Ω)

Input Bias Currents Zero Low (< 50 nA)

Offset Voltages Zero Low (< 10 mV)

Offset Currents Zero Low (< 50 nA)

Slew Rate Infinite A few V/μs

Drift Zero Low

Table1: Comparison of an ideal and a typical practical opamp
1.2. Slew-Rate:

V0
SR = V/s
t

Vi
SR = ACL
t
1.3. Maximum Signal Frequency in terms of Slew Rate:

SR
f Hz
2k
2. APPLICATIONS OF OP-AMP

2.1. Inverting-Amplifier:

−R f
Av =
R1

Figure: 1

2.2. Non-Inverting Amplifier:

Figure 2: Non-Inverting Amplifier

V0 R
AV = =1+ f
Vi R1
2.3. Voltage Adder:
2.3.1. Inverting Adder:

Figure: 3

 V0 = −(V1 + V2 ) if R1=R2=R

2.3.2. Non-Inverting Adder:

 Figure: 4

 V0 = (V1 + V2 )

2.4. Voltage Subtractor Circuit

R f2 R
V0 = V1 − f V2
R1R 3 R2

Figure 5: Voltage Subtractor Circuit

2.5. Differentiator circuit:

Figure 6: Differentiator circuit

dVi
V0 = −RC
dt
2.6. Integrator circuit:
 Figure 7: Integrator circuit
−1
RC  i
V0 = Vdt

2.7. Logarithmic Amplifier:

Logarithmic Amplifier by using diode Logarithmic Amplifier by using transistor

Figure: 8

 V 
V0 = −VT ln  i 
 ISR 

2.8. Exponential Amplifier:

Figure 9: Exponential Amplifier

V0 = −IS ReVi /VT

2.9. Square root amplifier:

Figure: 10

2Vi
V0 = − − VT
W
nCox R
L

2.10. Comparator: –

(b) Inverting Comparator

(a) Non-Inverting Comparator

V = + Vsat , Vi  VRe f  V , Vi  VRe f

V0 =  H V0 =  L
 VL = −Vsat , Vi  VRe f VH , Vi  VRe f

Table 2: Comparator
2.11. Schmitt Trigger
 Figure 11: Basic Schmitt Trigger

2.11.1. Inverting Schmitt trigger:

Here,

 R1   R1 
VTH =   VH , VTL =   VL
 R1 + R 2   R1 + R 2 
2.11.1. Non Inverting Schmitt trigger:

R 
VTH = −  1  VL
 R2 

R 
VTL = −  1  VH
 R2 

Non-Inverting Schmitt trigger Voltage-Transfer Characteristics

2.12. Precision Rectifier

Figure 13:

2.13. Instrumentation Amplifier:

It consists of two non-inverting amplifiers and one difference amplifier.
 Figure 14: Instrumentation Amplifier

R4  2R 2 
V0 = 1 +   V − V1 
R3  R1   2

2.14. Astable Multivibrator:

Figure 15: Astable Multivibrator

R2
Here = = feedback fraction
R1 + R2

Figure 16: Waveform

Here,
TC = charging time
Td = discharging time
 1 +  
Td = RCln   Discharging time
1 −  

1 +  
TC = RCln   Charging time
1 −  

1 +  
T = Td + TC = 2RCln   Total time period
1 −  
R2
Here,  =
R1 + R 2

1
f = Frequency of square wave generator
1 +  
2RCln  
1 −  
2.15. Bistable Multivibrator

Figure 17: Bistable Multivibrator

Here, a to b changes only after triggering and before triggering, it will be
constant = +Vsat

Figure:18

2.16. Monostable Multivibrator

 Figure 19: Monostable Multivibrator

Figure:20 Waveform

Time Period of Monostable Multivibrator:

TP=0.693RC

Other names of Monostable Multivibrator:

• One Shot Multivibrator

• Pulse Stretcher
 CHAPTER 12 : OSCILLATORS

1. OSCILLATION CRITERION

Figure 1: Oscillator Block Diagram

V0 A
=
Vin 1 − A

A = 1 ..….. (i)

Expressed in polar form A = 10 or 360 ……… (ii)

Equation (i) & (ii) gives two requirements for oscillation:

• The magnitude of the loop gain Aβ must be at least 1, and
• The total phase shift of the loop gain Aβ must be equal to 0° or 360°.
The above conditions is known as Barkhausen criterion.
2.OSCILLATOR TYPES:

Types of components used Frequency of oscillation Types of waveform generated

Sinusoidal
RC oscillator Audio frequency (AF)
Square wave
LC oscillator Radio frequency (RF)
Triangular wave
Crystal oscillator
Sawtooth wave etc.

Table 1
3. THE PHASE-SHIFT OSCILLATOR
3.1. Phase Shift Oscillator Using FET

Figure 2(a): An FET Phase Shift Oscillator

1
f =
2RC 6

At the frequency of oscillation,

1
=+
29
In order that |βA| shall not be less than unity, it is required that |A| be at least 29.
Hence and FET with μ < 29 cannot be made to oscillate in such a circuit.
3.2. Phase Shift Oscillator Using BJT:

Figure 2(b): A Transistor Phase shift oscillator

The frequency of oscillation is given by

 1 1
f = ·
2RC 6 + 4K

Where, K = RC/R. The condition for sustaining of oscillation is given by

29
hfe  4K + 23 +
K
3.3. Phase-Shift Oscillator with Op-Amp

Figure 2(c): A Phase Shift Oscillator Using Op-amp

1 0.065
f0 = =
2 6RC RC

At this frequency, the gain A must be at least 29.

That is,

RF
= 29 or R F = 29R1
R1

3.4.Disadvantage:

The disadvantage of RC phase-shift oscillator is that the frequency of oscillation cannot be

altered. In further we will study the oscillators in which frequency can be altered by changing
circuit parameters.
4.WEIN BRIDGE OSCILLATOR:

1 0.159
f0 = =
2RC RC
 Figure 3: Wein- Bridge Oscillator
At this frequency the gain required for sustained oscillation is given by
1
A= =3


R2
That is 1+ =3 ➔ R 2 = 2R1
R1
5.1.COLPITTS OSCILLATOR:

(a) (b)

Figure 4: MOSFET Colpitts Oscillator (a) The ac equivalent circuit,

(b) Small- Signal equivalent Circuit

1 (i)
0 =
 CC 
L 1 2 
 C1 + C2 

From the real part, the condition for oscillation is

20LC2 1
= gm + (ii)
R R
combining equations (iii) and (iv) yields,
 C2
= gmR (iii)
C1

where gmR is the magnitude of the gain, Equation (v) states that to initiate oscillations
spontaneously, it must have gmR > (C2/C1).
5.2. Colpitts Oscillator using BJT
Frequency of oscillation

1 C2
f = and gmR C 
 CC  C1
2 L  1 2 
 C1 + C2 

Figure 4(c): Colpitts Oscillator using BJT.

6.HARTLEY OSCILLATOR:

Figure 5: The ac equivalent BJT Hartley Oscillator

1
0 = and rπ ≫ 1/ ωC2.
(L 1 + L 2 ) C
7. CLAPP OSCILLATOR:
 Figure 6: Clapp Oscillators
Frequency of oscillation

1 1 1 1 1 
f0 =  + + 
2 L  C1 C2 C3 

If C3 is selected such that it is much smaller than C1 andC2 then

1 1 1
 +
C3 C1 C2

Thus,

1 1 1
f0 = 
2 L C3

f0 becomes independent of C1 and C2.

8.CRYSTAL OSCILLATORS

Figure 7: (a) Circuit Symbol, (b) Equivalent Circuit,

(c) Crystal reactance versus frequency

1
a series resonance at ωs s =
LCs
 1
and a parallel at ωp p =
 CC 
L s p 
C + C 
 s p 

1
0 = s
LC s

S.No Oscillator Range of Frequency

1. Phase shift 1Hz to 10MHz
2. Wein-bridge 1Hz to 1MHz
3. Colpitts 10kHz to 100MHz
4. Hartley 10kHz to 100MHz
5. Crystal For fixed frequency
6. Clapp 10kHz to 100MHz
7. Negative resistance >100mHz
Table 2
 CHAPTER 13 : 555 TIMER & WAVE GENERATORS

1. THE 555 TIMER CIRCUIT

Figure 1(a): Pin diagram of 555 Timer

Figure 1(b): Block diagram representation of the internal circuit of the 555-IC
timer.

2
VTH = VCC for comparator 1
3

1
And VTL = VCC for comparator 2
3

2. IMPLEMENTATION OF A MONOSTABLE MULTIVIBRATOR USING 555 TIMER

Figure 2(a): The 555 circuit connected as a monostable multi-vibrator.

Figure 2(b): Waveform of circuit 2(a)

T=RC ln (3)=1.1RC
3. IMPLEMENTATION OF ASTABLE MULTIVIBRATOR USING THE 555 TIMER

Figure 3(a): Astable Multivibrator 555 circuit.

Figure 3(b): waveform of circuit 3(a)

TC = 0.693 (R A + RB )C

TD=B ln(2) = 0.693 R BC

T = 0.693 (R A + 2R B )C
The frequency of oscillation,
1 1
f= =
T TC + TD
1 1.44
f = =
0.693(R A + 2RB )C (R A + 2RB )C
Duty cycle:

TC R + RB
Duty cycle=  100% = A  100%
T R A + 2RB
Duty cycle of the circuit is always greater than 50%.
****