



 ⇔






Jeff Shelton – 17 February 2015 3

 



Jeff Shelton – 17 February 2015 4
 Binary Octal Decimal Hexadecimal
• Base 2 • Base 8 • Base 10 • Base 16
0 0001 01 01 01
0 0010 02 02 02
0 0011 03 03 03
0 0100 04 04 04
0 0101 05 05 05
0 0110 06 06 06
0 0111 07 07 07
0 1000 10 08 08
0 1001 11 09 09
0 1010 12 10 0A
0 1011 13 11 0B
0 1100 14 12 0C
0 1101 15 13 0D
0 1110 16 14 0E
0 1111 17 15 0F
1 0000 20 16 10
Jeff Shelton – 17 February 2015 5
 000 001 010 011 100 101 110 111 Digital World

0 1 2 3 4 5 6 7 Analog World

Jeff Shelton – 17 February 2015 6

 101001102 = 0246 = 166 = A6

B10100110 B
0246 0
166
0xA6 0x 0-9 A-F a-f

Jeff Shelton – 17 February 2015 7

 MSB LSB

Jeff Shelton – 17 February 2015 8

 Storing the 4-byte
value 4A7139B216

Hex Hex
Address Value
 … …
0400 4A
0401 71
0402 39
0403 B2
… …

Hex Hex
Address Value

 … …
0400 B2
0401 39
0402 71
0403 4A

Jeff Shelton – 17 February 2015

… … 9
 Decimal
(101 100 ) 23 22 21 20
0 0 0 0 0 0
0 1 0 0 0 1
0 2 0 0 1 0
0 3 0 0 1 1
0 4 0 1 0 0
0 5 0 1 0 1
0 6 0 1 1 0
0 7 0 1 1 1

Jeff Shelton – 17 February 2015 10




0 to 9, need 4 bits.
0
0 1 2 3 4 5 6
1 5 0 0 0 0 * * * * * *
6 0 0 0 1 * *
0 0 1 0 * * * * *
2 4 0 0 1 1 * * * * *


(0011 0110 0100)BCD

Jeff Shelton – 17 February 2015 11

Jeff Shelton – 17 February 2015 12
 









Jeff Shelton – 17 February 2015 13
 

0 → 2𝑛 − 1

Jeff Shelton – 17 February 2015 14

 

0 → 2𝑛 − 1


Voltage Digital Value Decimal Equivalent
-5 000 0
-3.57 001 1
-2.14 010 2
-0.71 011 3
+0.71 100 4
+2.14 101 5
+3.57 110 6
+5 111 7

Jeff Shelton – 17 February 2015 15

 


−(2 𝑛−1 )←0→ 2 𝑛−1 −1

Voltage(1) Voltage(2) Digital Value Decimal Equivalent
+3.75 +5 011 3
+2.50 +3.33 010 2
+1.25 +1.67 001 1
0 0 000 0
-1.25 -1.67 111 -1
-2.50 -3.33 110 -2
-3.75 -5 101 -3
-5 -- 100 -4
Jeff Shelton – 17 February 2015 16
 Binary Decimal
(22 21 20 )

0 1 1 3
0 1 0 2
 0 0 1 1
0 0 0 0
1 1 1 -1
 1 1 0 -2
1 0 1 -3
1 0 0 -4

Ex: Using 2’s complement representation, we

represent (-3)10 in four bits as:
24 − 3 = 16 − 3 = 13 = 1 1 0 1 2

Jeff Shelton – 17 February 2015

 

• 𝑀𝑆𝐵 = 0
• 𝑀𝑆𝐵 = 1
 𝑛−1 𝑛−1
−(2 −1) ← 0 → 2 −1
Voltage Digital Value Decimal Equivalent
+5 011 3
+3.33 010 2
+1.67 001 1
0 000 0
0 100 -0
-1.67 101 -1
-3.33 110 -2
-5 111 -3
Jeff Shelton – 17 February 2015 18
 



 1 0

3 bit Code 6 bit Code
101 111 101
011 000 011

Jeff Shelton – 17 February 2015 19



Jeff Shelton – 17 February 2015 20

Jeff Shelton – 17 February 2015 21
Jeff Shelton – 17 February 2015 22
Jeff Shelton – 17 February 2015 23
 0001
0011
Voltage

ADC 0101
0111
0101
Time ⋮

Jeff Shelton – 17 February 2015 24

 0 1

3.5
3
2.5
2
Voltage

1.5
1
0.5
0
0 2 4 6 8 10
Time

Jeff Shelton – 17 February 2015 25

 𝑉IN
Analog Voltage: 𝑉 𝑉ADCMAX
ADCmin

Digital Code:

code

Jeff Shelton – 17 February 2015 26

 𝑉IN
Analog Voltage: 𝑉 𝑉ADCMAX
ADCmin

Digital Code:

code

We assume this step size to be fixed, although

in sophisticated applications it may vary across
the signal range, or adapt to signal
characteristics.

𝑉ADCMAX − 𝑉ADCmin
𝑄=
2𝑛 − 1

Jeff Shelton – 17 February 2015 27

 𝑉OFFSET 𝑉IN
Analog Voltage: 𝑉 𝑉ADCMAX
ADCmin

Digital Code: -1 0 1
code

𝑉ADCMAX − 𝑉ADCmin
𝑄=
2𝑛 − 1

Jeff Shelton – 17 February 2015 28

 𝑉offset 𝑉IN
Analog Voltage: 𝑉ADCmin 𝑉ADCMAX

Positive Coding: 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2n–1

Pos. & Neg. Coding: −2 𝑛−1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 𝑛−1 − 1

code

𝑉IN − 𝑉offset 𝑉IN − 𝑉offset

code = round code = round
𝑄 𝑄

𝑉ADCMAX − 𝑉ADCmin
𝑄=
2𝑛 − 1

Jeff Shelton – 17 February 2015 29

 
 𝑉ADC,max = 1.5 V
 𝑉ADC,min = -2 V
 𝑉𝐼𝑁 = 1.2 V
 𝑉𝐼𝑁
𝑉ADC,max − 𝑉ADC,min 1.5 V − −2 V 3.5 V
𝑄= = = = 0.5 V
2𝑛 − 1 23 − 1 7

𝑉𝐼𝑁 − 𝑉ADC,min 1.2 V − −2 V

Code = Round = Round
𝑄 0.5 V
3.2 V
= Round = 6 = 1102
0.5 V

Jeff Shelton – 17 February 2015 30

 𝑉offset
Analog Voltage: 𝑉IN
𝑉ADCmin 𝑉ADCMAX

Positive Coding: 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2n–1

Pos. & Neg. Coding: −2 𝑛−1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 𝑛−1 − 1

code

𝑉IN = code × 𝑄 + 𝑉offset

Jeff Shelton – 17 February 2015

 𝑉IN
Analog Voltage: 𝑉ADCmin 𝑉ADCMAX

Positive Coding: 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2n–1

Pos. & Neg. Coding: −2 𝑛−1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 𝑛−1 − 1

code

𝑄 𝑄
Any 𝑉𝐼𝑁 ∈ 𝑉𝐼𝑁 − , 𝑉𝐼𝑁 + will be coded to 𝑉𝐼𝑁
2 2

Maximum Quantization Error = ±𝑄/2

Jeff Shelton – 17 February 2015

 
 𝑉ADC,max = 5.25 V
 𝑉ADC,min = 0 V
 code = 2
 𝑉𝐼𝑁
𝑉ADC,max − 𝑉ADC,min 5.25 V − 0 V 5.25 V
𝑄= = = = 0.75 V
2𝑛 − 1 23 − 1 7
𝑄 0.75 𝑉
𝑉IN = code × 𝑄 + 𝑉offset ± = 2 × 0.75 𝑉 + 0 V ±
2 2
= 1.5 𝑉 ± 0.375 𝑉

Jeff Shelton – 17 February 2015 33

 𝑉IN
Analog Voltage: 𝑉ADCmin 𝑉ADCMAX

Positive Coding: 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2n–1

Pos. & Neg. Coding: −2 𝑛−1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 𝑛−1 − 1

code



True Span Nominal Span
𝑄= =
2𝑛 − 1 2𝑛


Jeff Shelton – 17 February 2015

 


•
•
 ⋅
 ≥ ⇒

Jeff Shelton – 17 February 2015 35

0 FS

0 1/8 1/4 3/8 1/2 5/8 3/4 7/8

Jeff Shelton – 17 February 2015 36

Jeff Shelton – 17 February 2015 37
  0 𝑉𝐴𝐷𝐶𝑀𝐴𝑋
 𝑉𝐴𝐷𝐶𝑚𝑖𝑛 𝑉𝐴𝐷𝐶𝑀𝐴𝑋

• 𝑉𝐼𝑁 𝑉𝐴𝐷𝐶𝑀𝐴𝑋 𝑉𝑂𝑈𝑇 𝑉𝐴𝐷𝐶𝑀𝐴𝑋
• 𝑉𝐼𝑁 𝑉𝐴𝐷𝐶𝑚𝑖𝑛 𝑉𝑂𝑈𝑇 𝑉𝐴𝐷𝐶𝑚𝑖𝑛

𝑉𝐴𝐷𝐶𝑀𝐴𝑋

𝑉𝐴𝐷𝐶𝑚𝑖𝑛

Jeff Shelton – 17 February 2015

 𝑡𝑎


V

ta Time

Start conversion End conversion

 ΔV
Δ𝑉 < 𝑄
Jeff Shelton – 17 February 2015
 

⇒ Use a “sample and hold” circuit.

3.5
3
2.5
Voltage

2
1.5
1
0.5
0
0 1 2 3 4 5 6 7 8 9

Time

Jeff Shelton – 17 February 2015

 Hold

Sample

Jeff Shelton – 17 February 2015

 •

Jeff Shelton – 17 February 2015 42

 1
Original
0
Signal
-1
0 1 2 3 4 5 6 7 8 9 10

1
20 Sample
0
/unit time
-1
0 1 2 3 4 5 6 7 8 9 10
1
5 Sample
/unit time 0

-1
0 1 2 3 4 5 6 7 8 9 10

0.9 Sample
0
/unit time
-1
0 1 2 3 4 5 6 7 8 9 10
Time (sec)




Jeff Shelton – 17 February 2015 43
  𝑓𝑆 > 2 𝑓𝑀𝐴𝑋
 𝑓𝑠 /2

Why analog?

Input Low-pass Computer

Amplifier ADC
Signal Filter

Jeff Shelton – 17 February 2015 44

 Maxim's 8th-order, low-pass, elliptic,
switched-capacitor filters operate
from a single +3V or +5V supply

Jeff Shelton – 17 February 2015 45

 



Jeff Shelton – 17 February 2015 46