CC3301, CC3300

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CC330x SimpleLink™ Wi-Fi 6 and Bluetooth® Low Energy companion IC

– Easy to design with 40-pin, 5-mm x 5-mm quad
1 Features flat noleaded (QFN) package, 0.4-mm pitch
Key Features
2 Applications
• Wi-Fi 6 (802.11ax)
• Grid Infrastructure
• Bluetooth® low energy 5.4 in CC33x1 devices
• Companion IC to any processor or MCU host – Electricity Meter
capable of running a TCP/IP stack – String Inverter
• Integrated 2.4 GHz PA for complete wireless – Micro Inverter
solution with up to +20.5 dBm output power. – Energy Storage Power Conversion System
• Operating temperature: -40°C to +105°C (PCS)
• Application throughput up to 50 Mbps – EV Charging Infrastructure
• Building and Home Automation
Extended Features – HVAC Controller
• Wi-Fi 6 – HVAC Gateway
– 2.4 GHz, 20 MHz, single spatial stream – Thermostat
– MAC, baseband, and RF transceiver with – Building Security Gateway
support for IEEE 802.11 b/g/n/ax – Garage door system
– Target wake time (TWT), OFDMA, MU-MIMO – IP network camera/ Video doorbell
(Downlink), Basic Service Set Coloring, and – Wireless security camera
trigger frame for improved efficiency • Appliances
– Hardware-based encryption and decryption – Refrigerator & freezer
supporting WPA2 and WPA3 – Oven
– Excellent interoperability – Washer & dryer
– Support for 4 bit SDIO or SPI host interfaces – Residential water heater & heating system
– Air purifier & humidifier
• Bluetooth Low Energy 5.4 – Coffee machine
– LE Coded PHYs (Long Range), LE 2M PHY – Air conditioner indoor unit
(High Speed) and Advertising Extension – Vacuum robot
– Host controller interface (HCI) transport with – Robotic lawn mower
option for UART or shared SDIO • Medical
• Enhanced Security – Infusion pump
– Secured host interface – Electronic hospital bed & bed control
– Firmware authentication – Multiparameter patient monitor
– Anti-rollback protection – Blood pressure monitor
– CPAP machine
• Multirole support (for example, concurrent STA and – Telehealth systems
AP) to connect with Wi-Fi devices on different RF – Ultrasound scanner
channels (Wi-Fi networks) – Ultrasound smart probe
• Optional antenna diversity or selection – Electric toothbrush
• 3-wire or 1-wire PTA for external coexistence with • Retail Automation and Payment
additional 2.4-GHz radios (for example, Thread or • Printers
Zigbee)
• Power Management
– VMAIN, VIO, Vpp: 1.8 V
– VPA: 3.3 V
• Clock Sources
– 40-MHz XTAL fast clock
– Internal slow clock or external 32.768-kHz slow
clock
• Small Package Size

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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3 Description
The SimpleLink™ Wi-Fi CC33xx family of devices is where affordability meets reliability, enabling engineers
to connect more applications with confidence. CC33xx are single-chip Wi-Fi 6 and Bluetooth Low Energy 5.4
devices. The CC3300 and CC3301 are the first devices in this pin to pin compatible family.
• CC3300: A 2.4GHz Wi-Fi 6 companion IC.
• CC3301: A 2.4GHz Wi-Fi 6 and Bluetooth low energy 5.4 companion IC.
The CC330x offers Wi-Fi 6 and BLE while maintaining compatibility with Wi-Fi 4 (802.11 b/g/n) and Wi-Fi 5
(802.11ac). These CC330x are the 10th-generation connectivity combo chip from Texas Instruments. As such,
the CC330x is based upon proven technology. These devices are ideal for use in cost-sensitive embedded
applications with a Linux or RTOS host running TCP/IP, CC330x brings the efficiency of Wi-Fi 6 to embedded
device applications for the internet of things (IoT), with a small PCB footprint and highly optimized bill of
materials.
Device Information
PART NUMBER Wi-Fi 2.4-GHz SISO Bluetooth Low Energy
CC3300ENJARSBR ✔
CC3301ENJARSBR ✔ ✔

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4 System Diagram
Figure 4-1 shows a basic system diagram for the CC3301.

CC330x Wi-Fi and BLE Companion IC

Interfaces Wi-Fi & BLE Core

SDIO /SPI
DMA Crypto OTP

UART
Wi-Fi BLE
MAC / Modem MAC / Modem
Coexistence

2.4GHz Wi-Fi / BLE RF

Antenna Diversity

nReset 2.4GHz
System ANT
Power

Packet RAM Execution / Data RAM

Clock

Figure 4-1. CC3301 high-Level System Diagram

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Table of Contents
1 Features............................................................................1 6.11 Current Consumption - WLAN Use Cases..............12
2 Applications..................................................................... 1 6.12 Current Consumption - BLE Static Modes.............. 13
3 Description.......................................................................2 6.13 Current Consumption - Device States.................... 13
4 System Diagram.............................................................. 3 6.14 Timing and Switching Characteristics..................... 13
5 Terminal Configuration and Functions..........................5 6.15 Interface Timing Characteristics..............................15
5.1 Pin Diagram................................................................ 5 7 Applications, Implementation, and Layout................. 18
5.2 Pin Attributes...............................................................6 8 Device and Documentation Support............................19
6 Specifications.................................................................. 8 8.1 Third-Party Products Disclaimer............................... 19
6.1 Absolute Maximum Ratings........................................ 8 8.2 Device Nomenclature Boilerplate..............................19
6.2 ESD Ratings............................................................... 8 8.3 Tools and Software................................................... 20
6.3 Recommended Operating Conditions.........................8 8.4 Documentation Support............................................ 20
6.4 Electrical Characteristics.............................................9 8.5 Support Resources................................................... 21
6.5 Thermal Resistance Characteristics........................... 9 8.6 Trademarks............................................................... 21
6.6 WLAN Performance: 2.4-GHz Receiver 8.7 Electrostatic Discharge Caution................................21
Characteristics...............................................................9 8.8 Glossary....................................................................21
6.7 WLAN Performance: 2.4-GHz Transmitter Power.... 10 9 Revision History............................................................ 21
6.8 BLE Performance: Receiver Characteristics.............10 10 Mechanical, Packaging, and Orderable
6.9 BLE Performance - Transmitter Characteristics........11 Information.................................................................... 22
6.10 Current Consumption - WLAN Static Modes.......... 12

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5 Terminal Configuration and Functions

5.1 Pin Diagram
Figure 5-1 shows pin assignments for the 40-pin WQFN package.

30 HOST_IRQ_BLE
29 HOST_IRQ_WL
28 LOGGER

24 SDIO_D0
23 SDIO_D1
22 SDIO_D2
21 SDIO_D3
26 SWCLK
27 SWDIO

25 GND
DIG_LDO_OUT 31 20 GND
VDD_MAIN_IN 32 19 SDIO CLK
NRESET 33 18 SDIO CMD
SLOW_CLK_IN 34 17 VIO
VPP_IN 35 16 GND
FAST_CLK_REQ 36 15 ANT_SEL
NC 37 14 UART TX
NC 38 13 UART RX
PA_LDO_IN 39 12 UART CTS
PA_LDO_IN 40 11 UART RTS

COEX_REQ 10
1
2
3
4
5
6
7
8
9
VDDA_IN1
VDDA_IN2
HFXT_P
HFXT_M
COEX_GRANT
COEX_PRIORITY
RF_BG
GND
PA_LDO_OUT

Figure 5-1. CC3301 Pin Diagram

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5.2 Pin Attributes

Table 5-1. Pin Attributes
STATE
VOLTAGE SHUTDOW AFTER
PIN SIGNAL NAME TYPE DIR (I/O) DESCRIPTION
LEVEL N STATE POWER-
UP
1 PA_LDO_OUT Analog RF power amplifier LDO output

Bluetooth Low Energy and

2 RF_BG RF I/O
WLAN 2.4-GHz RF port

3 GND GND GND

4 VDDA_IN1 POW 1.8 V supply for analog domain

5 VDDA_IN2 POW 1.8 V supply for analog domain

6 HFXT_P Analog Sine XTAL_P

7 HFXT_M Analog XTAL_N

External coexistence interface -

8 COEX_GRANT2 Digital O VIO PD PD
grant

External coexistence interface -

9 COEX_PRIORITY2 Digital I VIO PU PU
priority

External coexistence interface -

10 COEX_REQ2 Digital I VIO PU PU
request

Device RTS signal - flow control

11 UART RTS Digital O VIO PU PU
for BLE HCI

Device CTS signal - flow control

12 UART CTS Digital I VIO PU PU
for BLE HCI

13 UART RX Digital I VIO PU PU UART RX for BLE HCI

14 UART TX Digital O VIO PU PU UART TX for BLE HCI

15 ANT_SEL2 Digital O VIO PD PD Antenna select control line

16 GND GND GND

17 VIO POW 1.8 V IO supply

18 SDIO CMD Digital I/O VIO HiZ HiZ SDIO command or SPI PICO

19 SDIO CLK Digital I VIO HiZ HiZ SDIO clock or SPI clock

20 GND GND GND

21 SDIO D3 Digital I/O VIO HiZ PU SDIO data D3 or SPI CS

22 SDIO D2 Digital I/O VIO HiZ HiZ SDIO data D2

23 SDIO D1 Digital I/O VIO HiZ HiZ SDIO data D1

24 SDIO D0 Digital I/O VIO HiZ HiZ SDIO data D0 or SPI POCI

25 GND GND GND

26 SWCLK Digital I VIO PD PD Serial wire debug clock

27 SWDIO Digital I/O VIO PU PU Serial wire debug I/O

28 LOGGER3 Digital O VIO PU PU Tracer (UART TX debug logger)

Interrupt request to host for

29 HOST_IRQ_WL3 Digital O VIO PD 0
WLAN

Interrupt request to host for BLE

30 HOST_IRQ_BLE3 Digital O VIO PD PD
(in shared SDIO mode)

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Table 5-1. Pin Attributes (continued)

STATE
VOLTAGE SHUTDOW AFTER
PIN SIGNAL NAME TYPE DIR (I/O) DESCRIPTION
LEVEL N STATE POWER-
UP
Digital LDO output to
31 DIG_LDO_OUT Analog O
decoupling capacitor

1.8 V supply input for SRAM

32 VDD_MAIN_IN POW
and digital

Reset line for enabling or

33 nRESET Digital I VIO PD PD
disabling device (active low)

34 SLOW_CLK_IN Digital I VIO PD PD 32.768-kHz RTC clock input

1.8 V OTP programming input

35 VPP_IN POW
supply

Fast clock request from the

36 FAST_CLK_REQ Digital O VIO PD PD
device

37 NC NC Connect to GND

38 NC NC Connect to GND

39 PA_LDO_IN POW 3.3 V supply for PA

40 PA_LDO_IN POW 3.3 V supply for PA

1. All digital I/O's (with the exception of SDIO signals) are Hi-Z when the device is in shutdown mode with
internal PU/PD according to the "shutdown state" column.
2. See software release notes for support level.
3. LOGGER and HOST_IRQ_WL pins are sensed by the device during boot, see CC33xx Hardware
Integration.

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6 Specifications
All specifications are given at the CC3301 pins. Typical values are measured with nominal device at 25°C.
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
PARAMETER PINS MIN MAX UNIT
VPA VDD PA Voltage 39,40 –0.5 4.2 V
Main supply voltage for analog and digital - VDD_MAIN_IN,
VMAIN 32, 4, 5 –0.5 2.1 V
VDDA_IN1, VDDA_IN2
VDD IO Voltage 17 –0.5 2.1 V
VIO Input Voltage to all digital pins –0.5 VIO + 0.5 V
HFXT_P Input Voltage 6 –0.5 2.1 V
VPP VPP OTP Voltage 35 –0.5 2.1 V
TA Operating Ambient Temperature –40 105 °C
Tstg Storage temperature –55 155 °C

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated
under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.

6.2 ESD Ratings

VALUE UNIT

Human body model (HBM), per RF pins ±1000

AEC Q100-002(1) Other pins ±2000
V(ESD) Electrostatic discharge V
Charged device model (CDM), per RF pins ±250
AEC Q100-011 Other pins ±500

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
PARAMETER PINS MIN TYP MAX UNIT
Main supply voltage digital and analog - VDD_MAIN_IN,
VMAIN 32,4,5 1.62 1.8 1.98
VDDA_IN1, VDDA_IN2
VPA DC supply rail for PA 39,40 3 3.3 3.6 V
VIO DC supply rail for input/output 17 1.62 1.8 1.98
VPP DC supply rail for OTP memory 35 1.62 1.8 1.98
TA Operating ambient temperature –40 85/105(1) °C
Maximum power dissipation 2 W

(1) The CC3300 and CC3301 devices may operate at temperatures of up to 105°C. This allows the device to be used reliably in
applications that may be exposed to higher ambient temperature over certain periods of the product’s life. At temperatures higher than
85°C, the WLAN/BLE performance may degrade.

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6.4 Electrical Characteristics

TEST
PARAMETER DESCRIPTION MIN TYP MAX UNIT
CONDITION
VIH High Level Input Voltage 0.65 x VIO VIO
VIL Low Level Input Voltage 0 0.35 x VIO
V
VOH High Level Output Voltage at 4mA VIO – 0.45 VIO
VOL Low Level Output Voltage at 4mA 0 0.45

6.5 Thermal Resistance Characteristics

THERMAL METRIC(1) DESCRIPTION UNIT
Junction-to-ambient thermal resistance (According to JEDEC
RθJA 30.5
EIA/JESD 51 document)
RθJC(top) Junction-to-case (top) thermal resistance 16.7
RθJB Junction-to-board thermal resistance 10 °C/W
ΨJT Junction-to-top characterization parameter 0.1
ΨJB Junction-to-board characterization parameter 10
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.7

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

6.6 WLAN Performance: 2.4-GHz Receiver Characteristics

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Operational Frequency Range 2412 2472 MHZ
1 Mbps DSSS -98
2 Mbps DSSS -95.3
11 Mbps CCK -90
6 Mbps OFDM -93.2
Sensitivity: 8% PER for 11b rates, 10%
54 Mbps OFDM -75.5 dBm
PER for 11g/n/ax rates
HT MCS0 MM 4K -93
HT MCS7 MM 4K -72.9
HE MCS0 4K -92.7
HE MCS7 4K -72.5
1 DSSS 0
Maximum input level: 8% PER for 11b
OFDM6, HT MCS0, HE MCS0 0 dBm
rates, 10% PER for 11g/n/ax rates
OFDM54, HT MCS7, HE MCS7 -9
1 Mbps DSSS 45
11 Mbps CCK 39
6 Mbps OFDM 20
54 Mbps OFDM 3
Adjacent Channel Rejection dB
HT MCS0 20
HT MCS7 3
HE MCS0 16
HE MCS7 -1
RSSI Accuracy -90 dBm to -30dBm -3 3 dB

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6.7 WLAN Performance: 2.4-GHz Transmitter Power

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Operational Frequency Range 2412 2472 MHz
1 Mbps DSSS 20.5
6 Mbps OFDM 20.2
54 Mbps OFDM 17.4
Maximum output power at VPA > 3.0 V HT MCS0 MM 20.2 dBm
HT MCS7 MM 17.4
HE MCS0 20.2
HE MCS7 17.3

6.8 BLE Performance: Receiver Characteristics

PARAMETER TEST CONDITION MIN TYP MAX UNIT
BLE 125Kbps (LE Coded) Receiver Characteristics
-102.2
Receiver sensitivity PER <30.2% dBm

0
Receiver saturation PER <30.2% dBm

Wanted signal at -79 dBm, modulated interferer in 10

Co-channel rejection(1) dB
channel
Wanted signal at -79 dBm, modulated interferer at 0/0
Selectivity, ±1 MHz(1) dB
±1 MHz.
Wanted signal at -79 dBm, modulated interferer at -37 / -30
Selectivity, ±2 MHz(1) dB
±2 MHz.
Wanted signal at -79 dBm, modulated interferer at -39 / -36
Selectivity, ±3 MHz(1) dB
±3 MHz.
Wanted signal at -79 dBm, modulated interferer at -45 / -41
Selectivity, ±4 MHz(1) dB
±4 MHz.
RSSI Accuracy Dynamic range of -90 to -20dBm -4 4 dB
BLE 500Kbps (LE Coded) Receiver Characteristics
Receiver sensitivity PER <30.2% -99.8 dBm
0
Receiver saturation PER <30.2% dBm

Wanted signal at -72 dBm, modulated interferer in 10

Co-channel rejection(1) dB
channel.
Wanted signal at -72 dBm, modulated interferer at 0/0
Selectivity, ±1 MHz(1) dB
±1 MHz.
Wanted signal at -72 dBm, modulated interferer at -35 / -25
Selectivity, ±2 MHz(1) dB
±2 MHz.
Wanted signal at -72 dBm, modulated interferer at -40 / -37
Selectivity, ±3 MHz(1) dB
±3 MHz.
Wanted signal at -72 dBm, modulated interferer at -45 / -40
Selectivity, ±4 MHz(1) dB
±4 MHz.
RSSI Accuracy Dynamic range of -90 to -20dBm -4 4 dB
BLE 1Mbps (LE 1M) Receiver Characteristics
Receiver sensitivity(2) PER <30.2%, 37-byte packets –99.4 dBm
Receiver sensitivity(2) PER <30.2%, 255 byte-packets –98.1 dBm
Receiver saturation PER <30.2% 0 dBm
Wanted signal at -67 dBm, modulated interferer in
Co-channel rejection(1) 10 dB
channel

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PARAMETER TEST CONDITION MIN TYP MAX UNIT

Wanted signal at -67 dBm, modulated interferer at
Selectivity, ±1 MHz(1) 0/0 dB
±1 MHz
Wanted signal at -67 dBm, modulated interferer at
Selectivity, ±2 MHz(1) -35 / -28 dB
±2 MHz.
Wanted signal at -67 dBm, modulated interferer at
Selectivity, ±3 MHz(1) -38 / -32 dB
±3 MHz
Wanted signal at -67 dBm, modulated interferer at
Selectivity, ±4 MHz(1) -45 / -40 dB
±4 MHz
Out-of-band blocking 30 MHz to 2000 MHz, Wanted signal at -67 dBm –23 dBm
2003 MHz to 2399 MHz, Wanted signal at -67
Out-of-band blocking –30 dBm
dBm
2484 MHz to 2997 MHz, Wanted signal at -67
Out-of-band blocking –30 dBm
dBm
Out-of-band blocking 3000 MHz to 6 GHz, Wanted signal at -67 dBm –21 dBm
Wanted signal at 2402 MHz, -64 dBm. Two
Intermodulation interferers at 2405 and 2408 MHz respectively, at –40 dBm
the given power level
RSSI accuracy Dynamic range of -90 to -20dBm -4 4 dB
BLE 2Mbps (LE 2M) Receiver Characteristics
Receiver sensitivity(3) PER <30.2% -95.2 dBm
Receiver saturation PER <30.2% 0 dBm
Wanted signal at -67 dBm, modulated interferer in
Co-channel rejection(1) 10 dB
channel
Wanted signal at -67 dBm, modulated interferer at
Selectivity, ±2 MHz(1) 0/0 dB
±2 MHz.
Wanted signal at -67 dBm, modulated interferer at
Selectivity, ±4 MHz(1) -35 / -28 dB
±4 MHz
Wanted signal at -67 dBm, modulated interferer at
Selectivity, ±6 MHz(1) -35 / -28 dB
±6 MHz
Alternate channel rejection, ±8 Wanted signal at -67 dBm, modulated interferer at
-37 / -32 dB
MHz(1) ±8 MHz
Out-of-band blocking 30 MHz to 2000 MHz, Wanted signal at -67 dBm –23 dBm
2003 MHz to 2399 MHz, Wanted signal at -67
Out-of-band blocking –30 dBm
dBm
2484 MHz to 2997 MHz, Wanted signal at -67
Out-of-band blocking –30 dBm
dBm
Out-of-band blocking 3000 MHz to 6 GHz, Wanted signal at -67 dBm –21 dBm
Wanted signal at 2402 MHz, -64 dBm. Two
Intermodulation interferers at 2405 and 2408 MHz respectively, at –44 dBm
the given power level
RSSI Accuracy Dynamic range of -90 to -20dBm -4 4 dB

(1) Numbers given as C/I dB

(2) BLE 1M PHY sensitivity on channels 17 and 39 may degrade by up to 2.5 dB
(3) BLE 2M PHY sensitivity on channel 17 may degrade by up to 1.5 dB

6.9 BLE Performance - Transmitter Characteristics

The CC330X devices support BLE TX setting 0,5,10, or 20 dBm
PARAMETER DESCRIPTION MIN TYP MAX UNIT
Output Power, highest
20 dBm
setting

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6.10 Current Consumption - WLAN Static Modes

All results are based on measurements taken using the RadioTool evaluation application (typ values are taken with nominal
devices at room temp).
PARAMETER TEST CONDITION SUPPLY TYP MAX UNIT
VMain 92
1 DSSS TX power = 20.5 dBm
VPA 250 290
VMain 105 170
6 OFDM TX power = 20.2 dBm
VPA 250 290
VMain 110
54 OFDM TX power = 17.4 dBm
VPA 180
105
VMain
HT MCS0 TX power = 20.2 dBm
Continuous TX(1) VPA 245
110
VMain mA
HT MCS7 TX power = 17.4 dBm
VPA 180
105
VMain
HE MCS0 TX power = 20.2 dBm
VPA 240
110
VMain
HE MCS7 TX power = 17.3 dBm
VPA 180
62
VMain
Continuous RX
VPA 0

(1) Peak current VPA can hit 340mA during device calibration.
Peak current VMAIN of 185mA including periperhals and internal cortex

6.11 Current Consumption - WLAN Use Cases

Nominal device at room temp
MODE DESCRIPTION MIN TYP MAX UNIT
System with 3.3V to Ext. DC/DC at 85% efficiency
637
WLAN beacon reception every DTIM=1 (~102ms)
DTIM=1
System with 1.8V 980
WLAN beacon reception every DTIM=1 (~102ms)
System with 3.3V to Ext. DC/DC at 85% efficiency
371
WLAN beacon reception every DTIM=1 (~102ms)
DTIM=3 µA
System with 1.8V 570
WLAN beacon reception every DTIM=1 (~102ms)
System with 3.3V to Ext. DC/DC at 85% efficiency
319
WLAN beacon reception every DTIM=1 (~102ms)
DTM=5
System with 1.8V 490
WLAN beacon reception every DTIM=1 (~102ms)

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6.12 Current Consumption - BLE Static Modes

PARAMETER TEST CONDITION SUPPLY TYP MAX UNIT
VMain 102
TX power = 0 dBm
VPA 35
VMain 102
TX, Max Duty Cycle TX power = 10 dBm
VPA 100
mA
VMain 105
TX power = 20 dBm
VPA 250
VMain 62
RX
VPA 0

6.13 Current Consumption - Device States

Nominal device at room temp
MODE DESCRIPTION SUPPLY TYP UNIT

External supplies are available, device VMain + VPP 10

Shutdown
held in reset (nReset is low) VPA 2
uA
VMain + VPP 330
Sleep Low power mode - RAM in retention
VPA 2

6.14 Timing and Switching Characteristics

6.14.1 Power Supply Sequencing
For proper operation of the CC330x device, perform the recommended power-up sequencing as follows:
1. All supplies (VDD_MAIN_IN, VDDA, VIO, VPA) must be available before nReset is released.
2. For an external slow clock, ensure that the clock is stable before nReset is deasserted (high).
3. The nReset pin should be held low for at least 10 us after stabilization of the external power supplies.
6.14.2 Clocking Specifications
The CC330x device uses two clocks for operation:
• A fast clock running at 40 MHz for WLAN/BLE functions
• A slow clock running at 32.768 kHz for low power modes
The slow clock can be generated internally or externally. The fast clock must be generated externally.
6.14.2.1 Slow Clock Generated Internally
In order to minimize external components, the slow clock can be generated by an internal oscillator. However,
this clock is less accurate and consumes more power than sourcing the slow clock externally. For this scenario
the Slow_CLK_IN pin should be left not connected.
6.14.2.2 Slow Clock Using an External Oscillator
For optimal power consumption, the slow clock can be generated externally by an oscillator or sourced from
elsewhere in the system. The external source must meet the requirements listed below. This clock should be fed
into the CC330x pin Slow_CLK_IN and should be stable before nReset is deasserted and device is enabled.

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6.14.2.2.1 External Slow Clock Requirements

PARAMETER Description MIN TYP MAX UNIT
Input slow clock frequency Square wave 32768 Hz
Frequency accuracy Inital + temperature + aging ±250 ppm
Input Duty cycle 30 50 70 %
10% to 90% (rise) and 90% to 10%
Tr/Tf Rise and fall time 100 ns
(fall) of digital signal level
VIL Input low level 0 0.35 x VIO V
VIH Input high level 0.65 x VIO 1.95 V
Input impedence 1 MΩ
Input capacitance 5 pF

6.14.2.3 Fast Clock Using an External Crystal (XTAL)

The CC330x device supports a crystal-based fast clock (XTAL). The crystal is fed directly between HFXT_P and
HFXT_M pins with suitable loading capacitors, and must meet the requirements below.
6.14.2.3.1 External Fast Clock XTAL Specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Supported frequencies 40 MHz
Frequency accuracy Initial + temperature + aging +/- 25 ppm
Load Capacitance, CL (1) 5 13 pF
Equivalent series
30 Ω
resistance, ESR
Drive level 100 uW

(1) Load capacitance, CL= [C1*C2] / [C1 + C2] + CP, where C1, C2 are the capacitors connected on HFXT_P and HFXT_M, respectively,
and CP is the parasitic capacitance (typically 1 to 2 pF). For example, for C1 = C2 = 6.2pF and CP = 2pF, then CL = 5pF.

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6.15 Interface Timing Characteristics

6.15.1 SDIO Timing Specifications
SDIO is the main host interface for WLAN, and it supports a maximum clock rate of 52 MHz. The CC330x device
also supports shared SDIO interface for both BLE and WLAN.
6.15.1.1 SDIO Timing Diagram - Default Speed

Figure 6-1. SDIO Default Input Timing

Figure 6-2. SDIO Default Output Timing

6.15.1.2 SDIO Timing Parameters - Default Speed

PARAMETER DESCRIPTION MIN MAX UNIT
fclock Clock frequency, CLK 26 MHz
tHigh High Period 10
tLow Low Period 10
tTLH Rise time, CLK 10
tTHL Fall time, CLK 10 ns
tISU Setup time, input valid before CLK ↑ 5
tIH Hold time, input valid after CLK ↑ 5
tODLY Delay time, CLK ↓ to output valid 2 14
CL Capacitive load on outputs 15 40 pF

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6.15.1.3 SDIO Timing Diagram - High Speed

Figure 6-3. SDIO HS Input Timing

Figure 6-4. SDIO HS Output Timing

6.15.1.4 SDIO Timing Parameters - High Speed

PARAMETER DESCRIPTION MIN MAX UNIT
fclock Clock frequency, CLK 52 MHz
tHigh High Period 7
tLow Low Period 7
tTLH Rise time, CLK 3
tTHL Fall time, CLK 3 ns
tISU Setup time, input valid before CLK ↑ 6
tIH Hold time, input valid after CLK ↑ 2
tODLY Delay time, CLK ↓ to output valid 2 14
CL Capacitive load on outputs 15 40 pF

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6.15.2 SPI Timing Specifications

SPI is another host interface for WLAN. The CC330x device also supports shared SPI interface for both BLE and
WLAN.
6.15.2.1 SPI Timing Diagram

Figure 6-5. SPI Timing

6.15.2.2 SPI Timing Parameters

PARAMETER DESCRIPTION MIN MAX UNIT
fclock Clock frequency, CLK 26 MHz
tHigh High Period 10
tLow Low Period 10
tTLH Rise time, CLK 3
tTHL Fall time, CLK 3
tCSsu CS Setup time, CS valid before CLK ↑ 3 ns
tISU PICO, input valid before CLK ↑ 3
tIH PICO Hold time, input valid after CLK ↑ 3
tDr, tDf - Active Delay time, CLK ↑/↓ to output valid 2 10
tDr, tDf - Sleep Delay time, CLK ↑/↓ to output valid 12
CL Capacitive load on outputs 15 40 pF

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6.15.3 UART 4-Wire Interface

UART is the main host interface for BLE, which supports host controller interface (HCI) transport layer.
6.15.3.1 UART Timing Parameters
PARAMETER CONDITION MIN TYP MAX UNIT
Baud rate 37.5 4364 kbps
Baud rate accuracy per byte Receive/Transmit -2.5 +1.5 %
Baud rate accuracy per bit Receive/Transmit -12.5 +12.5 %
CTS low to TX_DATA on 0 2 ms
CTS high to TX_DATA off Hardware flow control 1 Byte
CTS high pulse width 1 bit
RTS low to RX_DATA on 0 2 ms
RTS high to RX_DATA off Interupt set to 1/4 FIFO 16 Byte

7 Applications, Implementation, and Layout

Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.

Figure 7-1 shows the reference schematic for the CC3301 using an optimized bill of materials.
1V8

1V8 CC3301 TARGET

1V8
C1
0.1uF
C2 C3
0.1uF 0.1uF E1
GND
M830520
1V8 GND GND 50Ohm 50Ohm

1
5

3
6

2
i FL1 i C9
CC1 RF_BG 1 3
IN OUT
32 38 GND 2 C0G/NP0
VDD_MAIN_IN VSS GND L1 0201 L2
1V8 4 DNP DNP
C4 GND 10pF
4 GND GND
0.1uF VDDA_IN1
5 2 DEA162450BT-1295A1
VDDA_IN2 RF_BG
-40°C to +85°C
6
C5 17 HFXT_P HFXT_P 1.95dB GND GND
0.1uF VIO
GND 7 2400-2500MHz
HFXT_M HFXT_M
35 GND
VPP_IN
3V3 3
VSS
GND 39 15
PA_LDO_IN ANT_SEL ANT_SEL R1
40 HFXT_P
PA_LDO_IN HFXT_M
C6 8 GND 150
COEX_GRANT COEX_GRANT
1.0uF VDDPA_OUT 1 9
PA_LDO_OUT COEX_PRIORITY COEX_PRIORITY
C7 10
COEX_REQ COEX_REQ
1.0uF DIG_LDO_OUT 31 1 3
DIG_LDO_OUT
19 C10 C11
SDIO_CLK SDIO_CLK
GND 18 50V 50V
C8 SDIO_CMD SDIO_CMD
34 24 6.8pF 2 6.8pF
GND 1uF SLOW_CLK_IN Slow_Clock_In SDIO_D0
23
SDIO_D0 GND
4
SDIO_D1 SDIO_D1 GND
33 22
RESET Reset SDIO_D2 SDIO_D2
21 Y1
SDIO_D3 SDIO_D3
GND 28
LOGGER Logger
26
SWCLK SWCLK
27
SWDIO SWDIO
GND GND
36 30
FAST_CLK_REQ TESTP/FAST_CLK_REQ/IFORCE Host_IRQ_BLE IRQ_BLE
37 29
VSS Host_IRQ_WL IRQ_WL
13 41
UART_RX UART_RX EP
14 The slow clock can be generated internally. An external slow clock
UART_TX UART_TX
GND 12 16
UART_CTS UART_CTS VSS can be optionally used to save power.
11 20
UART_RTS UART_RTS VSS
25
VSS
CC3301NG0ARSBR

1V8
Y2
GND 4 3
+Vs Output SLOW_CLK_IN

1 2
Standby/Operation GND
LFSPXO073707REEL
GND

Figure 7-1. CC3301 Reference Schematic

1. The slow clock can be generated internally. An external slow clock can be optionally used to save power.
2. For more information on antenna selection and matching, please see the CC33xx Hardware Integration.

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8 Device and Documentation Support

TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
8.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
8.2 Device Nomenclature Boilerplate
Device development evolutionary flow:
X Experimental device that is not necessarily representative of the final device's electrical specifications and
may not use production assembly flow.
P Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical
specifications.
null Production version of the silicon die that is fully qualified.

Support tool development evolutionary flow:

TMDX Development-support product that has not yet completed Texas Instruments internal qualification testing.
TMDS Fully-qualified development-support product.

X and P devices and TMDX development-support tools are shipped against the following disclaimer:
Device development evolutionary flow:

TMX Experimental device that is not necessarily representative of the final device's electrical specifications and
may not use production assembly flow.
TMP Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical
specifications.
TMS Production version of the silicon die that is fully qualified.

Support tool development evolutionary flow:

TMDX Development-support product that has not yet completed Texas Instruments internal qualification testing.
TMDS Fully-qualified development-support product.

TMX and TMP devices and TMDX development-support tools are shipped against the following disclaimer:
"Developmental product is intended for internal evaluation purposes."
Production devices and TMDS development-support tools have been characterized fully, and the quality and
reliability of the device have been demonstrated fully. TI's standard warranty applies.
Predictions show that prototype devices (X or P) have a greater failure rate than the standard production
devices. Texas Instruments recommends that these devices not be used in any production system because their
expected end-use failure rate still is undefined. Only qualified production devices are to be used.

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8.3 Tools and Software

Design Kits and Evaluation Modules

CC330x Reference CC330x reference design CAD source files. TI recommends using this design as a
Design Files reference when creating the layout in order to achieve the RF performance listed in
this datasheet.

CC3301 BoosterPack The CC3301 BoosterPack™ plug-in module (BP-CC3301) is a test and development
plug-in module board that can be easily connected to TI LaunchPad™ development kits or processor
boards; thus enabling rapid software development.
CC3301 M.2 card plug-in The CC3301 M.2 card plug-in module (M2-CC3301) is a test and development board
module that can be easily connected to TI processor boards or other processor boards with
an M.2 Key E interface support; thus enabling rapid software development.

Software
SimpleLink Wi-Fi SimpleLink Wi-Fi Toolbox is a collection of tools to help development and testing of the
Toolbox CC33xx. The Wi-Fi toolbox package provides all the capabilities required to debug and
monitor WLAN/Bluetooth® Low Energy firmware with a host, perform RF validation tests,
run pretest for regulatory certification testing, and debug hardware and software platform
integration issues.

CC33xx device The CC33XX are single-chip Wi-Fi 6 and Bluetooth Low Energy 5.4 companion devices
drivers suitable for both Linux and RTOS based systems. CC33XX-SOFTWARE is a collection of
software development sources aimed to facilitate quick setup, out-of-box experience, and
accelerate development in Linux or RTOS environments.
8.4 Documentation Support
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Notifications to register and receive a weekly digest of any product information that has changed. For change
details, review the revision history included in any revised document.

Application Reports
CC33xx Production Texas Instruments™ provides many resources in order to assist users in quickly examining
Line Guide the functionality and performance of their devices. This document provides the necessary
information to guide the user in production line testing for CC33xx. The device's functions
can be checked using tools and software provided by Texas Instruments. Performance
testing is more involved as external equipment is required for thorough examination.
SimpleLink CC33xx This document describes the CC33xx security related features, which are made available
Security Features to vendors through an ecosystem that incorporates simple and concise APIs, tools, and
documentation

User's Guides
CC33xx WLAN This document provides information about CC33xx family of devices and Wi-Fi® features,
Features User's as well as TI proprietary enhancements. The document does not provide the complete
Guide application programming interface (API) set, but a high-level overview of the features.
CC33xx Hardware This document describes how to integrate the CC330x into any system and the hardware
Integration requirements for this device. Layout and schematic considerations are listed here as well,
which TI highly recommends following in order to achieve the device performance listed in
this datasheet.

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8.5 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
8.6 Trademarks
SimpleLink™ is a trademark of Ti.
TI E2E™ is a trademark of Texas Instruments.
Bluetooth® is a registered trademark of Bluetooth SIG, Inc..
All trademarks are the property of their respective owners.
8.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

8.8 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

9 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from October 5, 2023 to December 19, 2023 (from Revision C (October 2023) to
Revision D (December 2023)) Page
• Updated specifications data and test conditions to production values............................................................... 8
• Updated reference schematic...........................................................................................................................18

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10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGE OUTLINE
RSB0040B SCALE 3.000
WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

5.15
B A
4.85

PIN 1 INDEX AREA

5.15
4.85

0.8
0.7
C

SEATING PLANE

0.05 0.08 C
0.00
2X 3.6
SYMM (0.2) TYP
EXPOSED
THERMAL PAD 11 20

10 21

SYMM 41
2X 3.6 3.5 0.1

1 30
36X 0.4
0.25
40 31 40X
PIN 1 ID 0.15
0.5 0.1 C A B
40X
0.3 0.05 C
4219094/B 09/2023

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com

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EXAMPLE BOARD LAYOUT

RSB0040B WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

( 3.5)
SYMM
40 31 SEE SOLDER MASK
40X (0.6) DETAIL

40X (0.2) 1 30

36X (0.4)

(R0.05) TYP (0.75) TYP

41
SYMM (4.8)

( 0.2) TYP
VIA

10 21

11 20
(0.75) TYP
(4.8)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 20X
0.05 MIN
0.05 MAX ALL AROUND
ALL AROUND
METAL UNDER
METAL EDGE SOLDER MASK

EXPOSED METAL SOLDER MASK EXPOSED SOLDER MASK

OPENING METAL OPENING

NON SOLDER MASK

DEFINED SOLDER MASK DEFINED
(PREFERRED)

SOLDER MASK DETAILS

4219094/B 09/2023
NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

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EXAMPLE STENCIL DESIGN

RSB0040B WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

(0.375) TYP (0.75) TYP

40 31
40X (0.6)

40X (0.2) 1 30

36X (0.4)

(0.75) TYP

(R0.05) TYP
41 (0.375) TYP
SYMM (4.8)

METAL 16X ( 0.55)

TYP

10 21

11 20
SYMM

(4.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 MM THICK STENCIL
SCALE: 20X

EXPOSED PAD 41
40% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

4219094/B 09/2023

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.

www.ti.com

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 PACKAGE OPTION ADDENDUM

www.ti.com 17-Jan-2024

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

CC3300ENJARSBR ACTIVE WQFN RSB 40 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 105 CC3300 Samples
ENJA
CC3301ENJARSBR ACTIVE WQFN RSB 40 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 105 CC3301 Samples
ENJA

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 17-Jan-2024

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 18-Jan-2024

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CC3300ENJARSBR WQFN RSB 40 3000 330.0 12.4 5.3 5.3 1.1 8.0 12.0 Q2
CC3301ENJARSBR WQFN RSB 40 3000 330.0 12.4 5.3 5.3 1.1 8.0 12.0 Q2

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 18-Jan-2024

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
CC3300ENJARSBR WQFN RSB 40 3000 367.0 367.0 35.0
CC3301ENJARSBR WQFN RSB 40 3000 367.0 367.0 35.0

Pack Materials-Page 2
 PACKAGE OUTLINE
RSB0040B SCALE 3.000
WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

5.15
B A
4.85

PIN 1 INDEX AREA

5.15
4.85

0.8
0.7
C

SEATING PLANE
0.05 0.08 C
0.00

2X 3.6
SYMM (0.2) TYP
EXPOSED
THERMAL PAD 11 20

10 21

SYMM 41
2X 3.6 3.5 0.1

1 30
36X 0.4
0.25
40 31 40X
PIN 1 ID 0.15
0.1 C A B
0.5
40X 0.05
0.3
4219094/A 11/2018

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com
 EXAMPLE BOARD LAYOUT
RSB0040B WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

( 3.5)
SYMM
40 31 SEE SOLDER MASK
40X (0.6) DETAIL

40X (0.2) 1 30

36X (0.4)
(0.9) TYP

(R0.05) TYP (0.6) TYP

41
SYMM (4.8)

( 0.2) TYP
VIA

10 21

11 20
(0.6) TYP (0.9) TYP
(4.8)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 20X
0.05 MIN
0.05 MAX ALL AROUND
ALL AROUND
METAL UNDER
METAL EDGE SOLDER MASK

EXPOSED METAL SOLDER MASK EXPOSED SOLDER MASK

OPENING METAL OPENING

NON SOLDER MASK

DEFINED SOLDER MASK DEFINED
(PREFERRED)

SOLDER MASK DETAILS

4219094/A 11/2018
NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com
 EXAMPLE STENCIL DESIGN
RSB0040B WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

(1.2) TYP
40 31
40X (0.6)

40X (0.2) 1 30

36X (0.4)

(1.2) TYP
(R0.05) TYP
41
SYMM (4.8)

METAL
TYP

10 21

11 20
SYMM
9X (1)

(4.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 MM THICK STENCIL
SCALE: 20X

EXPOSED PAD 41
73% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

4219094/A 11/2018

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.

www.ti.com
 IMPORTANT NOTICE AND DISCLAIMER
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These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
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