Wa0000.
Wa0000.
[1],[2]
3 Ch 3: Data Representation 3.1, 3.2, 3.3 2 weeks
[1]
11.2 (up to pg. 388), 11.4, 11.6 (up to pg. 416)
7 Ch 11: Input Output Organization 2 weeks
11.2 (up to pg. 391), 11.4, 11.6 (up to pg. 418) [2]
References
[1] Computer System Architecture by M. Morris Mano, Third edition, 1993, Prentice Hall of India.
[2] Computer System Architecture by M. Morris Mano, Third edition, 1993, Pearson Education.
Practical
(Use Simulator – CPU Sim 3.6.9 or any higher version for the implementation)
Create a machine based on the following architecture:
Registers
IR DR AC AR PC I E
16 bits 16 bits 16 bits 12 bits 12 bits 1 bit 1 bit
HLT 7001