Opa 344
Opa 344
OPA2344
OPA
434
4 OPA4344
OPA
344
OPA
345 OPA345
OPA
342
®
OPA2345
OPA4345
www.ti.com SBOS107A – APRIL 2000 – REVISED AUGUST 2008
FEATURES DESCRIPTION
● RAIL-TO-RAIL INPUT The OPA344 and OPA345 series rail-to-rail CMOS
● RAIL-TO-RAIL OUTPUT (within 1mV) operational amplifiers are designed for precision, low-power,
● LOW QUIESCENT CURRENT: 150µA typ miniature applications. The OPA344 is unity gain stable,
while the OPA345 is optimized for gains greater than or equal
● MicroSIZE PACKAGES to five, and has a gain-bandwidth product of 3MHz.
SOT23-5
The OPA344 and OPA345 are optimized to operate on a
MSOP-8 single supply from 2.5V and up to 5.5V with an input
TSSOP-14 common-mode voltage range that extends 300mV
● GAIN-BANDWIDTH beyond the supplies. Quiescent current is only
OPA344: 1MHz, G ≥ 1 250µA (max).
OPA345: 3MHz, G ≥ 5 Rail-to-rail input and output make them ideal for driving
sampling analog-to-digital converters. They are also well suited
● SLEW RATE for general purpose and audio applications and providing I/V
OPA344: 0.8V/µs conversion at the output of D/A converters. Single, dual and
OPA345: 2V/µs quad versions have identical specs for design flexibility.
● THD + NOISE: 0.006% A variety of packages are available. All are specified for
operation from –40ºC to 85ºC. A SPICE macromodel for
design analysis is available for download from www.ti.com.
APPLICATIONS
● PCMCIA CARDS OPA344, OPA345
● DATA ACQUISITION
● PROCESS CONTROL Out 1 5 V+
● AUDIO PROCESSING V– 2
● COMMUNICATIONS +In 3 4 –In
OPA4344, OPA4345
● ACTIVE FILTERS
Out A 1 14 Out D
● TEST EQUIPMENT SOT23-5
–In A 2 13 –In D
OPA2344, OPA2345 A D
OPA344, OPA345
+In A 3 12 +In D
Out A 1 8 V+ NC 1 8 NC +V 4 11 –V
SO-8, MSOP-8, 8-Pin DIP (OPA2344 Only) SO-8, 8-Pin DIP (OPA344 Only) TSSOP-14, SO-14, 14-PIn DIP (OPA4344 Only)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2000-2008, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
SPECIFICATIONS: VS = 2.7V to 5.5V
At TA = +25°C, RL = 10kΩ connected to VS /2 and VOUT = VS /2, unless otherwise noted.
Boldface limits apply over the temperature range, TA = –40°C to +85°C.
OPA344NA, UA, PA
OPA2344EA, UA, PA
OPA4344EA, UA, PA
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage VOS VS = +5.5V, VCM = VS/2 ±0.2 ±1 mV
Over Temperature ±0.8 ±1.2 mV
vs Temperature dVOS/dT ±3 µV/°C
vs Power Supply PSRR VS = 2.7V to 5.5V, VCM < (V+) -1.8V 30 200 µV/V
Over Temperature VS = 2.7V to 5.5V, VCM < (V+) -1.8V 250 µV/V
Channel Separation, dc 0.2 µV/V
f = 1kHz 130 dB
INPUT BIAS CURRENT
Input Bias Current IB ±0.2 ±10 pA
Over Temperature See Typical Curve pA
Input Offset Current IOS ±0.2 ±10 pA
NOISE
Input Voltage Noise f = 0.1 to 50kHz 8 µVrms
Input Voltage Noise Density en f = 10kHz 30 nV/√Hz
Current Noise Density in f = 10kHz 0.5 fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM –0.3 (V+) + 0.3 V
Common-Mode Rejection Ratio CMRR VS = +5.5V, –0.3V < VCM < (V+)-1.8 76 92 dB
Over Temperature VS = +5.5V, –0.3V < VCM < (V+)-1.8 74 dB
Common-Mode Rejection CMRR VS = +5.5V, –0.3V < VCM < 5.8V 70 84 dB
Over Temperature VS = +5.5V, –0.3V < VCM < 5.8V 68 dB
Common-Mode Rejection CMRR VS = +2.7V, –0.3V < VCM < 3V 66 80 dB
Over Temperature VS = +2.7V, –0.3V < VCM < 3V 64 dB
INPUT IMPEDANCE
Differential 1013 || 3 Ω || pF
Common-Mode 1013 || 6 Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL RL = 100kΩ, 10mV < VO < (V+) –10mV 104 122 dB
Over Temperature RL = 100kΩ, 10mV < VO < (V+) –10mV 100 dB
RL = 5kΩ, 400mV < VO < (V+) –400mV 96 120 dB
Over Temperature RL = 5kΩ, 400mV < VO < (V+) –400mV 90 dB
FREQUENCY RESPONSE CL = 100pF
Gain-Bandwidth Product GBW 1 MHz
Slew Rate SR 0.8 V/µs
Settling Time, 0.1% VS = 5.5V, 2V Step 5 µs
0.01% VS = 5.5V, 2V Step 8 µs
Overload Recovery Time VIN • G = VS 2.5 µs
Total Harmonic Distortion + Noise THD+N VS = 5.5V, VO = 3Vp-p, G = 1, f = 1kHz 0.006 %
OUTPUT
Voltage Output Swing from Rail(1) RL = 100kΩ, AOL ≥ 96dB 1 mV
RL = 100kΩ, AOL ≥ 104dB 3 10 mV
Over Temperature RL = 100kΩ, AOL ≥ 100dB 10 mV
RL = 5kΩ, AOL ≥ 96dB 40 400 mV
Over Temperature RL = 5kΩ, AOL ≥ 90dB 400 mV
Short-Circuit Current ISC ±15 mA
Capacitive Load Drive CLOAD See Typical Curve
POWER SUPPLY
Specified Voltage Range VS 2.7 5.5 V
Operating Voltage Range 2.5 to 5.5 V
Quiescent Current (per amplifier) IQ VS = 5.5V, IO = 0 150 250 µA
Over Temperature 300 µA
TEMPERATURE RANGE
Specified Range –40 85 °C
Operating Range –55 125 °C
Storage Range –65 150 °C
Thermal Resistance θJA
SOT23-5 Surface Mount 200 °C/W
MSOP-8 Surface Mount 150 °C/W
8-Pin DIP 100 °C/W
SO-8 Surface Mount 150 °C/W
TSSOP-14 Surface Mount 100 °C/W
14-Pin DIP 80 °C/W
SO-14 Surface Mount 100 °C/W
NOTE: (1) Output voltage swings are measured between the output and power-supply rails.
OPA345NA, UA
OPA2345EA, UA
OPA4345EA, UA
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage VOS VS = +5.5V, VCM = VS/2 ±0.2 ±1 mV
Over Temperature ±0.8 ±1.2 mV
vs Temperature dVOS/dT ±3 µV/°C
vs Power Supply PSRR VS = 2.7V to 5.5V, VCM < (V+) -1.8V 30 200 µV/V
Over Temperature VS = 2.7V to 5.5V, VCM < (V+) -1.8V 250 µV/V
Channel Separation, dc 0.2 µV/V
f = 1kHz 130 dB
INPUT BIAS CURRENT
Input Bias Current IB ±0.2 ±10 pA
Over Temperature See Typical Curve pA
Input Offset Current IOS ±0.2 ±10 pA
NOISE
Input Voltage Noise f = 0.1 to 50kHz 8 µVrms
Input Voltage Noise Density en f = 10kHz 30 nV/√Hz
Current Noise Density in f = 10kHz 0.5 fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM –0.3 (V+) + 0.3 V
Common-Mode Rejection Ratio CMRR VS = +5.5V, –0.3V < VCM < (V+)-1.8 76 92 dB
Over Temperature VS = +5.5V, –0.3V < VCM < (V+)-1.8 74 dB
Common-Mode Rejection Ratio CMRR VS = +5.5V, –0.3V < VCM < 5.8V 70 84 dB
Over Temperature VS = +5.5V, –0.3V < VCM < 5.8V 68 dB
Common-Mode Rejection Ratio CMRR VS = +2.7V, –0.3V < VCM < 3V 66 80 dB
Over Temperature VS = +2.7V, –0.3V < VCM < 3V 64 dB
INPUT IMPEDANCE
Differential 1013 || 3 Ω || pF
Common-Mode 1013 || 6 Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL RL = 100kΩ, 10mV < VO < (V+) –10mV 104 122 dB
Over Temperature RL = 100kΩ, 10mV < VO < (V+) –10mV 100 dB
RL = 5kΩ, 400mV < VO < (V+) –400mV 96 120 dB
Over Temperature RL = 5kΩ, 400mV < VO < (V+) –400mV 90 dB
FREQUENCY RESPONSE CL = 100pF
Gain-Bandwidth Product GBW 3 MHz
Slew Rate SR 2 V/µs
Settling Time, 0.1% G = 5, 2V Output Step 1.5 µs
0.01% G = 5, 2V Output Step 1.6 µs
Overload Recovery Time VIN • G = VS 2.5 µs
Total Harmonic Distortion + Noise THD+N VS = 5.5V, VO = 2.5Vp-p, G = 5, f = 1kHz 0.006 %
OUTPUT
Voltage Output Swing from Rail(1) RL = 100kΩ, AOL ≥ 96dB 1 mV
RL = 100kΩ, AOL ≥ 104dB 3 10 mV
Over Temperature RL = 100kΩ, AOL ≥ 100dB 10 mV
RL = 5kΩ, AOL ≥ 96dB 40 400 mV
Over Temperature RL = 5kΩ, AOL ≥ 90dB 400 mV
Short-Circuit Current ISC ±15 mA
Capacitive Load Drive CLOAD See Typical Curve
POWER SUPPLY
Specified Voltage Range VS 2.7 5.5 V
Operating Voltage Range 2.5 to 5.5 V
Quiescent Current (per amplifier) IQ VS = 5.5V, IO = 0 150 250 µA
Over Temperature 300 µA
TEMPERATURE RANGE
Specified Range –40 85 °C
Operating Range –55 125 °C
Storage Range –65 150 °C
Thermal Resistance θJA
SOT23-5 Surface Mount 200 °C/W
MSOP-8 Surface Mount 150 °C/W
SO-8 Surface Mount 150 °C/W
TSSOP-14 Surface Mount 100 °C/W
SO-14 Surface Mount 100 °C/W
NOTE: (1) Output voltage swings are measured between the output and power-supply rails.
PACKAGE/ORDERING INFORMATION(1)
SPECIFIED
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE DESIGNATOR RANGE MARKING NUMBER(2) MEDIA
OPA344NA SOT23-5 DBV –40°C to +85°C B44 OPA344NA/250 Tape and Reel
" " " " " OPA344NA /3K Tape and Reel
OPA344UA SO-8 D –40°C to +85°C OPA344UA OPA344UA Rails
" " " " " OPA344UA /2K5 Tape and Reel
OPA344PA 8-Pin Dip P –40° C to +85°C OPA344PA OPA344PA Rails
OPA2344EA MSOP-8 DGK –40°C to +85°C C44 OPA2344EA /250 Tape and Reel
" " " " " OPA2344EA /2K5 Tape and Reel
OPA2344UA SO-8 D –40°C to +85°C OPA2344UA OPA2344UA Rails
" " " " " OPA2344UA /2K5 Tape and Reel
OPA2344PA 8-Pin DIP P –40°C to +85°C OPA2344PA OPA2344PA Rails
OPA345NA SOT23-5 DBV –40°C to +85°C A45 OPA345NA/250 Tape and Reel
" " " " " OPA345NA/3K Tape and Reel
OPA345UA SO-8 D –40°C to +85°C OPA345UA OPA345UA Rails
" " " " " OPA345UA/2K5 Tape and Reel
OPA2345EA MSOP-8 DGK –40°C to +85°C B45 OPA2345EA/250 Tape and Reel
" " " " " OPA2345EA /2K5 Tape and Reel
OPA2345UA SO-8 D –40°C to +85°C OPA2345UA OPA2345UA Rails
" " " " " OPA2345UA /2K5 Tape and Reel
NOTES: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
(2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500
pieces of “OPA344UA/2K5” will get a single 2500-piece Tape and Reel.
100 30 100 30
OPA344 OPA345
Phase Phase
80 60 80 60
Gain (dB)
Gain (dB)
Phase (°)
Phase (°)
60 90 60 90
40 120 40 120
Gain Gain
20 150 20 150
0 180 0 180
0.1 1 10 100 1k 10k 100k 1M 10M 0.1 1 10 100 1k 10k 100k 1M 10M
Frequency (Hz) Frequency (Hz)
4
–PSRR
60
OPA344 OPA345
3
40 VS = +2.7V
2
20
1
10 0
10 100 1k 10k 100k 10k 100k 1M 10M
Frequency (Hz) Frequency (Hz)
100 VN
Dual and quad devices.
G = 1, all channels.
Quad measured channel 100 1
80 A to D or B to C—other
combinations yield improved
rejection.
60 10 0.1
100 1k 10k 100k 1M 1 10 100 1k 10k 100k 1M 10M
Frequency (Hz) Frequency (Hz)
80
PSRR
60
0.010
40
20
0.001 0
20 100 1k 10k 20k –75 –50 –25 0 25 50 75 100 125
Frequency (Hz) Temperature (°C)
175 35
1000 IQ
150 30
Input Bias Current (pA)
100 135 25
+ISC
100 20
–ISC
10 75 15
50 10
1
25 5
0.1 0 0
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)
SR–
2.5 4
V– V+
Input Bias Current (pA)
2.0 2
1.5 0
OPA344 SR–
1.0 –2
Input voltage ≤ –0.3V
SR+
can cause op amp output
0.5 –4
to lock up. See text.
0 –6
–75 –50 –25 0 25 50 75 100 125 –1 0 1 2 3 4 5 6
Temperature (°C) Common-Mode Voltage (V)
140 0 0
2 3 4 5 6 0 5 10 15 20
Supply Voltage (V) Output Current (mA)
OFFSET VOLTAGE
OPEN-LOOP GAIN vs OUTPUT VOLTAGE SWING PRODUCTION DISTRIBUTION
140
RL = 100kΩ
130
Open-Loop Gain (dB)
Population
RL = 5kΩ
120
110
100
120 100 80 60 40 20 0
–1000
–800
–600
–400
–200
200
400
600
800
1000
Output Voltage Swing from Rail (mV)
Offset Voltage (µV)
Population
–10
–8
–6
–4
–2
10
100
115
130
145
160
175
190
205
220
235
250
40 G = +5
35 50
G = +1 G = –5
30
G = +5 40
25
G = –1 30
20
G = –10, +10
15 20
10
G = –5 10
5
0 0
1 10 100 1k 10k 10 100 1k 10k
Load Capacitance (pF) Load Capacitance (pF)
5µs/div 5µs/div
OPA344 OPA345
20mV/div
20mV/div
5µs/div 5µs/div
V+
Reference
Current
VIN+ VIN–
VBIAS1 Class AB
Control VO
Circuitry
VBIAS2
V–
(Ground)
V+ V+ V+
VB VIN
VO VO VO
VIN VIN
VB
COMMON-MODE REJECTION between V+ and ground. For light resistive loads (> 50kΩ),
The CMRR for the OPA344 and OPA345 is specified in the output voltage can typically swing to within 1mV from
several ways so the best match for a given application may supply rail. With moderate resistive loads (2kΩ to 50kΩ),
be used. First, the CMRR of the device in the common-mode the output can swing to within a few tens of millivolts from
range below the transition region (VCM < (V+) – 1.8V) is the supply rails while maintaining high open-loop gain. See
given. This specification is the best indicator of the capabil- the typical performance curve “Output Voltage Swing vs
ity of the device when the application requires use of one of Output Current.”
the differential input pairs. Second, the CMRR at VS = 5.5V
over the entire common-mode range is specified. Third, the
CMRR at VS = 2.7V over the entire common-mode range is
provided. These last two values include the variations seen V+
through the transition region.
IOVERLOAD
10mA max
OPA344 VOUT
INPUT VOLTAGE BEYOND THE RAILS VIN
If the input voltage can go more than 0.3V below the 1kΩ
negative power supply rail (single-supply ground), special
precautions are required. If the input voltage goes suffi- IN5818
ciently negative, the op amp output may lock up in an
Schottky diode is required only
inoperative state. A Schottky diode clamp circuit will pre- if input voltage can go more
vent this—see Figure 4. The series resistor prevents exces- than 0.3V below ground.
sive current (greater than 10mA) in the Schottky diode and
in the internal ESD protection diode, if the input voltage can FIGURE 4. Input Current Protection for Voltages Exceed-
exceed the positive supply voltage. If the signal source is ing the Supply Voltage.
limited to less than 10mA, the input resistor is not required.
RS
Figure 7 shows the OPA2344 driving an ADS7822 in a
OPA344 VOUT speech bandpass filtered data acquisition system. This small,
VIN 10Ω to low-cost solution provides the necessary amplification and
RL CL
20Ω signal conditioning to interface directly with an electret
microphone. This circuit will operate with VS = +2.7V to
+5V with less than 500µA quiescent current.
+5V
0.1µF 0.1µF
8 V+ 1 VREF
7
DCLOCK
500Ω +In ADS7822 6 Serial
OPA344 DOUT
2 12-Bit A/D Interface
VIN 5
–In CS/SHDN
3300pF 3
GND 4
VIN = 0V to 5V for
0V to 5V output.
NOTE: A/D Input = 0 to VREF
RC network filters high frequency noise.
V+ = +2.7V to 5V
Passband 300Hz to 3kHz
R9
510kΩ
R1 R2 R4
1.5kΩ 1MΩ 20kΩ
C3
C1 33pF
1000pF R7 R8
51kΩ 150kΩ VREF 1 8 V+
1/2
OPA2344 7 DCLOCK
Electret R3 1/2 +IN ADS7822 6 DOUT Serial
Microphone(1) 1MΩ R6 OPA2344 2 12-Bit A/D Interface
C2 1000pF –IN 5 CS/SHDN
100kΩ
3
4
NOTE: (1) Electret microphone R5 G = 100
powered by R1. GND
20kΩ
www.ti.com 13-Jul-2022
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
OPA2344EA/250 ACTIVE VSSOP DGK 8 250 RoHS & Green Call TI | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 C44 Samples
OPA2344EA/2K5 ACTIVE VSSOP DGK 8 2500 RoHS & Green Call TI | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 C44 Samples
OPA2344UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
2344UA
OPA2344UA/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
2344UA
OPA2344UA/2K5G4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
2344UA
OPA2345EA/250 ACTIVE VSSOP DGK 8 250 RoHS & Green Call TI | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 B45 Samples
OPA2345UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
2345UA
OPA2345UA/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
2345UA
OPA344NA/250 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 B44 Samples
OPA344NA/250G4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 B44 Samples
OPA344NA/3K ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 B44 Samples
OPA344NA/3KG4 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 Samples
OPA344PA ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 OPA344PA Samples
OPA344UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
344UA
OPA344UA/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
344UA
OPA344UAG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
344UA
OPA345NA/250 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 A45 Samples
OPA345NA/3K ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 A45 Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 13-Jul-2022
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
OPA345UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
345UA
OPA4344EA/250 ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 OPA Samples
4344EA
OPA4344EA/2K5 ACTIVE TSSOP PW 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 OPA Samples
4344EA
OPA4344UA ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA4344UA Samples
OPA4344UA/2K5 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA4344UA Samples
OPA4344UAG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA4344UA Samples
OPA4345UA ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA4345UA Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 13-Jul-2022
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Sprocket Holes
Q1 Q2 Q1 Q2
Pocket Quadrants
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
Width (mm)
H
W
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TUBE
T - Tube
height L - Tube length
W - Tube
width
Pack Materials-Page 3
PACKAGE OUTLINE
DBV0005A SCALE 4.000
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
C
3.0
2.6 0.1 C
1.75 1.45
B A
1.45 0.90
PIN 1
INDEX AREA
1 5
2X 0.95
3.05
2.75
1.9 1.9
2
4
3
0.5
5X
0.3
0.15
0.2 C A B (1.1) TYP
0.00
0.25
GAGE PLANE 0.22
TYP
0.08
8
TYP 0.6
0 TYP SEATING PLANE
0.3
4214839/F 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
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EXAMPLE BOARD LAYOUT
DBV0005A SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3 4
SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK
4214839/F 06/2021
NOTES: (continued)
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EXAMPLE STENCIL DESIGN
DBV0005A SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
2 (1.9)
2X(0.95)
3 4
(R0.05) TYP
(2.6)
4214839/F 06/2021
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1
.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]
4X (0 -15 )
4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
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EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND
4214825/C 02/2019
NOTES: (continued)
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EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55] SYMM
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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