Interfacing of

Digital to Analog Converters (DAC)

 What is a DAC?
• A digital to analog converter (DAC) converts a digital
signal to an analog voltage or current output.

100101…
DAC
 DAC
Analog Output Signal

0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011
Digital Input Signal
 Types of DACs
• Many types of DACs available.
• Usually switches, resistors, and op-amps used
to implement conversion
• Two Types:
– Binary Weighted Resistor
– R-2R Ladder
 Binary Weighted Resistor
• Utilizes a summing op-amp circuit
• Weighted resistors are used to distinguish each bit from the
most significant to the least significant
• Transistors are used to switch between Vref and ground (bit
high or low).
Vref
• Vout= -IRf
V1 R
V2 2R I Rf
V3 4R
- Vout
+
Vn 2n-1R
MSB

LSB
 V1 V2 V3 Vn 
Vout   IRf   Rf      n -1 
 R 2R 4R 2 R
 Binary Weighted Resistor
Voltages V1 through Vn are either Vref
if corresponding bit is high or ground
if corresponding bit is low

V1 is most significant bit

Vn is least significant bit

MSB

LSB
 V1 V2 V3 Vn 
Vout   IRf   Rf      n -1 
 R 2R 4R 2 R
 Binary Weighted Resistor

If Rf=R/2
 V1 V2 V3 Vn 
Vout   IRf       n 
2 4 8 2 
For example, a 4-Bit converter yields

 1 1 1 1
Vout  Vref  b3  b2  b1  b0 
 2 4 8 16 
Where b3 corresponds to Bit-3, b2 to Bit-2, etc.
 Binary Weighted Resistor
• Advantages
– Simple Construction/Analysis
– Fast Conversion
• Disadvantages
– Requires large range of resistors (2000:1 for 12-bit DAC)
with necessary high precision for low resistors
– Requires low switch resistances in transistors
– Can be expensive. Therefore, usually limited to 8-bit
resolution.
 R-2R Ladder
Each bit corresponds
Vref to a switch:

If the bit is high,

the corresponding
switch is connected to
the inverting input of
the op-amp.

If the bit is low, the

corresponding switch
Bit: 0 0 0 0
Vout is connected to ground.
4-Bit Converter
 R-2R Ladder
V3
Vref V1 V2 V3
Ideal Op-amp

2R 2R

Req 
2 R 2 R 
R
2R  2R 
 R-2R Ladder

Vref V1 V2 V3 V2 V3

R R

 R  1
V3    2
V  V2
 RR 2
I
Likewise,
1
V2  V1
Vout 2
1
V1  Vref
2
Vout   IR
 R-2R Ladder
Results:
Vref V1 V2 V3 1 1 1
V3  Vref , V2  Vref , V1  Vref
8 4 2

 Vref Vref Vref Vref 

Vout   R b3  b2  b1  b0 
 2R 4R 8R 16 R 

Where b3 corresponds to bit 3,

b2 to bit 2, etc.
Vout
If bit n is set, bn=1

If bit n is clear, bn=0

 R-2R Ladder
For a 4-Bit R-2R Ladder

 1 1 1 1
Vout  Vref  b3  b2  b1  b0 
 2 4 8 16 
For general n-Bit R-2R Ladder or Binary Weighted Resister DAC

n
1
Vout  Vref  bn i i
i 1 2
 R-2R Ladder
• Advantages
– Only two resistor values (R and 2R)
– Does not require high precision resistors
• Disadvantage
– Lower conversion speed than binary weighted
DAC
 Specifications of DACs
• Resolution
• Speed
• Linearity
• Settling Time
• Reference Voltages
• Errors
 Resolution
• Smallest analog increment corresponding to 1
LSB change
• An N-bit resolution can resolve 2N distinct
analog levels
• Common DAC has a 8-16 bit resolution

Vref
Resolution  VLSB 
2N
where N  number of bits
Interfacing od DAC
Microprocessor Compatible D/A Converters

AD558 8 Bit D/A Converters

AD 7522 CMOS 10 bit D/A Converters
 Analog to Digital Converters
• An electronic integrated circuit which converts
a signal from analog (continuous) to digital
(discrete) form
• Provides a link between the analog world of
transducers and the digital world of signal
processing and data handling

t t
 ADC Process
Sampling & Hold

• Measuring analog signals

at uniform time intervals Continuous Signal
– Ideally twice as fast as
what we are sampling

• Digital system works with

discrete states
– Taking samples from each t
location

• Reflects sampled and

hold signal
– Digital approximation
 ADC Process
Sampling & Hold

• Measuring analog signals

at uniform time intervals
– Ideally twice as fast as
what we are sampling

• Digital system works with

discrete states
– Taking samples from each t
location

• Reflects sampled and

hold signal
– Digital approximation
 ADC Process
Sampling & Hold

• Measuring analog signals

at uniform time intervals
– Ideally twice as fast as
what we are sampling

• Digital system works with

discrete states
– Taking a sample from each t
location

• Reflects sampled and

hold signal
– Digital approximation
 ADC Process
Sampling & Hold

• Measuring analog signals

at uniform time intervals
– Ideally twice as fast as
what we are sampling

• Digital system works with

discrete states
– Taking samples from each t
location

• Reflects sampled and

hold signal
– Digital approximation
 ADC Process
Quantizing Encoding
• Separating the input signal • Assigning a unique
into a discrete states with K digital code to each
increments
state for input into the
• K=2N
microprocessor
– N is the number of bits of the
ADC
• Analog quantization size
– Q=(Vmax-Vmin)/2N
– Q is the Resolution
 ADC Process
Sampling & Hold

• Measuring analog signals

at uniform time intervals
– Ideally twice as fast as
what we are sampling

• Digital system works with

discrete states
– Taking samples from each t
location

• Reflects sampled and

hold signal
– Digital approximation
 ADC Process
Quantization & Coding

• Use original analog

signal
• Apply 3 bit coding

K=23 000
001
010
011
100
101
110
111
 ADC Process
Quantization & Coding

• Use original analog

signal
• Apply 3 bit coding
• Better representation of
input information with
additional bits K=23 000 K=16 0000 K=…
• MCS12 has max of 10 001
010
.
.
bits 011 .
100 1111
101
110
111
 ADC Process-Accuracy
The accuracy of an ADC can be improved by increasing:

t t
Sampling Rate, Ts Resolution, Q
• Based on number of steps • Improves accuracy in
required in the conversion measuring amplitude of
process analog signal
• Increases the maximum • Limited by the signal-to-
frequency that can be noise ratio (~6dB)
measured
 ADC Process-Accuracy
The accuracy of an ADC can be improved by increasing:

t t
Sampling Rate, Ts Resolution (bit depth), Q
• Based on number of steps • Improves accuracy in
required in the conversion measuring amplitude of
process analog signal
• Increases the maximum
frequency that can be
measured
 ADC-Error Possibilities
• Aliasing (sampling)
– Occurs when the input signal is changing much faster
than the sample rate
– Should follow the Nyquist Rule when sampling
• Use a sampling frequency at least twice as high as the
maximum frequency in the signal to avoid aliasing
• fsample>2*fsignal
• Quantization Error (resolution)
– Optimize resolution
– Dependent on ADC converter of microcontoller
 ADC Applications
• ADC are used virtually everywhere where an
analog signal has to be processed, stored, or
transported in digital form
– Microphones
– Strain Gages
– Thermocouple
– Digital Multimeters
 Types of ADC

• Successive Approximation A/D Converter

• Flash A/D Converter
• Dual Slope A/D Converter
• Delta-Sigma A/D Converter
 Successive Approximation ADC
 Elements
• DAC = Digital to Analog Converter
• EOC = End of Conversion
• SAR = Successive Approximation Register
• S/H = Sample and Hold Circuit
• Vin = Input Voltage
• Comparator
• Vref = Reference Voltage
 Successive Approximation ADC
 Algorithm
• Uses an n-bit DAC and original analog results
• Performs a binary comparison of VDAC and Vin
• MSB is initialized at 1 for DAC
• If Vin < VDAC (VREF / 2^n=1) then MSB is reset to 0
• If Vin > VDAC (VREF / 2^n) Successive Bits set to 1 otherwise 0
• Algorithm is repeated up to LSB
• At end DAC in = ADC out
• N-bit conversion requires N comparison cycles
 Successive Approximation ADC -
Example DAC bit/voltage
 5-bit ADC, Vin=0.6V, Vref=1V
Bit 4 3 2 1 0
 Cycle 1 => MSB=1
SAR = 1 0 0 0 0 Voltage .5 .25 .125 .0625 .03125
VDAC = Vref/2^1 = .5 Vin > VDAC SAR unchanged = 1 0 0 0 0
 Cycle 2
SAR = 1 1 0 0 0
VDAC = .5 +.25 = .75 Vin < VDAC SAR bit3 reset to 0 = 1 0 0 0 0
 Cycle 3
SAR = 1 0 1 0 0
VDAC = .5 + .125 = .625 Vin < VDAC SAR bit2 reset to 0 = 1 0 0 0 0
 Cycle 4
SAR = 1 0 0 1 0
VDAC = .5+.0625=.5625 Vin > VDAC SAR unchanged = 1 0 0 1 0
 Cycle 5
SAR = 1 0 0 1 1
VDAC = .5+.0625+.03125= .59375
Vin > VDAC SAR unchanged = 1 0 0 1 1
 Flash ADC
 Also known as parallel ADC
 Elements
• Encoder – Converts output
of comparators to binary
• Comparators
 Flash ADC
 Algorithm
– Vin value lies between two comparators
𝑉𝑟𝑒𝑓
– Resolution ∆𝑉 = ;
2𝑁
– N= Encoder Output bits
– Comparators => 2N-1

– Example: Vref 8V, Encoder 3-bit

8
• Resolution ∆𝑉 = = 1.0V
23
• Comparators 23-1=7
– 1 additional encoder bit -> 2 x # Comparators
 Flash ADC Example
Vin = 5.5V, Vref= 8V
0
Vin lies in between Vcomp5 & Vcomp6
0
Vcomp5 = Vref*5/8 = 5V
Vcomp6 = Vref*6/8 = 6V 1
1

Comparator 1 - 5 => output 1

1
Comparator 6 - 7 => output 0
1
Encoder Octal Input = sum(0011111) = 5 5.5V 1
Encoder Binary Output = 1 0 1
 Dual Slope A/D Converter
• Also known as an Integrating ADC

+
_

Control
Logic
Start Stop
Clock Counter
 Dual-Slope ADC – How It Works
• An unknown input voltage is applied to the input of the integrator and allowed to
ramp for a fixed time period (tu)
• Then, a known reference voltage of opposite polarity is applied to the integrator
and is allowed to ramp until the integrator output returns to zero (td)
• The input voltage is computed as a function of the reference voltage, the constant
run-up time period, and the measured run-down time period
• The run-down time measurement is usually made in units of the converter's clock,
so longer integration times allow for higher resolutions
• The speed of the converter can be improved by sacrificing resolution

td
Vin  Vref
tu
 Delta-Sigma A/D Converter

Analog Delta-Sigma Low-Pass Digital

Input Modulator Filter Output
 Delta-Sigma ADC – How It Works
• Input over sampled, goes to integrator
• Integration compared with ground
• Iteration drives integration of error to zero
• Output is a stream of serial bits
 Comparison of ADC’s

Speed Cost Resolution

Type
(relative) (relative) (bits)
Dual Slope Slow Med 12-16
Flash Very Fast High 4-12
Successive Medium –
Low 8-16
Approx Fast

Sigma – Delta Slow Low 12-24