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Systems and Methods of Clock Synchronization Between Devices On A Network

The document describes a system and method for synchronizing a master clock and a slave clock between devices on a network. The method involves transmitting packets between a master device and slave device, calculating packet delays and skews, providing clock corrections, and calculating offsets to synchronize the clocks.

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0% found this document useful (0 votes)
68 views46 pages

Systems and Methods of Clock Synchronization Between Devices On A Network

The document describes a system and method for synchronizing a master clock and a slave clock between devices on a network. The method involves transmitting packets between a master device and slave device, calculating packet delays and skews, providing clock corrections, and calculating offsets to synchronize the clocks.

Uploaded by

payam79b
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 46

THELATENDIMENTO DELTUTTO US 20180198599A1

( 19) United States


( 12) Patent Application Publication (10 ) Pub .No.: US 2018 /0198599 A1
Mihelic (43) Pub . Date : Jul. 12 , 2018
(54 ) SYSTEMS AND METHODS OF CLOCK H04L 12 /26 (2006 .01)
SYNCHRONIZATION BETWEEN DEVICES H04J 3 /06 (2006 .01)
ON A NETWORK G06F 1 / 12 (2006 .01 )
(52) U . S . CI.
(71) Applicant: Aviat U .S., Inc., Milpitas, CA (US) CPC .............. H04L 770033 (2013 .01 ); G06F 1/ 10
(2013.01) ; H04L 43/0852 (2013 .01) ; G06F
(72 ) Inventor: Janez Mihelic , Ljubljana (SI) 1/ 12 ( 2013 .01 ); H04J 3/0667 (2013 .01 )
(73) Assignee: Aviat U . S., Inc., Milpitas, CA (US)
(21) Appl. No.: 15 /913,847 (57) ABSTRACT
(22 ) Filed : Mar. 6 , 2018 An exemplary method of synchronizing a master clock and
a slave clock comprises transmitting a plurality of packets
Related U .S . Application Data between a master device and a slave device, calculating a
(63) Continuation of application No . 15 / 138 ,172 , filed on first skew between a first pair of the plurality of packets at
Apr. 25 , 2016 , now Pat. No. 9 , 912 ,465, which is a the slave device and a second skew between the first pair at
continuation of application No. 13 /555 , 064 , filed on the master device , calculating a ratio between the first skew
Jul. 20 , 2012 , now Pat. No. 9, 335 ,785 . and the second skew , providing a slave clock frequency
correction to the slave device , calculating a first packet trip
(60 ) Provisional application No . 61/509, 971 , filed on Jul. delay using a time that the master device initiates sending a
20 , 2011 . packet to the slave device , a time the master device receives
Publication Classification a response from the slave device, a corrected time the slave
device receives the packet, and a corrected time the slave
(51) Int. Cl. device initiates sending the response , calculating a first
H04L 7700 (2006 .01) offset based on the first packet trip delay, and providing the
G06F 1/ 10 ( 2006 .01) first offset to the slave device .

Communication Network
106
. ..
.
: . .. .
T E

Master Digital Device with Slave Digital Device with


Master Clock Servo Slave Clock Servo
102 104
Patent Application Publication Jul. 12, 2018 Sheet 1 of 31 US 2018 /0198599 A1

wDSielgvatichel SCelroavcoke 104


.
.

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esitata
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Patent Application Publication Jul. 12 , 2018 Sheet 2 of 31 US 2018 /0198599 A1

206

228

2
.
FIG

Waveguid 212 Waveguid 224

FRM2Uraensq0dutien2tcory 218 FRS204Uralenqduievntcoey 230


UIndoitr 208 OUuntdiotr 210 UIndoitr 220 UOuntdiotr 222
214 226

200
Patent Application Publication Jul. 12, 2018 Sheet 3 of 31 US 2018 /0198599 A1

MThoredsuled 306 MCToriemctieon odule


312

RFreaqutnecy Module 304 +

+
DTPaerclikaepyt 3Mo1du0le CMalsotcekr 316Module 3
.
FIG

202UFRMraenqsduitentcory 302Module
Comunicat MCRoraetc ieon odule
308
Measurmnt 3Mo1du4le
Patent Application Publication Jul. 12, 2018 Sheet 4 of 31 US 2018 /0198599 A1

Synchroizat 406Module

Measurmnt
Slave 404Module 4
.
FIG

204UFRSralenqduievntcoey 402Module CSloacvke 408Module


Comunicat
Patent Application Publication Jul. 12, 2018 Sheet 5 of 31 US 2018 /0198599 A1

Master Device 502 Slave Device 504


Freq m Freq s = R * Freqm

T11poen SyncPacket 506


wowowo
wa 121

Delay Request T31


Packet508
T41

T12 SyncPacket 510


Wood
T22

Delay Request T32


Packet512
T42L

FIG . 5
Patent Application Publication Jul. 12, 2018 Sheet 6 of 31 US 2018 /0198599 A1

Start
Start

Transmit plurality of packets between master device and slave device

Calculate skews between pairs of plurality of packets at slave device and skews
between pairs atmaster device
??? ??? ??? ??? ??? ??? ??? ??? ?????

Calculate ratios ( slave frequency rates and reverse slave frequency rates )
between skews of plurality of packets at slave device and skews between pairs 606
606
atmaster device
Compare slave frequency rate to related reverse slave frequency rate 608
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

If slave frequency rate approximates reverse slave frequency rate , provide 610
slave clock frequency correction to slave device e

Calculate packet trip delays for packets between master device and slave 612
device
Determine minimum packet trip delay 614

Calculate offset between master clock servo and slave clock servo based on 616
minimum packet trip delay
Provide offset to slave device 618

END

FIG . 6
Patent Application Publication Jul. 12, 2018 Sheet 7 of 31 US 2018 /0198599 A1

Start

702
Receive packets from master device
Measure time when packet received and 704
measure timewhen sending response
706
Provide measured times to master device

Receive slave clock frequency correction from master device 708

710
Correct slave clock servo based on slave clock frequency correction
Continue to receive packets ,measure time when packets received ,measure 712
time when sending responses, and provide times to master device
-

Receive offset from master device 714

716
Apply offset to slave clock servo

END

FIG . 7
Patent Application Publication Jul. 12, 2018 Sheet 8 of 31 US 2018 /0198599 A1

Master Slave CLOCK


CLOCK

M2S .
Delay sync

Delay kelza
_
M25 cz
.
+

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ay

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ay !
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FIG . 8
Patent Application Publication Jul. 12, 2018 Sheet 9 of 31 US 2018 /0198599 A1

DSelvaice 904 PPSOut


Traf ic Genrato 920

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Patent Application Publication Jul. 12, 2018 Sheet 10 of 31 US 2018 /0198599 A1

- - - -- -
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10 2

10 0
Patent Application Publication Jul. 12, 2018 Sheet 11 of 31 US 2018 /0198599 A1

Digital Device
1100 1114

Comm . Network
Interface
1108
Processor
1102

1/ 0 Interface
1110
Memory System
1104

Display interface
1112
Storage System
1106

FIG . 11
Patent Application Publication J . 12 ,2018 Sheet 12 of 31 US 2018/ 0198599 A1

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Patent Application Publication Jul. 12, 2018 Sheet 13 of 31 US 2018 /0198599 A1
Max delta mean path delay = 140
1. 8 sync msg/s , 1 switch between master
and slave
varOff = 9 .796e-016
stdDev - 31 . 3ns
minOff = -210ns
maxOff = 103ns
meanOff - 39 , 1ns
deltaNS1 = 313ns
measureNum - 10658
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FIG . 13
Patent Application Publication Jul. 12, 2018 Sheet 14 of 31 US 2018/0198599 A1
2. 8 sync msg /s , 1 switch between master and slave
varoff = 8 . 256e -016
stdDev = 28. 7ns
minoft = - 210ns
maxoft= 214 .5ns
?????ff ~- 37 .5S
deltaNS1= 424 .5ns
measureNum = 100000
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FIG . 14
Patent Application Publication Jul. 12, 2018 Sheet 15 of 31 US 2018/0198599 A1
3. 8 syncmsg / s, 1 switch between master and
slave, 100Mbit /s UDP forced traffic
varoff= 8 . 22e -016
stdDev = 28. 7ns
minOff = - 242ns
maxOff= 143ns
meanoff= - 38 . 3ns
deltaNS1+ 385ns
measureNum = 47480
1.5 * 10 PPS offset (t)
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FIG . 15
Patent Application Publication Jul. 12, 2018 Sheet 16 of 31 US 2018 /0198599 A1
8 sync msg /s , 1 switch between master and
slave, 10Mbit/ s broadcast UDP forced traffic
varOff= 1 . 123e -015
stdDev= 33.5ns
minOff= -227ns
maxOff - 181ns
meanoff= - 40 .9ns
deltaNS12408ns
measureNum = 12141
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FIG . 16
Patent Application Publication Jul. 12, 2018 Sheet 17 of 31 US 2018/0198599 A1

5. 8 syncmsg /s , 1 switch between master and


slave , 20Mbit /s broadcast UDP forced traffic
varOff= 9. 93e -015
std Dev = 99 .6ns
minOff= - 497ns
maxOff= 489ns
meanOff = - 38 . 8ns
deltaN $ 1 = 986
measureNum = 8214
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FIG . 17
Patent Application Publication Jul. 12, 2018 Sheet 18 of 31 US 2018/0198599 A1

6. 8 syncmsg /s, 2 switches between master and


slave
varOff= 2 . 23e -014
stdDev = 150ns
minoffa - 497ns
maxOff= 501ns
meanOff= - 33 . 2ns
deltaNS1= 998ns
measureNum = 3832
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offset [ns ] x 10

FIG . 18
Patent Application Publication Jul. 12, 2018 Sheet 19 of 31 US 2018/0198599 A1
Max delta mean path delay = 180ns
1. 8 sync msg / s , 2 switches between master and
slave
varOff= 4 .91e -015
stdDev = 70ns
minoff = - 570ns
maxOff - 516ns
meanOff = - 36ns
deltaN51 - 1086ns
measureNum = 9300
6 10 PPS offset (t)
- PTPoff
??????? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ??????

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ns
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1000 2000 3000 4000 5000 6000 7000 8000 9000 10000
time ( s )
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and
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offset [ s ]
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FIG . 19
Patent Application Publication Jul. 12, 2018 Sheet 20 of 31 US 2018/0198599 A1

2. & syncmsg /s , 2 switches between master and


slave , 20Mbit /s UDP forced traffic
varoff= 3 .84e-015
stdDev = 70ns
minoff = 18ns
maxoh = 320ns
meanOff = - 38 .60s
deltaNS1= 738ns
measureNum48329
0> DOS ofsati ) - + - + - + - + -+ - +- + - + -+ - +- + - + - + - + - + tutitutitutitu *** * *** * * * * * * * * * * * * * * * * * * * * * * * * * * * ** * * ** * * * * * * * * * ** * * * * * *

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FIG . 20
Patent Application Publication Jul. 12, 2018 Sheet 21 of 31 US 2018/0198599 A1

3. 8 syncmsg /s, 2 switches between master and


slave, 50Mbit /s UDP forced traffic
varoff= 1. 57e -014
stdDev - 125ns
minOff = - 998ns
maxOff = 1000ns
meanOff = - 44. 6ns
deltaN $ 1 = 1998ns
measureNum = 23387
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tedna 6 me
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FIG . 21
Patent Application Publication Jul. 12, 2018 Sheet 22 of 31 US 2018/0198599 A1
50 sync msg / s , 2 switches between master and
slave
varOff= 1.53604e-015
stdDev = 39. 2ns
minoff = - 259ns
maxOff= 129ns
meanOff= -44. 6ns
deltaNS1= 388ns
measureNum = 6916
01S-2 PPS utset {t
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FIG . 22
Patent Application Publication Jul. 12, 2018 Sheet 23 of 31 US 2018 /0198599 A1

5. 50 syncmsg /s, 2 switches between master and


slave , 20Mbit / s UDP forced traffic
varOff = 1 .48247e -015
stdDev = 38.5ns
min Off = - 263ns
maxOff = 107ns
meanOff = -42 .5ns
deltaNS1 = 370ns
measureNum = 6939
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Patent Application Publication Jul. 12 , 2018 Sheet 24 of 31 US 2018 /0198599 A1

6. 50 sync msg / s, 2 switches between master and


slave, 50Mbit/s UDP forced traffic
varor - 2 . 26e -014
stdDev - 150ns
minoff - - 1525ns
maxoff= 2495ns
meanOff -35.7ns
deltaNS1= 4020ns
measureNum = 9395
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Patent Application Publication Jul. 12, 2018 Sheet 25 of 31 US 2018/0198599 A1
7. 50 syncmsg /s, 2 switchesbetween master and
slave, 50Mbit/s UDP forced traffic (2nd )
varOff= 1 .55e-015
stdDev = 39 .3ns
minoff= - 274ns
maxOff= 229ns
meanOff= -43ns
deltaNS1 = 503ns
measureNum = 223236
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0 .6

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FIG . 25
Patent Application Publication Jul. 12, 2018 Sheet 26 of 31 US 2018/0198599 A1

8. 50 sync msg /s , 2 switches between master and


slave, 80Mbit / s UDP forced traffic
varOff= 1.47456e -015
stdDev= 3 .84000e-008
minoff = - 4 .910002-007
maxOffz4 . 900000-007
meanOff=- 4.27995e-008
deltaN $ 1 = 9 .810002 + 002
measureNum = 23670
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FIG . 26
Patent Application Publication Jul. 12, 2018 Sheet 27 of 31 US 2018/0198599 A1

9. 50 syncmsg / s, 2 switches between master and


slave , 80Mbit/ s UDP forced traffic (2nd )
varOff= 1.56e-015
stdDev= 39.5ns
minOff= -491ns
maxOff- 490ns
meanOff - -43 . 1ns
deltaNS1 = 981ns
measureNum83030
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FIG . 27
Patent Application Publication Jul. 12, 2018 Sheet 28 of 31 US 2018 /0198599 A1
10 . 50 sync msg / s, 3 switches between master and
slave , oMbit/ s UDP forced traffic
varOff= 4 .312e -015
stdDev= 65 .7ns
min Off= - 112ns
maxOff = 491ns
meanOff = 179ns
deltaNS1 - 603ns
measureNum = 14461
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Patent Application Publication Jul. 12, 2018 Sheet 29 of 31 US 2018/0198599 A1

11. 50 syncmsg / s, 1 switch between master and


slave, 20Mbit / s UDP forced traffic
varOff = 3 .97e -016
stdDev = 19 .9ns
minOff = - 41ns
maxOff= 314ns
meanOff= 168ns
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measureNum = 85568
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Patent Application Publication Jul. 12 , 2018 Sheet 30 of 31 US 2018 /0198599 A1

12 . 50 syncmsg / s, 1 switch between master and


slave , 50Mbit /s UDP forced traffic
varOff = 4 . 19e -016
stdDev = 20.5ns
minoff = -55ns
maxOff= 360ns
meanOff= 168ns
deltaNS1 = 415ns
measureNum = 86696
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Patent Application Publication Jul. 12 , 2018 Sheet 31 of 31 US 2018 /0198599 A1

13 . 50 syncmsg / s , 1 switch between master and


slave, 8oMbit /s UDP forced traffic
varOff = 4 . 16e -016
stdDev = 20 . 4ns
minOff = -69ns
maxOff= 332ns
meanOff = 168ns
deltaNS1 - 401ns
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US 2018 /0198599 A1 Jul. 12 , 2018

SYSTEMS AND METHODS OF CLOCK response, calculating a first offset between the master clock
SYNCHRONIZATION BETWEEN DEVICES and the slave clock based on the first packet trip delay, and
ON A NETWORK providing the first offset to the slave device .
CROSS -REFERENCE TO RELATED [0006 ] Themethod may further comprise iterating steps of
calculating an other skew between a subsequent pair of the
APPLICATIONS plurality of packets at the slave device and a subsequent
[0001] This application is a continuation of U .S . patent skew between the first pair at the master device and calcu
application Ser. No . 15 / 138 , 172 , filed Apr. 25 , 2016 and lating a ratio between the other skew and the subsequent
entitled “ Systems and Methods of Clock Synchronization skew . In some embodiments , the method may further com
Between Devices on a Network ,” now U . S . Pat. No. 9 , 912 , prise calculating a third skew between a second pair of the
465 , which is a continuation of U .S . patent application Ser. plurality of packets at the slave device and a fourth skew
No . 13 / 555, 064 , filed Jul. 20 , 2012 and entitled " Systems between the second pair at the master device , calculating a
and Methods of Clock Synchronization Between Devices on ratio between the third skew and the fourth skew . Providing
a Network ,” now U .S . Pat. No. 9,335,785 , which claims the slave clock frequency correction of the slave clock to the
priority from U .S . Provisional Patent Application Ser. No. slave device may comprise providing the slave clock fre
61/509, 971, filed Jul. 20 , 2011 and entitled “ IEEE 1588 quency correction of the slave clock to the slave device if the
Clock Servo Enhancement for Synchronization over Stan ratio between the first skew and the second skew approxi
dard Network Elements,” which are hereby incorporated by mates the ratio between the third skew and the fourth skew .
reference herein . The ratio between the first skew and the second skew may
approximate the ratio between the third skew and the fourth
FIELD OF THE INVENTION (S ) skew when the difference between the ratios is less than a
[0002 ] The present invention (s) relate to synchronization , predetermined threshold .
and more particularly, to systems and methods for network [iteratively
0007] Incalculating
various embodiments , themethod may comprise
subsequent packet trip delays utilizing
synchronization .
a subset of the plurality of packets . The method may
DESCRIPTION OF THE RELATED ART comprise determining a minimum value of the first and at
least some subsequent packet trip delays . The method may
[0003 ] Synchronized time information is important for further comprise obtaining a threshold relative to the mini
distributed systems. Typically, a Precision Time Protocol mum value of the first and subsequent packet trip delays ,
(PTP ) described in IEEE 1588 may be utilized to synchro comparing one or more subsequent packet trip delays to the
nize distributed clocks . The use of PTP has very low threshold relative to the minimum value of the first and
demands on local clocks and networks, however, in order to subsequent packet trip delays , calculating a second offset
implement PTP , the components on the network must be based on the comparison , and providing the second offset
configured (i.e ., include additional hardware and /or firm between the master clock and the slave clock based on the
ware ) to take advantage of PTP . first packet trip delay.
10004 ] When a network consists of IEEE 1588 aware
devices (i.e., boundary clocks or transparent clocks), very [0008 ] Calculating the first skew between the first pair of
high precision can be obtained with very simple clock servo the plurality of packets at the slave device and the second
algorithms to determine rate adjustments and time correc skew between the first pair at the master device and calcu
tions . Sophisticated processing is not necessary as only lating the ratio between the first skew and the second skew
simple averaging or filtering of the protocol measurements may comprise Rms = ( T22 - T21)/ ( T12 - T ) wherein Rms is
is required . When a network consists of devices that are not the slave frequency rate , T22 is a time that the slave device
IEEE 1588 aware, packet delay variation (PDV ) is typically receives a second packet of the first pair from the master
significant. A simple clock servo alone will not provide an device, T2 , is a time that the slave device receives a first
accurate level of synchronization . packet of the first pair from the master device , T12 is a time
the master device transmits the second packet of the second
SUMMARY OF EMBODIMENTS pair , and T11 is a time the master device transmits the first
packet of the second pair .
[0005 ] Various embodiments provide for systems and
methods for network synchronization . In some embodi [0009 ] Calculating the third skew between a second pair of
ments , a method of synchronizing a master clock and a slave the plurality of packets at the slave device and the fourth
clock comprises transmitting a plurality of packets between skew between the second pair at the master device and
a master device with the master clock and a slave device calculating a ratio between the third skew and the fourth
with the slave clock , calculating a first skew between a first skew may comprise Rsm = ( T32 - T31)/ ( T42 - T41) wherein
pair of the plurality of packets at the slave device and a Rsm is a reverse slave frequency rate, Tz , is a time that the
second skew between the first pair at the master device, slave device transmits a second packet of the third pair from
calculating a ratio between the first skew and the second the master device , T31 is a time that the slave device
skew , providing a slave clock frequency correction of the transmits a first packet of the third pair from the master
slave clock to the slave device to allow the slave device to device , T42 is a time the master device receives the second
correct a slave clock frequency, calculating a first packet trip packet of the second pair , and T2 , is a time themaster device
delay by using a time that the master device initiates sending receives the first packet of the second pair.
a packet of the plurality of packets to the slave device , a time [0010 ] Calculating a first packet trip delay by using the
the master device receives a response from the slave device, time that themaster device initiates sending the packet of the
a corrected time the slave device receives the packet, and a plurality of packets to the slave device , the time the master
corrected time the slave device initiates sending the device receives the response from the slave device, a cor
US 2018 /0198599 A1 Jul. 12 , 2018

rected time the slave device receives the packet, and the time that the master device initiates sending a packet of the
corrected time the slave device initiates sending the response plurality of packets to the slave device , a time the master
may comprise device receives a response from the slave device , a corrected
time the slave device receives the packet, and a corrected
time the slave device initiates sending the response , calcu
RTD - ( T4 - T?) - (T3 - 12) XR lating a first offset between the master clock and the slave
clock based on the first packet trip delay, and providing the
first offset to the slave device .
wherein T , is the time that the master device receives the [00141 Other features and aspects of various embodiments
response form the slave device, T is the time the master will become apparent from the following detailed descrip
device initiates sending the packet to the slave device, Tz is tion , taken in conjunction with the accompanying drawings ,
the time the slave device initiates sending the response , T , which illustrate, by way of example , the features of the
is the time the slave device receives the packet, and R is the various embodiments .
ratio between the first skew and the second skew .
[ 0011 ] Calculating the first offset between the master clock BRIEF DESCRIPTION OF THE DRAWINGS
and the slave clock based on the first packet trip delay may [0015 ] FIG . 1 is an exemplary environment including a
comprise offset = T2 - 1 , - RTD wherein T , is the time the master digital device with master clock servo and a slave
slave device receives the packet, T , is the time the master digital device with slave clock servo communicating over a
device initiates sending the packet to the slave device , and communication network in some embodiments
RTD is the first packet trip delay . Calculating the first offset [0016 ] FIG . 2 is an environment including two transceiver
between the master clock and the slave clock based on the units including a master radio frequency unit and a slave
first packet trip delay may comprise offset = TZ - T4+ mean radio frequency unit in some embodiments .
RTD wherein T , is the time the slave device initiates sending [00171 FIG . 3 is a block diagram of a master radio
the response, T . is the time that the master device receives frequency unit in some embodiments .
the response form the slave device, and RTD is the first [0018 ] FIG . 3 is a block diagram of a signal quality
packet trip delay. module for controlling both phase and gain of the signal in
[ 0012 ] An exemplary system for synchronizing a master some embodiments .
clock and a slave clock may comprise a communication 10019 ) FIG . 4 is a block diagram of a slave radio fre
module, a frequency rate module , a rate correction module ,
a packet trip delay module , and a time correction module . quency unit in some embodiments .
The communication module may be configured to transmit [0020 ] FIG . 5 is a graph depicting packets transmitted
a plurality of packets between a master device with the between a master device and a slave device in some embodi
master clock and a slave device with the slave clock . The ments
frequency rate module may be configured to calculate a first [0021] FIG . 6 is a flow chart of an exemplary method for
skew based on times between a first pair of the plurality of calculating an offset for the slave clock servo in some
packets received at the slave device and a second skew embodiments .
between the first pair at the master device and to calculate a [0022] FIG . 7 is a flow chart of an exemplary method for
ratio between the first skew and the second skew . The rate applying an offset for the slave clock servo in some embodi
correction module may be configured to provide a slave ments .
clock frequency correction of the slave clock to the slave [0023 ] FIG . 8 is a diagram of communication between a
device to allow the slave device to correct a slave clock master clock and a slave clock in some embodiments.
frequency . The packet trip delay module may be configured 0024 FIG . 9 is an exemplary environment that may be
to calculate a first packet trip delay by using a time that the used to simulate some embodiments described herein .
master device initiates sending a packet of the plurality of [0025 ] FIG . 10 depicts a master radio frequency unit in
packets to the slave device , a time the master device receives some embodiments.
a response from the slave device , a corrected time the slave [0026 ] FIG . 11 depicts an exemplary digital device
device receives the packet, and a corrected time the slave according to some embodiments.
device initiates sending the response . The time correction [0027] FIG . 12 is a table including test data used in
module may be configured to calculate a first offset between simulations related to test output FIGS. 13 -31 utilizing some
the master clock and the slave clock based on the first packet embodiments described herein .
trip delay and to provide the first offset to the slave device . [0028] FIGS. 13 -31 include output data and graphs related
[0013 ] An exemplary computer readable medium may to output of separate simulations utilizing some embodi
executable instructions. The instructions may be executable ments described herein .
by a processor to perform a method of synchronizing a
master clock and a slave clock . The method may comprise DETAILED DESCRIPTION OF VARIOUS
transmitting a plurality of packets between a master device EMBODIMENTS
with the master clock and a slave device with the slave
clock , calculating a first skew between a first pair of the [0029 ] Various embodiments discussed herein describe a
plurality of packets at the slave device and a second skew method of synchronization that provides accurate synchro
between the first pair at the master device , calculating a ratio nization in networks with IEEE 1588 unaware network
between the first skew and the second skew , providing a elements . In some embodiments , synchronization is
slave clock frequency correction of the slave clock to the achieved between end -to - end nodes ( e . g ., devices ) where
slave device to allow the slave device to correct a slave clock there is no IEEE 1588 support from the underlying network .
frequency, calculating a first packet trip delay by using a In some embodiments , a sending and receive device is IEEE
US 2018 /0198599 A1 Jul. 12 , 2018

1588 aware (i.e., a master and slave clock ) but other be the Internet, a LAN , WAN , or any other network . The
elements of the underlying network are not IEEE 1588 communication network 106 may be or comprise a micro
aware . wave network .
(0030 ] In a network with non -IEEE 1588 capable compo [0036 ] The master digital device 102 may perform all or
nents, packet delay between two or more network elements some of an exemplary synchronization method split into
may range from a minimum physical delay up to a sum of three stages : mean -PathDelay measurement, rate correction ,
the maximum delays through each communicating network and time correction . The stages may be performed in any
element . In practice , there is usually a minimum transmis order . Further , the stages are not necessarily performed in
sion delay for each device and therefore a minimum total serialbut all or some of any of the stages may be performed
packet delay from the master to the slave . In various in parallel ( e.g ., simultaneously or nearly simultaneously ).
embodiments , some systems and methods described herein 0037 ] One or more offset calculations ( e . g ., all offset
attempt to detect minimum delays, or “ lucky packets,” and calculations ) may rely on Mean PathDelay (MPD ) measure
use the results from these packets to make rate and time ments . One or more rate calculation ( e . g ., all rate calcula
corrections. tions ) may also rely on the MPD measurements .
[0031 ] FIG . 1 is an exemplary environment including a [0038 ] In general, the minimum MPD may be a relatively
master digital device with master clock servo 102 and a constant value . Reconfiguration of the network can cause
slave digital device with slave clock servo 104 communi step changes , but such reconfigurations may be infrequent.
cating over a communication network 106 in some embodi As a result, it is possible to detect a minimum MPD using
ments. The master digital device 102 and slave digital device long term tracking ofminimum round -trip delays (i.e ., full
104 may be both digital devices. A digital device is any Sync -Delay _ Req computation ). In some embodiments , the
device with a processor and memory . In some embodiments, implementation keeps a history of the last N MPD measure
the master digital device 102 and/ or the slave digital device ments and finds the minimum value over those measure
104 may comprise base stations, mobile units , smartphones , ments: minMPD (n )= min (MPD [ 1:n ]).
personal computers , media devices, smart televisions , table (0039 ] In various embodiments , the master digital device
computers, notebook computers, or the like. Digital devices 102 performs rate correction by measuring subsequent sync
are further described regarding FIG . 11. cycles , and determining a difference between a master
[0032 ] The master digital device 102 comprises a master measurement of the start of each message and a slave
clock . A master clock is any clock , reference clock , or measurement of the arrival of each message. A ratio of the
master clock servo that may be used for synchronization of slave frequency versus themastermay be used to correct for
the slave clock . The slave digital device 105 comprises a frequency differences.
slave clock . The slave clock is any clock , slave clock , or [0040] In some embodiments, if all rate measurements
slave clock servo that may be synchronized with the master were averaged , it might require hundreds or thousands of
clock . seconds for rate measurement to converge to a reasonable
10033] In various embodiments , the master digital device estimate to correct for frequency differences. Because of the
102 and the slave digital device 104 are IEEE 1588 aware .
long averaging time, frequency controlby the master digital
device 102 may be unable to adapt to short term frequency
One or more components of the communication network changes that might occur when using an inexpensive oscil
106 that relay or otherwise provides messages between the lator. In various embodiments , the master digital device 102
master digital device 102 and the slave digital device 104 may utilize MPD measurements to detect low -latency pack
may be IEEE 1588 unaware. In some embodiments , the ets. Subsequently, themaster digital device 102 may utilize
master digital device 102 and/ or the slave digital device 104 low -latency packets for detecting a rate of frequency offset.
are not IEEE 1588 aware . For example , if a packet meets the requirements for a short
[0034 ] In some embodiments, the master digital device minimum round trip delay (i. e ., a packet is sent from the
102 and the slave digital device 104 or two digital devices master digital device 102 to the slave digital device 104 and
of an LTE , WiMax , 4G , 3G , or other wireless network . For a response is provided from the slave digital device 104 to
example , the master digital device 102 and the slave digital the master digital device 102 in response to the packet ), the
device 104 may comprise radio frequency units imple rate may be measured by comparing the time from a
mented within a microwave network . In some embodiments , previous " quick ” packet . By using low - latency measure
the master digital device 102 may be a mobile station or ments, the convergence time for determining a frequency
subscriber station and the slave digital device 104 may be a offset to the master device may be reduced .
base station . In another example , the master digital device [0041] In qualifying “ quick ” packets , there may be a
102 may be a base station and the slave digital device 104 trade -off between quality and quantity . For example , if the
may be another base station or server ( e . g., access service qualification is too restrictive , not enough information may
network server or connectivity service network server ) of be obtained to track frequency changes . In another example,
the network . Those skilled in the art will appreciate that if the qualification is not sufficiently restrictive , the rate
systems and methods described herein may be utilized over calculations may include excessive variation .
any wired or wireless network including Ethernet and WiFi 10042 ] In various embodiments , time offset determination
networks. utilizes a sync message to determine an offset versus a
10035 ]. The communication network 106 may be wireless , master . Some level of averaging or filtering may be used to
wired , or a combination of wireless and wired . The com smooth out corrections and avoid over correcting for each
munication network 106 is any network configured to allow measurement. In some embodiments , a mechanism for time
communication between any number of digital devices correction may make corrections using only delays if they
and / or network elements (e.g., routers , switches, bridges , are determined to be actual or approximate minimum packet
servers, and /or hubs ). The communication network 106 may trip delays. Utilizing the actual or approximate minimum
US 2018 /0198599 A1 Jul. 12 , 2018

packet trip delays may assist in preventing invalid correc [0050 ] Similarly, slave radio frequency unit 204 may
tions to the time value . In some embodiments , synchroni comprise an IDU 220 in communication with a processor
zation with sub -microsecond accuracy may be achieved . and /or a digital device , an ODU 222 in communication with
[0043 ] The process is described in more detail herein . the IDU 220 over cable 230 , a waveguide 224 in commu
[ 0044 ] Although only two devices are depicted in FIG . 1 , nication with the ODU 222 , and an antenna 228 . The IDU
those skilled in the art will appreciate that any number of 220 may comprise a modulator/demodulator and control
digital devices may be synchronized to one or more digital circuitry for providing data from a digital device or a
devices. For example , the master digital device 102 may processor over line 226 to the antenna 228 via the ODU 222
and / or the waveguide 224 . Similarly , the IDU 220 may also
synchronize clocks of any number of slave digital devices . be configured to receive information from the antenna 228
Further, a slave digital device may be synchronized with any via the ODU 222 for providing to the digital device or
number of master digital devices 102 . processor via the line 226 . The ODU 222 may comprise an
100451. In some embodiments , the master digital device RF transmitter/receiver and be coupled with the antenna
102 and the slave digital device 104 are IEEE 1588 aware 228 . The waveguide 224 may or may not be a part of the
while one or more components of the communication net ODU 222 .
work 106 are not IEEE 1588 aware . [0051] The IDU 220 of the transceiver unit 204 may be
[0046 ] FIG . 2 is an environment 200 including two trans coupled to the ODU 222 utilizing a coaxial cable 230 .
ceiver units including a master radio frequency unit 202 and Although only one coaxial cable 230 is depicted in FIG . 2 ,
a slave radio frequency unit 204 in some embodiments . The any number of coaxial cables may provide signals between
master radio frequency unit 202 comprises a master clock the IDU 208 and the ODU 210 . Further, those skilled in the
and the slave radio frequency unit 204 comprises a slave art will appreciate that any number and / or type of cables
clock . In some embodiments , one or both of the master radio may be configured to receive and transmit signals between
frequency unit 202 and the slave radio frequency unit 204 the IDU 208 and the ODU 210 .
are IEEE 1588 aware. [0052] Those skilled in the art will appreciate that the
[0047] The master radio frequency unit 202 and the slave transceiver unit 204 may perform in a manner similar to the
radio frequency unit 204 are split mount radios. A split transceiver 202 . In various embodiments , the two trans
mount radio has a part of the electronics mounted outdoors ceiver units 202 and 204 may be in communication with
with an antenna and part indoors . The outdoor unit (ODU ) each other over a wireless communication tower 206 . Those
may be the RF transmitter/receiver. The indoor unit ( IDU ) skilled in the art will appreciate that the transceiver units 202
contains the modulator/demodulator, multiplexer , control, and 204 , individually or together, may communicate with
and traffic interface elements . The IDU and ODU may be any digital device or receiver.
coupled using a cable . By comparison , an all-indoor radio [0053 ] The wireless communication tower 206 ( e .g ., cell
has all radio equipment installed inside and is connected to tower or other microwave radio device ) may be any device
its antenna using a waveguide or coax feeder. A split-mount configured to receive and /or transmit wireless information .
radio may be a point-to -point radio installation for licensed [0054] Although the master radio frequency unit 202 and
6 to 38 + GHz frequency bands with the ODU direct the slave radio frequency unit 204 are depicted in FIG . 2 as
mounted to the rear of the antenna to provide an integral split mount devices , one or both units may not be splitmount
antenna feed . By having the ODU mounted with the devices. Further, although only a single wireless communi
antenna , split -mountmay eliminate or reduce feeder losses , cation tower 206 is depicted in FIG . 2 , the two units 202 and
minimize or reduce rack occupancy , and /or lower installed 204 may communicate over any number of network ele
costs compared to indoor radios . ments including any number of wireless communication
[ 0048 ]. For example , master radio frequency unit 202 may towers , routers , servers , bridges, hubs, other digital devices ,
comprise an indoor unit (IDU ) 208 in communication with or the like.
a processor and /or a digital device, an outdoor unit (ODU ) [0055 ] FIG . 3 is a block diagram of a master radio
210 in communication with the IDU 208 over cables 218 , a frequency unit 202 in some embodiments. The master radio
waveguide 212 in communication with the ODU 210 , and an frequency unit 202 comprises a communication module 302,
antenna 216 . The IDU 208 may comprise a modulator/ a frequency rate module 304 , a threshold module 306 , a rate
demodulator and control circuitry for providing data from a correction module 308 , a packet trip delay module 310 , a
digital device or a processor over line 214 to the antenna 216 time correction module 312 , a measurement module 314 ,
via the ODU 210 and /or the waveguide 212 . Similarly , the and a master clock module 316 . A module may be hardware,
IDU 208 may also be configured to receive information from software, or a combination of both hardware and software .
the antenna 216 via the ODU 210 for providing to the digital [0056] The communication module 302 provides commu
device or processor via the line 214 . The ODU 210 may nication between the master radio frequency unit 202 and
comprise an RF transmitter/receiver and be coupled with the the slave radio frequency unit 204 (e. g ., over a communi
antenna 216 . The waveguide 212 may or may not be a part cation network ). In one example , the communication mod
of the ODU 210 . ule 302 may provide Sync packets to and receive delay
[0049] The IDU 208 of the transceiver unit 202 may be request packets from the slave radio frequency unit 204 . In
coupled to the ODU 210 utilizing a coaxial cable 218 . some embodiments, themeasurement module 314 described
Although only one coaxial cable 218 is depicted in FIG . 2 , herein logs , tracks, or otherwise determines time when
any number of coaxial cables may provide signals between packets are initiated for sending by the communication
the IDU 208 and the ODU 210 . Further, those skilled in the module 302 and/ or when packets are received by the com
art will appreciate that any number and/or type of cables munication module 302.
may be configured to receive and transmit signals between [0057 ] The frequency rate module 304 determines a fre
the IDU 208 and the ODU 210 . quency rate based on time measurements of packets
US 2018 /0198599 A1 Jul. 12 , 2018

obtained by the master radio frequency unit 202 . The threshold module 306 or the packet trip delay module 310
frequency rate may be based on time(s) that one or more may determine a minimum of the number of packet trip
packets are received by the communication module 302 delays . The threshold module 306 may generate a threshold
and /or time( s ) that one or more packets sent by the com (e . g ., a delta mean packet delay ) representing an acceptable
munication module 302 . Further, the frequency rate module range relative to the minimum . For example , the threshold
304 may determine a frequency rate based on measurements module 306 may determine a distribution ( e . g ., a Gaussian
obtained from the slave radio frequency unit 204 . For distribution ) based on the number of packet trip delays and
example, the slave radio frequency unit 204 may determine set a threshold at a predetermined percentage relative to the
a time that a packet from the master radio frequency unit 202 minimum rate ( e.g ., bottom 5 % of the Gaussian distribu
is received and provide the determined time within a sub tion ). Those skilled in the art will appreciate that the
sequent packet (e .g., a delay request packet) sent back to the threshold module 306 may determine ( e. g ., statistically ) the
master radio frequency unit 202. The communication mod threshold in any number of ways . In some embodiments, the
ule 302 may obtain the time from the subsequent packet . The packet trip delay threshold may be configured by another
slave radio frequency unit 204 may also determine the digital device and /or the rate threshold may be programmed
frequency rate based on the time that the subsequent packet at installation .
is sent. [0063] The rate correction module 308 may determine a
[ 0058 ] For example, the frequency rate module 304 may rate correction to be provided to the slave radio frequency
determine a rate ( e. g., a forward rate ) by determining the unit 204 . In some embodiments , the rate correction module
difference ( e.g ., a first skew ) between times of receiving a 308 compares a forward rate to a reverse rate from the
first and receiving a second packet from the master radio frequency rate module 304 . The forward rate and the reverse
frequency unit 202 by the slave radio frequency unit 204 , rate may be associated with similar or same packets between
determining a difference ( e . g ., a second skew ) between times the master radio frequency unit 202 and the slave radio
of transmitting the first and second packet by the master frequency unit 204 . If the forward rate approximates the
radio frequency unit 202 , and comparing the two differences reverse rate , the rate correction module 308 may generate a
( e . g ., creating a ratio based on the first and second skew ). rate correction . The communication module 302 may pro
This process is further described herein . vide the rate correction to the slave radio frequency unit . In
[ 0059 ] In another example , the frequency rate module 304 some embodiments, a forward rate approximates a reverse
may determine a rate ( e.g ., a reverse rate ) by determining the rate if the differences between the two rates is within ( e. g.,
difference (e . g ., a first skew ) between times of transmitting below ) the rate threshold generated or obtained by the
a first and transmitting a second packet from the slave radio threshold module 306 . The slave radio frequency unit 204
frequency unit 204 , determining a difference ( e . g ., a second may apply the rate correction to a slave clock frequency .
skew ) between times of receiving the first and second packet [0064 ] The packet trip delay module 310 may determine a
by the master radio frequency unit 202 , and comparing the packet trip delay for one ormore packets between the master
two differences ( e . g ., creating a ratio based on the first and radio frequency unit 202 and the slave radio frequency unit
second skew ). 204 . For example , the packet trip delay module 310 may
[0060 ] The frequency rate module 304 may generate any determine a packet trip delay by determining the duration
number of frequency rates based on any number of packets between the master radio frequency unit 202 sending a
sent to and /or received from a digital device . packet and receiving a response , determining the duration
[0061] The threshold module 306 may calculate, receive , between the slave radio frequency unit 204 receiving the
store , and /or be configured to store rate thresholds and packet from the master radio frequency unit 202 and pro
packet trip delay thresholds . A rate threshold is a threshold viding the response ( adjusted for rate correction ), determin
that may be based on a minimum rate determined by the ing the difference between the two durations, and dividing
frequency ate module 304 based on a measurements asso the difference by two.
ciated with a plurality of packets . For example , the fre [0065 ] In some embodiments , the packet trip delay mod
quency rate module 304 may determine a large number of ule 310 determines a large number of packet trip delays
rates associated with packets between the master radio based on any number of packets and determines a minimum
frequency unit 202 and the slave radio frequency unit 204 . of the large number of packet trip delays. In some embodi
The threshold module 306 may determine a minimum of the ments , the packet trip delay module 310 averages or per
number of rates. Further, the threshold module 306 may forms other statistical assessments on the large number of
generate a threshold representing an acceptable range rela packet trip delays, one ormore of the large number of packet
tive to the minimum . For example, the threshold module 306 trip delays , those packet trip delays that are approximate to
may determine a distribution (e. g ., a Gaussian distribution ) the minimum packet trip delay, and /or the minimum packet
based on the number of ranges and set a threshold at a trip delay.
predetermined percentage relative to the minimum rate ( e . g ., 10066 ]. The time correction module 312 may determine a
bottom 5 % of the Gaussian distribution ). Those skilled in the time offset to be provided to the slave radio frequency unit
art will appreciate that the threshold module 306 may 204 . In some embodiments , the time correction module 312
determine (e .g., statistically ) the threshold in any number of may generate an offset by determining the difference
ways . In some embodiments, the rate threshold may be between a time a packet is received by the slave radio
configured by another digital device and / or the rate thresh frequency unit 204 from the master radio frequency unit
old may be programmed at installation . 202, a time the packet is provided from the master radio
[0062 ] In another example , the packet trip delay module frequency unit 202 to the slave radio frequency unit 204 , and
310 may determine a large number of packet trip delays the minimum packet trip delay . In some embodiments, the
associated with packets between the master radio frequency time correction module 312 generates an offset by deter
unit 202 and the slave radio frequency unit 204 . The mining the difference between a time a packet is transmitted
US 2018 /0198599 A1 Jul. 12 , 2018

by the slave radio frequency unit 204 to the master radio [0073 ] The slave measurement module 404 may measure
frequency unit 202 and a time the packet is received by the the time that packets are received and sent by the commu
master radio frequency unit 202 from the slave radio fre - nication module 402 based on a clock signal from the slave
quency unit 204 as well as adjusting the difference by the clock servo module 408 (e .g ., a slave clock ). In some
minimum packet trip delay (e.g ., adding the minimum embodiments , the slave measurement module 404 may
packet trip delay ) . Those skilled in the art will appreciate retrieve measurements from packets received from the mas
that the time correction module 312 may utilize a mean ter radio frequency unit 202. For example, the slave mea
packet trip delay rather than the minimum packet trip delay surementmodule 404 may obtain a timemeasurement from
in some embodiments. a Sync packet or any packet provided by the master radio
[0067 ] In various embodiments , the time correction mod frequency unit 202. The time measurement may represent
ule 312 may provide the offset to the slave radio frequency the time at which a packet ( e .g ., a delay request packet )
unit 204 via the communication module 302 . The slave radio provided by the slave radio frequency unit 204 was received
frequency unit 204 may apply the offset to the slave clock by the master radio frequency unit 202 . Further, the slave
( e . g ., the slave clock servo ). measurement module 404 may obtain a time measurement
of the time the master radio frequency unit 202 provided the
[0068 ] The measurement module 314 may measure the packet (e . g ., Sync packet) to the slave radio frequency unit
time that packets are received and sent by the communica 204 (e .g ., by examining the received packet for a time
tion module 302 based on a clock signal from the master stamp ). Those skilled in the art will appreciate that the slave
clock servo module 316 ( e . g ., a master reference clock ). In
some embodiments, the measurement module 314 may measurement module 404 may measure time and/ or obtain
retrievemeasurements from packets received from the slave timemeasurements in any number of ways .
radio frequency unit 204 . For example , the measurement 10074 ] The synchronization module 406 may correct the
module 314 may obtain a time measurement from a delay slave clock frequency and /or apply an offset to a clock
request or response packet provided by the slave radio associated with the slave clock module 408 . In some
frequency unit 204 . The time measurement may represent embodiments, the communication module 402 may receive
the time at which a packet ( e . g ., a Sync packet ) provided by a rate correction from the master radio frequency unit 202 .
the master radio frequency unit 202 was received by the The synchronization module 406 may apply the rate correc
slave radio frequency unit 204 . Further, the measurement tion to the slave clock frequency . Further, the communica
module 314 may obtain a timemeasurement of the time the tion module 402 may receive an offset from themaster radio
slave radio frequency unit 204 provided the packet ( e.g ., frequency unit 202 . The synchronization module 406 may
delay request or response packet) from the slave radio apply the offset to better synchronize the clock associated
frequency unit 204 (e . g., by examining the received packet with the slave clock module 408 .
for a timestamp ) . Those skilled in the art will appreciate that [0075 ] The slave clock module 408 may comprise any
the measurement module 314 may measure time and /or type of clock including a slave clock or a clock servo . In
obtain time measurements in any number of ways . some embodiments , the slave clock module 408 provides
[0069] The master clock module 316 may comprise any clock signals from any type of clock to the slave radio
type of clock including a reference clock or a clock servo . frequency unit 204 .
In some embodiments, the master clock module 316 pro 10076 ) It should be noted that FIG . 4 is exemplary . Alter
vides clock signals from any type of clock to the master native embodiments may comprise more , less, or function
radio frequency unit 202 . ally equivalent modules and still be within the scope of
present embodiments . For example , the functions of the
[0070 ] It should be noted that FIG . 3 is exemplary. Alter various modules of the slave radio frequency unit 204 may
native embodiments may comprise more, less, or function be combined into one or two modules . Similarly, the func
ally equivalent modules and still be within the scope of tions of the various modules of the slave radio frequency
present embodiments . For example , the functions of the unit 204 may be performed by any number of modules.
various modules of themaster radio frequency unit 102 may [0077 ] FIG . 5 is a graph 500 depicting packets transmitted
be combined into one or two modules . Similarly , the func between a master device 502 and a slave device 504 in some
tions of the various modules of the master radio frequency embodiments. The different times that packets are transmit
unit 102 may be performed by any number of modules. ted and /or received by the master device 502 and the slave
10071] FIG . 4 is a block diagram of a slave radio fre device 504 may be used to determine an acceptable slave
quency unit 204 in some embodiments . The slave radio clock frequency correction and to determine an acceptable
frequency unit 204 comprises a communication module 402 , offset for the slave clock servo of the slave device . Although
a slave measurementmodule 404 , a synchronization module FIG . 5 depicts four packets between the master device 502
406 , and a slave clock module 408 . and the slave device 504 , those skilled in the art will
[0072 ] The communication module 402 provides commu appreciate that there may be any number of packets between
nication between the master radio frequency unit 202 and the master device 502 and the slave device 504 .
the slave radio frequency unit 204 (e .g ., over a communi 10078 ] T , is the time at which the master device 502
cation network ). In one example , the communication mod initiates sending a first synchronization packet ( e . g ., sync
ule 402 may provide delay request packets to and receive packet 506 ) to the slave device 504 . T2, is the time at which
Sync packets from the master radio frequency unit 202 . In the first synchronization packet is received by the slave
some embodiments, the slave measurement module 404 device 502 .
described herein logs , tracks, or otherwise determines time [0079 ] T31 is the time at which the slave device 504
when packets are initiated for sending by the communication initiates sending a first delay request packet ( e . g., delay
module 402 and/or when packets are received by the com request 508 ) to themaster device 502 . The first delay request
munication module 402 . packetmay comprise an indicator or value representing or
US 2018 /0198599 A1 Jul. 12 , 2018

including T21 and/or an indicator or value representing or [0086 ] In various embodiments, the slave frequency rate R
including T2 , T4 , is the time at which the first delay request is calculated as follows:
packet is received by the master device 502.
[ 0080 ] T12 is the time at which the master device 502 [( T ]22 – T21)
initiates sending a second synchronization packet ( e. g ., sync
packet 510 ) to the slave device 504 . T22 is the time at which Rms = [(T!i2 - T )
the second synchronization packet is received by the slave
device 504. T21, T22 , T11, and T12 are times as referenced regarding
[0081 ] T32 is the time at which the slave device 504 FIG . 5 . T21 is the time a packet (e .g ., the sync packet 506 )
initiates sending a second delay request packet (e .g., delay is received by the slave radio frequency unit 204 . T22 is the
request 512 ) to the master device 502. The second delay time a different packet ( e. g ., the sync packet 510 ) is received
request packet may comprise an indicator or value repre by the slave radio frequency unit 204 . T12 is the time that
senting or including Ty, and /or an indicator or value repre the master radio frequency unit 202 initiates sending a
senting or including T32 . T42 is the time at which the second packet ( e .g ., the sync packet 510 ) to the slave radio fre
delay request packet is received by the master device 502 . quency unit 204. T22 is the time that the master radio
[0082] FIG . 6 is a flow chart of an exemplary method for frequency unit 202 initiates sending a different packet ( e . g .,
calculating an offset for the slave clock servo in some the sync packet 506 ) to the slave radio frequency unit 204 .
embodiments. In step 602 , the communication module 302 [0087 ] And in reverse path R is calculated in a similar
of the master radio frequency unit 202 ( e.g ., a master device way :
such as master device 502 ) and the communication module
402 of the slave radio frequency unit 204 (e. g., a slave
device such as slave device 504 ) transmit and receive a Rms = [( T ]32 – T31)
plurality of packets . The plurality of packets may include " [(T ]42 - T41)
synchronization packets ( e .g ., Sync packets 506 and 510 ),
delay request packets (e. g., delay request packets 508 and [0088 ] T31, T32 , T41 , and T42 are also times as refer
512 ), or any other kind of packets . enced regarding FIG . 5 . T31 is the time the slave radio
[0083 ] Those skilled in the art will appreciate that frequency unit 204 initiates sending a packet ( e. g., the delay
although only two devices are depicted in FIG . 5 , there may request packet 508 ) to the master radio frequency unit 202 .
be any number of switches, routers,bridges, servers, or other T32 is the slave radio frequency unit 204 initiates sending a
devices that may receive and /or relay packets between the different packet ( e . g., the delay request packet 512 ) to the
master device 502 and the slave device 504 . In some master radio frequency unit 202 . T41 is the time that the
embodiments , different packets may take different paths master radio frequency unit 202 receives a packet (e . g .,
through the network to reach the destination. For example , delay request packet 508 ) from the slave radio frequency
a path of a first packet between the master device 502 and unit 204 . T42 is the time that the master radio frequency unit
the slave device 504 may take a path through a network and 202 receives a different packet ( e.g ., delay request packet
include additional network elements to relay the first packet 512 ) from the slave radio frequency unit 204 .
when compared to a path of a second packet. Similarly, there [0089 ] Those skilled in the art will appreciate that the
may be any number of packets that take any number ofpaths measured times utilized to determine R or the reverse path
between the master radio frequency unit 202 and the slave may bemeasured based on packets that are sent and received
radio frequency unit 204 . serially or based on packets that are not serial (e .g ., other
[0084 ] In step 604 , the measurement module 314 of the packets may be sent between the master radio frequency unit
master radio frequency unit 202 calculates skews between 202 and the slave radio frequency unit 204 ). For example ,
pairs of a plurality of packets at the master device . Similarly, other packets may be sent from the master radio frequency
the measurement module 404 of the slave radio frequency unit 202 to the slave radio frequency unit 204 between the
unit 204 calculates skews between pairs of the plurality of Sync packet 506 and the Sync packet 510 .
packets at the slave device . For example , the measurement [0090 ] In some embodiments, for the slave frequency rate,
module 314 may measure , track , and/ or store the time the Rms, and the reverse slave frequency rate , Rsm , any com
master device initiates sending packets (e .g ., time T11 and bination of subsequent sync or delay _ req messages like
T12 of FIG . 5 ) and the time the master device receives Sync _ n vs. Sync _ n - 1 or Sync _ n vs. Sync _ 1 may be used .
packets (e . g ., time T41 and T42). The measurement module Those skilled in the art will appreciate that quick frequency
404 of the slave radio frequency unit 204 may measure , skew and/or slow frequency skew may be tracked .
track , and /or store the time the slave device receives packets [0091] In step 608 , the frequency rate module 304 com
(e .g ., time T21 and T22 ) and initiates sending packets (e .g ., pares the slave frequency rate , Rms to the reverse slave
time T31 and T32 of FIG . 5 ). In various embodiments , the frequency rate , Rsm . If the slave frequency rate approxi
communication module 402 of the slave device provides the mates the reverse slave frequency rate , then the slave
time measurements to the master device (e . g., in delay frequency rate ( e . g ., a slave clock frequency correction ,
request packets or any packets ). Rms, or Rsm ) may be provided to the slave radio frequency
[0085 ] In step 606 , the frequency rate module 304 of the unit 204 to correct the rate of the slave radio frequency unit
master radio frequency unit 202 calculates ratios ( e . g ., slave 204 in step 610.
frequency rates and reverse slave frequency rates) based on [0092 ] In various embodiments, the difference between
skews between pairs of the plurality of packets at the slave the slave frequency rate and the reverse slave frequency rate
radio frequency unit 204 and the skews between pairs of the is determined and compared to a predetermined threshold
plurality of packets at the master radio frequency unit 202 . (i.e., from the threshold module 306 ). If the difference is
US 2018 /0198599 A1 Jul. 12 , 2018

below the threshold or related to the threshold , the slave [0097] In step 614 , the packet trip delay module 310 may
frequency rate may be provided to the slave radio frequency calculate multiple packet trip delays and may determine a
unit 204 . The threshold may be set at installation or fabri minimum packet trip delay. Where N is the number of packet
cation of the master radio frequency unit 202 or the slave trip delays calculated , a mean packet trip delay may be
radio frequency unit 204. In some embodiments, the thresh determined as follows:
old may be determined and the master radio frequency unit meanRTD =min (RTD [1 . . . N ])
202 configured to utilize the threshold . For example , a
person or mechanism experienced with a network or ele [0098 ] After N measurements , in step 616 , the time cor
ments of a network may configure the threshold . In some rection module may utilize the mean packet trip delay to
embodiments , themaster radio frequency unit 202 may track calculate an offset between the master clock servo of the
the calculation of multiple slave frequency rates and /or master radio frequency unit 202 and the slave clock servo of
reverse slave frequency rates over many packets . The master the slave radio frequency unit 204 . In one example, the first
radio frequency unit 202 may set a percentage ( e . g ., 5 % ) of mean packet trip delay value which is used for slave offset
the smallest differences between many slave frequency rates calculation may be defined by IEEE 1588 std as follows:
and reverse frequency rates to determine the threshold . offset = T3- T;-meanRTD
Those skilled in the art will appreciate that there are many
ways to determine, calculate , and /or statistically generate the [0099] Or in reverse path
threshold . The threshold may be stored within and/or offset=T3- T4+meanRTD
retrieved by the threshold module 306 . [0100 ] For subsequent packet trip delay measurements ,
[0093] Those skilled in the art will appreciate that packet after N -th measurement, the packet trip delay module 310
delay variation (PDV ) can change from packet to packet so and /or the time correction module 312 may define a delta
only when Rms and Rsm are sufficiently close (e .g ., the MPD parameter which is the “ allowed ” meanRTD variation
slave frequency rate approximates the reverse slave fre around currentmin meanRTD or threshold for further mean
quency rate ), then , statistically , the experienced PDV from RTD selection .
subsequent sync or delay _ req message may be acceptably 0101 In various embodiments, after M > > N measure
small. As such , the Rms and / or Rsm may be used for further ments , the packet trip delay module 310 and /or the time
processing. In various embodiments , any and/or all Rms and correction module 312 may clear the meanRTD measure
Rsm may be utilized for further processing. ment and repeat min meanRTD determination . In one
[0094 ] In various embodiments , multiple slave frequency example, re -determining the mean packet trip delay and /or
rates and /or reverse slave frequency rates are determined delta MPD parameter allow for the network topology to
and multiple slave rate corrections ( e . g., a slave clock change and /or network conditions to update (e. g., change of
frequency correction such as the slave frequency rate ) are day resulting in a change of activity or significant traffic on
provided ( e. g., periodically ) to the slave frequency ratio unit the network )
204. [0102] Parameters deltaMPD , N and M may be deter
10095 ] In some embodiments, after few rate corrections, mined by experience (e . g., through configuration by a pro
the packet trip delay module 310 may calculate the packet fessional) or automatically determined by a processor based
trip delay based on packets between the master radio fre on data collection and history . In some embodiments , the
quency unit 202 and the slave radio frequency unit 204 in delta MPD may depend on traffic conditions and a number of
step 612 . The packet trip delay ( e. g., round -trip delay), RTD , switches in chain . This may also be also for M and N . M may
is as follows: be also replaced with triggered from network while path
reconfiguration .
DT ( T4 - T ) - ( T3 – Tp) XR [0103 ] FIG . 7 is a flow chart of an exemplary method for
RTD = - applying an offset for the slave clock servo in some embodi
ments . In step 702 , the communication module 402 of the
slave radio frequency unit 204 ( e .g ., a slave device such as
wherein T4 is the time a response from the slave radio slave device 504 ) and the communication module 302 of the
frequency unit 204 is received by the master frequency ratio master radio frequency unit 202 ( e.g., a master device such
unit 202. T1 is the time the master radio frequency unit 202 as master device 502 ) transmit and receive a plurality of
initiates sending a packet to the slave radio frequency unit packets . The plurality of packets may include synchroniza
204 . T3 is the time the slave radio frequency unit 204 tion packets ( e . g ., synchronization packets 506 and 510 ) ,
initiates sending the response to the master radio frequency delay request packets (e.g., delay request packets 508 and
unit 202. T2 is the time the slave radio frequency unit 204 512 ), or any other kind of packets.
receives the packet from the master radio frequency unit [0104 ] In step 704 , the slave measurement module 404 of
202. R may be a slave frequency rate ( e. g., a slave frequency the slave radio frequency unit 204 may measure time( s ) at
rate correction , slave frequency rate, or reverse slave fre which packets are received from the master radio frequency
quency rate ). unit 202 . The slave measurement module 404 may also
0096 ] Those skilled in the art will appreciate that the measure time(s ) at which packets are prepared to send to the
packet transmitted from the master radio frequency unit 202 master radio frequency unit 202 . In step 706 , the commu
to the slave radio frequency unit 204 and/ or the response nication module 302 may provide one or more timemea
transmitted from the slave radio frequency unit 204 to the surements from the slave measurementmodule 304 within a
master radio frequency unit 202 may include packets pre packet (e .g., a delay request packet 508 ) and provide the
viously sent ( e .g ., packets whose times have been previously packet to the master radio frequency unit 202 .
used to determine a slave frequency rate or reserve slave f0105 ] In some embodiments, the slave measurement
frequency rate ) or may be any other packets. module 404 may calculate skews between pairs of a plurality
US 2018 /0198599 A1 Jul. 12 , 2018

of packets . For example, the slave measurementmodule 404 rection may be made and subtracted from TimeError . Thus
may measure , track , and /or store the time the slave device the measurement of the offsetmay take multiple corrections
initiates sending packets ( e. g ., time T21 and T32 of FIG . 5 ) before it is completely corrected . The mechanism may be
and the time the slave device receives packets (e .g., time T21 less likely to make invalid corrections .
and T22 ). In various embodiments, the communication [0112 ] FIG . 9 is an exemplary environment 900 thatmay
module 402 of the slave device provides all or some of the be used to simulate some embodiments described herein .
time measurements to the master radio frequency unit 202 The system comprises a master device 902 and the slave
( e . g ., in delay request packets or any packets ). device 904 . The master device 902 and the slave device 904
[ 0106 ] In step 708 , the synchronization module 406 may communicate with each other through one or more of
receives a slave clock frequency correction from the master the switches 906 - 910 . A digital oscilloscope 912 may be
radio frequency unit 202 . In step 710 , the synchronization coupled to the master device 902 and the slave device 904 .
module 406 may apply the slave clock frequency correction A PC 914 may receive the output from the digital oscillo
to the slave clock ( e . g ., at or associated with the slave clock scope 912 . The master device 902 may be coupled with a
module 408 ). In some embodiments , the synchronization GPS 916 . Traffic generators 918 and 920 may simulate
module 406 confirmsthe authenticity of the packet from the traffic for testing. The environment 900 may be used to
master radio frequency unit , confirms integrity , and/ or vali generate test data such as that which is depicted in FIGS .
dates the slave clock frequency correction . 13- 27.
[0107 ] In step 712 , the slave radio frequency unit 204 [0113] In some embodiments , initial conditions for an
continues to receive packets ( e . g ., via the communication exemplary test include:
module 402 ), measure time when packets are received , [0114 ) GPS Locked
measure time when sending packets (e . g ., via the slave [0115 ] IEEE 1588 Master Locked to a GPS reference
measurement module 404 ), and provides times to the master [0116 ] Between Master and slave only one switch
radio frequency unit 202 . [0117 ] PC traffic generator shut down
[0108 ] In step 714 , the synchronization module 406 [0118 ] The test may be started with no forced traffic (i.e.,
receives an offset from the master radio frequency unit 202 . the traffic generators 918 and 920 being disabled ) and with
In step 716 , the synchronization module 406 may apply the only one Ethernet switch (e. g., switch 906 ) between the
offset to the slave clock ( e. g ., at or associated with the slave master device 902 and the slave device 904 . In one example,
clock module 408 ). In some embodiments, the synchroni the oscilloscope 912 may indicate lpps signals from master
zation module 406 confirms the authenticity of the packet and slave pps output and measure phase difference between
from the master radio frequency unit , confirms integrity , slave 1pps signal and master 1pps signal. On the PC 914
and /or validates the offset. coupled with the oscilloscope 912 , acquired data may be
[0109] FIG . 8 is a diagram 800 of communication between analyzed to produce slave offset graphs and slave offset
a master clock 802 and a slave clock 804 in some embodi distribution graphs. Measurements may be repeated with
ments. In some embodiments, both Sync and Delay-Req active second and third Ethernet switches (e.g., switches 908
messages are utilized to make time corrections. A Sync and 910 ).
message or Sync packet may be provided from the master [0119 ] Both master and slave devices 902 and 904 may
digital device with master clock servo 102 to the slave use Ethernet PHY capable of producing timestamps for
digital device with slave clock servo 104 . The Delay - Req IEEE1588 event messages ( e . g ., DP83640 by National
message or Delay -Req packet may be provided by the slave Semiconductor ). In some test scenarios, themaster and slave
digital device with slave clock servo 104 to the master devices 902 and 904 run IEEE1588v2 standard protocol
digital device with master clock servo 102 . packet exchange. The slave device 904 may employ an
[ 0110 ] For Sync messages , if the MSdelay is less than the additional clock servo . The master device 902 may be any
minMPD , then the measurement may indicate there may be digital device . Further, the slave device 904 may be any
a time offset of at leastMSdelay -minMPD . In this case , time digital device .
correction may bemade based on the offsetmeasurement. If [0120 ] FIG . 10 depicts a master radio frequency unit 202
the MSdelay is bigger than the minMPD , there may be in some embodiments . The master radio frequency unit 202
insufficient information regarding whether the error is due to may be configured to perform all or some of the steps
a time offset or due to packet delay variation (PDV ) . discussed regarding FIG . 6 . For example , the mixer 1002
Similarly for Delay _ Req messages , if the SMdelay is less may receive packets (e. g.,Synch packets , packets containing
than the minMPD , then the measurement may indicate that rate corrections, offsets , or any packets ) from a digital device
there is a time offset of at least minMPD - SMdelay. This to be provided to the slave radio frequency unit 204 . The
may result in a detected positive rather than negative offset master radio frequency unit 202 may comprise mixermod
as seen with the MSdelay measurement. In some embodi ules 1002 and 1016 , filter modules 1004 , 1008 , 1018 , and
ments , time corrections may be implemented by adjusting 1022 , oscillator modules 1006 and 1020 , a phase adjuster
the PTP clock rate for a period of time. 1010 , an automatic gain control (AGC ) module 1012 , ampli
[0111 ] To prevent large rate fluctuations , each connection fication /attenuation modules 1014 and 1024 , waveguide
may be limited in magnitude . As a result, of limiting the filter 1026 , and waveguide 1028 . The transmitting radio
connections, the process may assist in reducing time interval frequency unit 1002 may further comprise a signal quality
errors caused by rapid corrections of time offsets . Errors module that may control the phase adjuster 1010 and/ or the
may be managed by keeping a TimeError value. If a new AGC module 1012 .
error is determined caused by a Sync message received or [0121] In various embodiments, the master radio fre
Delay -Resp message received , indicating a bigger offset, quency unit 202 is a part of the ODU 210 . The mixer module
TimeError may adopt the new value, otherwise, TimeError 1002 , filter module 1004 , and the oscillator module 1006
may remain unchanged . Based on TimeError, limited cor may represent an upconverter configured to upconvert the
US 2018 /0198599 A1 Jul. 12 , 2018

signal received from a gain module to an intermediate 1020 may be remotely located and configured to provide an
frequency signal. Similarly, the mixer module 1016 , filter oscillating signal to one or more transmitting radio fre
module 1018 , and oscillator module 1020 also may repre quency units . In some embodiments , a single oscillating
sent an upconverter configured to further upconvert the module may provide an oscillating signal to both the mixer
signal to an RF signal. Those skilled in the art will appreciate module 1002 and 1016 , respectively (e. g., optionally via a
that there may be any number of upconverters configured to filter ). In one example , the oscillator signal from the oscil
upconvert the signals within the transmitting radio fre lator module may be altered (e. g., oscillation increased or
quency unit 1002 . decreased ) and provided to a different part of the circuit .
[0122 ] The mixer modules 1002 and 1016 may comprise [0129 ] Those skilled in the art will appreciate that each of
mixers configured to mix the signal(s ) provided by the the oscillator modules 1006 and 1020 may be the same as
modem with one ormore other signals . The mixer modules each other. For example , oscillator modules 1006 and 1020
1002 and 1016 may comprise many different types ofmixers may both be oscillators sharing the same electrical proper
with many different electrical properties . In one example , ties or, alternately , the oscillator modules 1006 and 1020
the mixer 1002 mixes the signal received from a gain may be another kind of oscillator and/ or with different
module ( not shown ) with the filtered oscillating signal from electrical properties . Each oscillator modules 1006 and 1020
the filter module 1004 and the oscillator module 1006 . In may include one or more components . For example , the
another example, the mixer module 1016 mixes a signal oscillator module 1006 may comprise one or more oscilla
received from the amplifier/attenuator module 1014 with the tors.
filtered oscillating signal from the filter module 1018 and the 10130 ] In various embodiments , the master radio fre
oscillator module 1020 . quency unit 202 includes a signal quality module . The signal
[0123] Those skilled in the art will appreciate that each of quality module may be configured to generate a phase
the mixers 1002 and 1016 may be the same as one or more control signal to control the phase of a processed signal. In
othermixer modules . For example , mixer modules 1002 and one example , the signal quality module receives the upcon
1016 may both be mixers sharing the same electrical prop verted RF signal from the amplifier/ attenuatormodule 1024
erties or, alternately, the mixer 1002 and 1016 may be and mixes the amplified or attenuated signal with the filtered
another kind of mixer and /or with different electrical prop oscillator signal or the upconverted signal from the second
erties. Each mixer modules 1002 and 1016 may include one upconverter. The signal quality module may filter the signal
or more components . For example, the mixer module 1002 and compare the filtered , mixed signalwith a predetermined
may comprise one or more mixers . phase value to generate a phase control signal based on the
[0124 ] The filter modules 1004 , 1008 , 1018 , and 1022 comparison .
may comprise filters configured to filter the signal. The filter [0131 ] The phase adjuster 1010 may comprise a variable
modules 1004 , 1008 , 1018 , and 1022 may comprise many phase control circuit configured to increase or decrease the
different types of filters (e .g., bandpass filter, low pass filter, phase of the signal to be transmitted . The phase adjuster
high pass filter, or the like ) with many different electrical 1010 may comprise any different type of phase adjuster or
properties . In one example , the filter module 1004 may be a phase shifter with different electrical properties . In one
band pass filter configured to filter the oscillation signal ( or example , the phase adjuster 1010 increases or decreases the
components of the signal) provided from the oscillator phase of the signal received from the filter module 1008 . The
module 1006 . Similarly , filter modules 1004 , 1008 , 1018 , phase adjuster 1010 may adjust the phase of the signal based
and 1022 may filter signals ( or components of the signals ) on the phase control signal from the signal quality module.
from the oscillatormodule 1006 , the oscillatormodule 1020 , [0132 ] The phase adjuster 1010 may include one or more
the mixer module 1002 , or the mixer module 1016 , respec components . For example , the phase adjuster 1010 may
tively . comprise one or more phase control elements.
101251. Those skilled in the art will appreciate that each of 101331 The AGC module 1012 may comprise an automatic
the filter modules 1004 , 1008 , 1018 , and 1022 may be the gain control (AGC ) circuit configured to increase or
same as one or more other filter modules. For example , decrease the gain of the signal received from the phase
filters modules 1004 and 1008 may both be filters sharing the adjuster 1010 . The AGC module 1012 may comprise many
same electrical properties while filter module 1018 may be different types of AGCs with many different electrical prop
another kind of filter. In another example , filters module erties . In one example , the AGC module 1012 increases or
1004 and 1008 may both be filters of a similar type but have decreases the gain of the signal received from the phase
different electrical properties. adjuster 1010 . The AGC module 1012 may adjust the gain
[0126 ] Each filter modules 1004 , 1008 , 1018, and 1022 of the signal based on the gain control signal.
may include one or more components. For example , the [0134 ] The AGC module 1012 may include one or more
filter modules 1004 may comprise one or more filters . components . For example , the AGC module 1012 may
0127 The oscillator modules 1006 and 1020 may com comprise one or more AGCs.
prise oscillators configured to provide an oscillating signal [0135 ] In various embodiments , in order to adjust the
that may be used to upconvert the signal. The oscillator phase of the signal or the amplitude of the signal, the signal
modules 1006 and 1020 may comprise any kind of oscillator quality module may provide control signals to adjust the
with any different electrical properties . In one example, the filtered signal from the filter module 1008 to achieve the
oscillator module 1006 provides an oscillating signal to the desired adjustment. For example , in order to adjust the phase
filter module 1004 . The oscillatormodule 1020 may provide or amplitude of the signal, the signal quality module may
an oscillating signal to the filter module 1018. compare the phase and amplitude of the signal to be pro
0128] The oscillator modules 1006 and 1020 , either indi vided to the waveguide filter 1026 and/ or the waveguide
vidually or together,may be local or remote . In one example , 1028 based on a predetermined phase value and/ or a pre
the oscillating module 1006 and/ or the oscillating module determined amplitude value. Based on the comparison , the
US 2018 /0198599 A1 Jul. 12 , 2018
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signal quality module may generate phase and gain control f0143 ] The storage system 1106 is any storage configured
signals to achieve the desired adjustment. to retrieve and store data . Some examples of the storage
[0136 ] In some embodiments , the predetermined phase system 1106 are flash drives , hard drives, optical drives,
value and amplitude value may be the same or substantially and / or magnetic tape. In some embodiments, the digital
similar as the phase and amplitude of the wireless signals device 1100 includes a memory system 1104 in the form of
outputted by one or more other transmitting radio frequency RAM and a storage system 1106 in the form of flash data .
units . In one example, the phase and the amplitude of one or Both the memory system 1104 and the storage system 1106
more transmitting radio frequency unit may be synchro comprise computer readable media that may store instruc
nized . tions or programs that are executable by a computer pro
[0137 ] The amplification / attenuation modules 1014 and cessor including the processor 1102
1024 may comprise an amplifier and / or an attenuator con [0144 ] The communication network interface ( com . net
figured to amplify and /or attenuate a signal. The amplifica work interface ) 1108 may be coupled to a data network (e .g .,
tion / attenuator modules 1014 and 1024 may be any kind of data network 1104 or 1114 ) via the link 1116 . The commu
amplifiers and/or attenuators . Further, the amplification / nication network interface 1108 may support communica
attenuator modules 1014 and 1024 may each comprise tion over an Ethernet connection, a serial connection , a
amplifiers and/ or attenuators with any kind of electrical parallel connection , or an ATA connection , for example . The
properties . communication network interface 1108 may also support
[0138 ] In some embodiments , the amplifier/attenuator wireless communication (e.g ., 802. 11 a /b /g /n , WiMAX ). It
module 1014 receives a signal from the AGC module 1012 . will be apparent to those skilled in the art that the commu
The amplifier/attenuator module 1014 may amplify or nication network interface 1108 may support many wired
attenuate the signal. Further , the amplifier /attenuator module and wireless standards .
1024 may attenuate the signal (or components of the signal) [0145] The optional input/output (1/0 ) interface 1110 is
after the signal has been upconverted by the mixer module any device that receives input from the user and output data .
1016 , the filter module 1018 , and the oscillator module The optional display interface 1112 is any device that may
1020 . The amplifier /attenuator module 1024 may then pro be configured to output graphics and data to a display. In one
vide the signal to the signal quality module and/ or the example , the display interface 1112 is a graphics adapter.
waveguide filter 1026 . [014 ] It will be appreciated by those skilled in the art that
[0139 ] Those skilled in the art will appreciate that each of the hardware elements of the digital device 1100 are not
the amplifier/ attenuatormodules 1014 and 1024 may be the limited to those depicted in FIG . 11 . A digital device 1100
same as one ormore other amplifier/attenuatormodules . For may comprise more or less hardware elements than those
example , amplifier/attenuatormodules 1014 and 1024 may depicted . Further, hardware elements may share functional
both be amplifiers sharing the same electrical properties. In ity and still be within various embodiments described
another example , amplifier/ attenuator modules 1014 and herein . In one example, encoding and / or decoding may be
1024 may both be amplifiers but have different electrical performed by the processor 1102 and/ or a co - processor
properties . located on a GPU .
[ 0140 ] Themaster radio frequency unit 202 may comprise (0147 FIG . 12 is a table including test data used in
the waveguide filter 1026 and the waveguide 1028 . The simulations related to test output FIGS. 13 - 31 utilizing some
waveguide filter 1026 may be any filter coupled to the embodiments described herein . FIG . 12 includes the number
waveguide 1028 and configured to filter the electromagnetic of switches active, the amount of traffic simulated , the type
waves ( e .g ., remove noise). The waveguide 1028 may pro of traffic simulated , standard deviation , minimum offset ,
vide the signal to an antenna via a diplexer. The diplexer maximum offset, mean offset, maximum delta MPD , Sync,
may provide the signal to the antenna. The waveguide 1028 and times.
may be any waveguide kind or type of waveguide . For [0148 ] FIGS. 13 - 31 include output data and graphs related
example , the waveguide 1028 may be hollow or dielectric . to output of separate simulations utilizing some embodi
In some embodiments , the waveguide 1028 comprises a ments described herein .
rectangular to circular waveguide. [0149] The above - described functions and components
[0141 ] FIG . 11 depicts an exemplary digital device 1100 may be comprised of instructions that are stored on a storage
according to some embodiments. The digital device 1100 medium such as a computer readable medium . The instruc
comprises a processor 1102, a memory system 1104 , a tions may be retrieved and executed by a processor. Some
storage system 1106 , a communication network interface examples of instructions are software , program code, and
1108 , an I/ O interface 1110 , and a display interface 1112 firmware . Some examples of storage medium are memory
communicatively coupled to a bus 1114 . The processor 1102 devices, tape , disks, integrated circuits, and servers. The
may be configured to execute executable instructions ( e . g ., instructions are operational when executed by the processor
programs). In some embodiments, the processor 1102 com to direct the processor to operate in accord with some
prises circuitry or any processor capable of processing the embodiments . Those skilled in the art are familiar with
executable instructions. instructions , processor (s), and storage medium .
[ 0142] The memory system 1104 is any memory config 1 . A method of synchronizing a first clock and a second
ured to store data . Some examples of the memory system clock , the method comprising :
1104 are storage devices, such as RAM or ROM . The transmitting across a channel a plurality of packets
memory system 1104 may comprise the RAM cache. In between a first device with a first clock having a first
various embodiments , data is stored within the memory clock time and a second device with a second clock
system 1104. The data within the memory system 1104 may having a second clock time;
be cleared or ultimately transferred to the storage system obtaining a minimum path delay or a mean path delay of
1106 . the channel;
US 2018 /0198599 A1 Jul. 12 , 2018
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obtaining a first time when a first sync packet of the correcting, based on the offset , the second clock time of
plurality of packets is sent from the first device to the the second clock if the second difference is adjusted
second device , the first time being based on the first or the first clock time of the first clock if the first
clock ; difference is adjusted .
obtaining a second timewhen the first sync packet of the 2 . The method of claim 1, wherein the minimum path
plurality of packets is received by the second device, delay or the mean path delay is an estimate .
the second time being based on the second clock ; 3 . The method of claim 1 , wherein the determining
obtaining a third time when a first response packet from whether the first path delay satisfies the condition involving
the second device is sent to the first device in response the minimum path delay or the mean path delay includes
to the first sync packet, the third time being based on determining whether the first path delay is below a threshold
the second clock ; path delay based on the minimum path delay or the mean
obtaining a fourth time when the first response packet path delay.
from the second device is received by the first device , 4 . The method of claim 1, further comprising :
the fourth time being based on the first clock ; if at least each of the first path delay and the second path
computing a first path delay across the channel of the first delay satisfies the condition , then correcting one of a
sync packet and the first response packet; second clock rate of the second clock or a first clock
determining whether the first path delay satisfies a con rate of the first clock based on the ratio .
dition involving the minimum path delay or the mean 5 . The method of claim 1, wherein the computing the
path delay ; offset between the first clock and the second clock comprises
obtaining a fifth time when a second sync packet of the computing T2 - T1 - PTD wherein T2 is the second time, T1
plurality of packets is sent from the first device to the is the first time, and PTD is the packet trip delay .
second device , the fifth time being based on the first 6 . The method of claim 1 , wherein the computing the
clock ; offset between the first clock and the second clock comprises
obtaining a sixth time when the second sync packet of the computing T3 - T4 + PTD wherein T3 is the third time, T4 is
plurality of packets is received by the second device , the first time, and PTD is the packet trip delay .
the sixth time being based on the second clock ; 7 . The method of claim 1, further comprising computing
obtaining a seventh time when a second response packet a set ofpacket trip delays for a setof the plurality of packets .
from the second device is sent to the first device in 8 . Themethod of claim 7 , further comprising determining
response to the second sync packet, the seventh time theminimum path delay or the mean path delay based on the
being based on the second clock ; set of packet trip delays.
obtaining an eighth timewhen the second response packet 9 . The method of claim 1 , wherein the first device is a
from the second device is received by the first device, master device and the second device is a slave device .
the eighth time being based on the first clock ; 10 . The method of claim 9 , wherein the adjusting the one
computing a second path delay across the channel of the of the first difference or the second difference includes
second sync packet and the second response packet; adjusting the second difference, and the correcting the
determining whether the second path delay satisfies the second clock time of the second clock or the first clock time
condition involving the minimum path delay or the of the first clock includes correcting the second clock time
mean path delay ; and of the second clock .
if at least each of the first path delay and the second path 11 . A system for synchronizing a first clock and a second
delay satisfies the condition , then : clock , the system comprising:
computing a first skew between the first time and the a communication module configured to transmit across a
fifth time and a second skew between the second channel a plurality of packets between a first device
time and the sixth time, or computing the first skew with a first clock having a first clock time and a second
between the fourth time and the eighth time and the device with a second clock having a second clock time;
second skew between the third time and the seventh at least one processor configured to :
time; obtain a minimum path delay or a mean path delay of
computing a ratio based on the first skew and the the channel;
second skew ; obtain a first time when a first sync packet of the
computing a first difference between the fourth time plurality of packets is sent from the first device to the
and the first time and a second difference between the second device , the first timebeing based on the first
third time and the second time, or computing the first clock ;
difference between the eighth time and the fifth time obtain a second time when the first sync packet of the
and the second difference between the seventh time plurality of packets is received by the second device ,
and the sixth time; the second time being based on the second clock ;
adjusting one of the first difference or the second obtain a third time when a first response packet from
difference based on the ratio ; the second device is sent to the first device in
computing a packet trip delay based on the first differ response to the first sync packet, the third timebeing
ence and the second difference , as adjusted ; based on the second clock ;
computing an offset between the first clock and the obtain a fourth timewhen the first response packet from
second clock based on the packet trip delay and any the second device is received by the first device, the
of the first time and the second time, the third time fourth time being based on the first clock ;
and the fourth time, the fifth time and the sixth time, compute a first path delay across the channel of the first
or the seventh time and the eighth time; and sync packet and the first response packet ;
US 2018 /0198599 A1 Jul. 12 , 2018
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determine whether the first path delay satisfies a con second clock rate of the second clock or a first clock
dition involving the minimum path delay or the mean rate of the first clock based on the ratio .
path delay ; 15 . The system of claim 11 , wherein the at least one
obtain a fifth time when a second sync packet of the processor computes the offset between the first clock and the
plurality of packets is sent from the first device to the second clock by computing T2 - T1 -PTD wherein T2 is the
second device , the fifth timebeing based on the first second time, T1 is the first time, and PTD is the packet trip
clock ; delay.
obtain a sixth timewhen the second sync packet of the 16 . The system of claim 11 , wherein the at least one
plurality of packets is received by the second device , processor computes the offset between the first clock and the
the sixth time being based on the second clock ; second clock by computing T3 - T4 +PTD wherein T3 is the
obtain a seventh time when a second response packet third time, T4 is the first time, and PTD is the packet trip
from the second device is sent to the first device in delay.
response to the second sync packet, the seventh time 17. The system of claim 11 , wherein the at least one
being based on the second clock ; processor is further configured to obtain a set of packet trip
obtain an eighth timewhen the second response packet delays for a set of the plurality of packets .
from the second device is received by the first 18 . The system of claim 17 , wherein the at least one
device , the eighth timebeing based on the first clock ; processor is configured to compute the minimum path delay
compute a second path delay across the channel of the or themean path delay based on the set of packet trip delays .
second sync packet and the second response packet; 19 . A non-transitory computer readable medium compris
determine whether the second path delay satisfies the ing executable instructions, the instructions being execut
condition involving the minimum path delay or the able by a processor to perform a method of synchronizing a
mean path delay ; and first clock having a first clock time in a first device and a
if at least each of the first path delay and the second second clock having a second clock time in a second device ,
path delay satisfies the condition , then : the first device and the second device communicating a
compute a first skew between the first time and the plurality of packets across a channel, the method compris
fifth time and a second skew between the second ing:
time and the sixth time, or computing the first obtaining a minimum path delay or a mean path delay of
skew between the fourth time and the eighth time the channel;
and the second skew between the third time and obtaining a first time when a first sync packet of the
the seventh time; plurality of packets is sent from the first device to the
compute a ratio based on the first skew and the second device , the first time being based on the first
second skew ; clock ;
compute a first difference between the fourth time obtaining a second time when the first sync packet of the
and the first time and a second difference between plurality of packets is received by the second device ,
the third time and the second time, or compute the the second time being based on the second clock ;
first difference between the eighth time and the obtaining a third time when a first response packet from
fifth time and the second difference between the the second device is sent to the first device in response
seventh time and the sixth time; to the first sync packet, the third time being based on
adjust one of the first difference or the second the second clock ;
difference based on the ratio ; obtaining a fourth time when the first response packet
compute a packet trip delay based on the first dif from the second device is received by the first device ,
ference and the second difference , as adjusted ; and the fourth time being based on the first clock ;
compute an offset between the first clock and the computing a first path delay across the channel of the first
second clock based on the packet trip delay and sync packet and the first response packet ;
any of the first time and the second time, the third determining whether the first path delay satisfies a con
time and the fourth time, the fifth time and the dition involving the minimum path delay or the mean
sixth time, or the seventh time and the eighth time; path delay ;
and obtaining a fifth time when a second sync packet of the
a rate correction module configured to correct, based on plurality of packets is sent from the first device to the
the offset, the second clock time of the second clock if second device, the fifth time being based on the first
the second difference is adjusted or the first clock time clock ;
of the first clock if the first difference is adjusted . obtaining a sixth time when the second sync packet of the
12 . The system of claim 11 , wherein the minimum path plurality of packets is received by the second device ,
delay or the mean path delay is an estimate . the sixth time being based on the second clock ;
13 . The system of claim 11 , wherein the rate correction obtaining a seventh time when a second response packet
module determines whether the first path delay satisfies the from the second device is sent to the first device in
condition by determining whether the first path delay is response to the second sync packet, the seventh time
below a threshold path delay based on the minimum path being based on the second clock ;
delay or the mean path delay. obtaining an eighth time when the second response packet
14 . The system of claim 11 , wherein the at least one from the second device is received by the first device,
processor is further configured to : the eighth time being based on the first clock ;
if at least each of the first path delay and the second path computing a second path delay across the channel of the
delay satisfies the condition , then correcting one of a second sync packet and the second response packet;
US 2018 /0198599 A1 Jul. 12 , 2018
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determining whether the second path delay satisfies the difference between the eighth time and the fifth time
condition involving the minimum path delay or the and the second difference between the seventh time
mean path delay ; and and the sixth time;
if at least each of the first path delay and the second path adjusting one of the first difference or the second
delay satisfies the condition , then : difference based on the ratio ;
computing a packet trip delay based on the first differ
computing a first skew between the first time and the ence and the second difference , as adjusted ;
fifth time and a second skew between the second computing an offset between the first clock and the
time and the sixth time, or computing the first skew second clock based on the packet trip delay and any
between the fourth time and the eighth time and the of the first time and the second time, the third time
second skew between the third time and the seventh and the fourth time, the fifth time and the sixth time,
time; or the seventh time and the eighth time; and
computing a ratio based on the first skew and the correcting, based on the offset, the second clock time of
second skew ; the second clock if the second difference is adjusted
computing a first difference between the fourth time or the first clock time of the first clock if the first
and the first time and a second difference between the difference is adjusted .
third time and the second time, or computing the first * * * * *

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