Multiplexers – De-multiplexers Encoder – Decoder

Marks 20%
Q1) Objective questions (1)
1) ---- means many into one.
Multiplexer.
2) Multiplexer is also known as ----- (M15)
Data selector.
3) An ---- converts active input signal into coded output signal.
Encoder.
4) The basic function of ---- is to detect the presence of specified combination of bits
on its input and to indicate the presence by specified output level.
Encoder.
5) IC ----- decimal decoder.
7446 OR 7447
6) IC ---- is dual 1:4 DEMUX
74139.
7) IC ---- is dual 4:1 MUX
74153.
8) The multiplexer is used to convert -----
N inputs to one output.
9) The demultiplexer is used to convert -----
One input into many outputs.
10) --- is an input that disables or enables a circuit.
Strobe
11) If encoder produces a BCD output corresponding to the highest order decimal
digit appearing on the input ignoring the other input then it is known as ---
Priority encoder.
12) IC 74147 is ----
Priority encoder.
13) Demultiplexer accept ---- input (M 03)
Single
14) 1:32 de- multiplexer can be design with --- select lines. (M 02)
5
15) In MUX for selecting n inputs for connecting to the out a set of m select lines
are required where ------ (O 06)
2m = n
16) Active high output decoders (IC 7448) are used to drive ------ (M11)
Common Cathode type LED Display.
17) In combinational logic circuit strobe signal is used for ----- (M14)
Cascading
18) In multiplexer relation between data lines and m select lines is given by ----
a) 2m = n (b) 2m-1 = n, (c) 2m+1 = n, (d)2n = m (M17)
Q1) What are multiplexers and de-multiplexer? Write their working with rotary
switch. (O 01, 02, 05, 06, 09, M 01, 08, 11)
Q1) Why multiplexing is required? Explain basic multiplexer using 4 way
single pole switch.
Q1) What is multiplexer? Explain working of 4 to 1 MUX using Rotary Switch.
Q1) What is multiplexer? Explain its concept using block diagram. (M14)
Q1) Explain need of multiplexing and de-multiplexing. (M18)
(3 Marks = 1 Marks for Necessity, 2 Marks for explanation) (M13, O13)
(4 Marks = 2Marks for MUX, 2 Marks for DEMUX)
Ans: - Multiplexer means many into one. Multiplexer is a special combinational
circuit widely used in digital circuit to select data. Multiplexer is also known as Data
selector. It has several inputs and only one output, the selection of input is
controlled by a set of select inputs.
Need of multiplexer: - Multiplexer is the circuit in which by using control signal
more number of inputs is connected to single output. Due to multiplexer logic design
becomes simple. It minimizes the components required hence the cost also
decreased. Due to this multiplexer are widely used in T.V., Radio transmission and
Telephone.
Multiplexer (MUX) basically has `n` numbers of input data lines, `m` numbers of
select (control) lines and only one output terminal. The minimum numbers of control
lines are calculated by using formula 2m =n,
Where m is control lines, n is input lines.

Simple multiplexing action is obtained by using rotary switch. It has many ways
and single pole for example SP 7 WAY has single pole and 7 ways. The inputs are
connected to way terminals and output is connected to pole terminal. This pole is
manually connected to anyway and data connected to this terminal appears across
the output terminal. In multiplex circuits the same concept is used.
Advantages: - 1) It minimizes the number of IC required.
2) Simplification of circuits is not required.
3) Designing circuits becomes simple.
4) Cost of the circuit is reduced.
Demultiplexer means one into many. The action of demultiplexer is the exact
reverse of multiplexer. It has one input, and many outputs input is connected to one
of the output terminal and that terminal is selected by control terminal.
Demultiplexer is also known as Data Distributor.
Need of demultiplexer: - It is the circuit which gives exact opposite action of
MUX, hence along with MUX DEMUX is required. To design multi output circuit
DEMUX is very useful. DEMUX can be used binary to decimal decoder.
DEMUX has `n` numbers of output lines and `m` numbers of select lines and only
one input terminal. The minimum number of control lines are calculated by using
formula 2m =n,
Where m is control lines, n is output lines.

Similar to MUX rotary switch is used as DEMUX but in this case input data is
connected to the pole terminal and outputs are connected to the way terminals.
When pole is connected to different ways data is connected to this terminal
Advantages: - 1) De- multiplexer can be used as binary to decimal decoder.
2) It needs minimum ICs hence cost reduced.
Q2) What is multiplexer? Explain the working of 4: 1 multiplexer using gates.
Q2) Draw logic diagram of 4 to 1 MUX using 4 AND gates, 1 OR gate and two
select lines and explain its working giving the truth table.
Q2) Draw logic diagram of 4 to 1 MUX. Explain its working and write its truth
table. (O 01, 05, 07, 09, M 01, 02, 05, 10, 11, 12, 13, 15, 18)
(4Marks = 2 Marks for Diagram & Truth table, 2 Marks for explanation)
Ans: - In digital circuits 4:1 MUX is constructed by using basic gates. As there are
four data inputs minimum two control lines are required to select data input. Four
AND gates and one four bit OR gate is required to construct the circuit.
Logic Diagram:- Truth Table:-

Control inputs Output

S1 S0 Y

0 0 I0
0 1 I1
1 0 I2
1 1 I3

Working: - Case1:- When control i/p S1 = S0 =0

In this case control input signals of 1st AND becomes high, which makes this gate
enable while all other gates are in disabled mode. Hence input connected to 1 st AND
gate passes through it and appears across output terminal.
Therefore, when S1 = S0=0, Y = I0
Case 2:- When control i /p S1 = 0, S0 =1
In this case control input signals of 2nd AND becomes high, which makes this gate
enable while all other gates are in disabled mode. Hence input connected to 2 nd AND
gate passes through it and appears across output terminal.
Therefore, when S1 = 0, S0=1, Y = I1
Case 3:- When control i /p S1 = 1, S0 =0
In this case control input signals of 3rd AND becomes high, which makes this gate
enable while all other gates are in disabled mode. Hence input connected to 3 rd AND
gate passes through it and appears across output terminal.
Therefore, when S1 =1, S0=0, Y = I2
Case 4:- When control i /p S1 = S0 =1
In this case control input signals of 4thAND becomes high, which makes this gate
enable while all other gates are in disabled mode. Hence input connected to 4 th AND
gate passes through it and appears across output terminal.
Therefore, when S1 = S0=1, Y = I3
Q3) Explain the working of 1:4 demultiplexer using NOT and AND gates.
Q3) Draw logic diagram of 1:4 Demultiplexer and explain its working.
Q3) What is Demultiplexer? Design 1:4 De-MUX using gates and explain its
working with truth table. (O 01, 02, 04, 05, 06, 07, 09, M 01, 02, 03, 04, 06, 09, 12, 15,
16, 17) (3 Marks = 1 Marks diagram, 2 Marks for Explanation)
(4Marks = 1 Marks for definition 1 Marks for dia., 2 Marks for Explanation)
Ans:- In this circuit as there are four output terminals two control signals are
required.
In this circuit four AND gates are used as there is single input it is connected to
all AND gates through common line (BUS). Control inputs are connected to AND
gates to select the output terminal to which input data is to be connected.
Logic Diagram: - Truth Table:-

Control inputs Output

S1 S0 Y
0 0 Y0
0 1 Y1
1 0 Y2
1 1 Y3

Working: - Case1:- When control i/p S1 = S0 =0

In this case control input signals of 1st AND becomes high, which makes this gate
enable while all other gates are in disabled mode. Hence input connected to output
terminal of 1st AND gate.
Therefore, when S1 = S0=0, Y0 = I
Case 2:- When control i /p S1 = 0, S0 =1
In this case control input signals of 2nd AND becomes high, which makes this gate
enable while all other gates are in disabled mode. Hence input connected to output
terminal of 2ndAND gate.
Therefore, when S1 = 0, S0=1, Y1 = I
Case 3:- When control i /p S1 = 1, S0 =0
In this case control input signals of 3rd AND becomes high, which makes this gate
enable while all other gates are in disabled mode. Hence input connected to output
terminal of 3rd AND gate
Therefore, when S1 =1, S0=0, Y2 = I
Case 4:- When control i /p S1 = S0 =1
In this case control input signals of 4thAND becomes high, which makes this gate
enable while all other gates are in disabled mode. Hence input connected to output
terminal of 4th AND gate.
Therefore, when S1 = S0=1, Y3 = I
Q4) Construct 1:8 Demultiplexer using two 1:4 Demux. (M14)
(3Marks = 1 Marks for dia., 2 Marks for Explanation)
Ans: - This construction is achieved by using demultiplexer tree. In this circuit MSB is
connected to the strobe input, up to 4 MSB is low hence upper demux is in enable mode while
lower demux is in disabled mode. Due to which one of the output terminals is selected i.e. Y0
to Y3 and input is connected to this output terminal. After 4 MSB becomes high due to which
upper demux becomes disable and lower demux becomes enable and hence one of the output
terminals i.e. Y4 to Y7 is selected and input is connected to this output terminal.
Logic Diagram: - Truth table:-

Control Inputs Output

S2 S1 S0 Y

0 0 0 Y0

0 0 1 Y1

0 1 0 Y2

0 1 1 Y3

1 0 0 Y4

1 0 1 Y5

1 1 0 Y6

1 1 1 Y7

If control inputs are 010 as strobe input is low upper demux is in enable mode and due
to remaining control inputs input data is connected to output terminal Y 2.
If control inputs are 110 as strobe input is high the lower demux becomes enable and due
to remaining control inputs input data is connected to output terminal Y 5.
Q5) What is Encoder? Explain decimal to BCD encoder with necessary logic
diagram.
Q5) Explain decimal to binary encoder by using four OR gates with logic
diagram. (O 01, 02, 03, 04, 05, 06, 09, M 01, 02, 03, 05, 06, 10, 11, 12, 15, 16,
18)
(3 Marks = 1 Mark diagram, 2 Marks for explanation)
(4Marks = 1 Mark for definition 1 Marks for dia., 2 Marks for explanation)
Ans: - It is a combinational circuit which converts input signal into coded signal.
In many digital circuits inputs applied by us is in decimal form but all digital
instruments use binary numbers hence it is necessary to convert given input signal
into binary and for that purpose encoder is used. The process of converting
information to binary form is known as encoding and circuit used is known as
encoder.
One of the most commonly used input devices for digital systems is a set of ten
switches, one for each number between 0 to 9. These switches generate high or low
logic in response to make on or off. When particular number has to feed to a digital
circuit switch corresponding to that number is pressed.
In this circuit when particular key is pressed high logic is passed through that
track and applied to OR gate. As in case of OR gate when any one input is high
output is high therefore output of circuit becomes high and it will depends upon
decimal number.
Decimal to BCD encoder: -
diagram: - Truth Table: -

Decimal BCD Output

Inputs D C B A
0 0 0 0 0

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

4 0 1 0 0

5 0 1 0 1

6 0 1 1 0

7 0 1 1 1
For example, key of decimal number 5 is pressed
output of 1st and 3rd gate becomes high i.e. DCBA = 0101. 8 1 0 0 0
Similarly, by using other keys we can get equivalent BCD
output. In this encoder 0-digit input is not connected 9 1 0 0 1
because the output at this stage is low i.e. DCBA = 0000
Q6) Explain priority encoder with an example. (M 04, 10, O 07)
Q6) Explain Decimal to BCD Encoder using OR gates with logic diagram. What
do you mean by Priority Encoder. (O13)
Q6) Explain working of BCD to Decimal decoder. Write its truth table. (M16)
(3 Marks = 1 Mark for diagram, 1 Marks for truth table,1 mark explanation)
(4 Marks = 1 Mark for diagram, 1 Marks for truth table,1 mark explanation, 1 mark for
explanation of Priority Encoder)
Ans: -

The IC 74147 is decimal to BCD encoder. This IC is also known as priority

encoder it gives priority to highest order input number, for example if inputs 3 and
6 are low the BCD output will be corresponding to decimal number 6 i.e.0110.
The IC 74147 has active low input and active low output due to which active
low decimal input produces complimented BCD output. In this IC there is no 0-digit
input because BCD outputs are low when there are all high inputs. This IC is mostly
used in keyboard.
 Active low decimal input Active low BCD
output

1 2 3 4 5 6 7 8 9 D C B A

1 1 1 1 1 1 1 1 1 1 1 1 1

0 1 1 1 1 1 1 1 1 1 1 1 0

× 0 1 1 1 1 1 1 1 1 1 0 1

× × 0 1 1 1 1 1 1 1 1 0 0

× × × 0 1 1 1 1 1 1 0 1 1

× × × × 0 1 1 1 1 1 0 1 0

× × × × × 0 1 1 1 1 0 0 1

× × × × × × 0 1 1 1 0 0 0

× × × × × × × 0 1 0 1 1 1

× × × × × × × × 0 0 1 1 0

For Decimal to BCD Encoder using OR gates refer question no 5 page no 153

Q7) Describe the function of following pins for decoder IC:

a) Lamp Test, (b) Ripple Blanking Input, (c) Blanking Input (M 02)
Q7) With neat diagram explain the use of IC 7446 as BCD to seven segment
decoders to drive seven segment LED display.
Q7) Explain the working of BCD to seven segment decoder / driver with
diagram. (M 02, 05, 07, 09, 10, 12, 13, 15, 18, O 03, 04, 07, 08, 09)
Q7) Draw logic diagram of BCD to 7 segment Decoder/Driver. Explain its
important functions. (O13)
(3 Marks = 1 Mark diagram & Truth Table, 2 Marks for explanation)
(4Marks = 2 Marks diagram & Truth Table, 2 Marks for explanation)
Ans: IC 7447: - It is BCD to seven segment decoders. It accepts 4-bit binary coded
decimal and depends upon state of auxiliary input it decodes that number and fed
to 7 segment display. It is active low output decoder hence common anode display is
used. In this IC along with 4 BCD inputs it has some important pins.
 Pin No 3: - Lamp Test (LT) this is an active low input pin. If LT is = 0 then
decoder produces low voltage at all outputs terminal irrespective of BCD inputs.
In such a case all segments in the display glow. This test is useful to test the
working of decoder and display.
Pin No 4: - Ripple Blanking Output / Blanking Input (RBO / BI)
As output: - If 0 in the display is blanked then RBO goes low.
If 0 is not blanked, then output at this pin is high.
As input: - This pin is known as Blanking Input. If BI is low (0) then the display
is completely blanked. If BI is high (1) then circuit functions normally.
Pin No 5: - Ripple Blanking Input (RBI)
If RBI = 0 then in the display digit 0 is only blanked and only 1 to 9 numbers
are displayed.
If RBI = 1 then decoder functions normally and displays number from 0 to 9
BCD Input Segment Glows (Common Anode) Number
display
D C B A a B c d E F g

0 0 0 0 0 0 0 0 0 0 1 0

0 0 0 1 1 0 0 1 1 1 1 1

0 0 1 0 0 0 1 0 0 1 0 2

0 0 1 1 0 0 0 0 1 1 0 3

0 1 0 0 1 0 0 1 1 0 0 4

0 1 0 1 0 1 0 0 1 0 0 5

0 1 1 0 1 1 0 0 0 0 0 6

0 1 1 1 0 0 0 1 1 1 1 7

1 0 0 0 0 0 0 0 0 0 0 8

1 0 0 1 0 0 0 1 1 0 0 9

Q8) What is decoder? Explain BCD to decimal decoder with appropriate gates.
Q8) Explain the working of decimal to binary encoder by using 4 OR gates
with help of circuit diagram. (M13)
Q8) Draw logic diagram of one of ten decoder write its truth table. (M14)
(M 01, 04, 06, 07, 08, 09, 10, 11, 12, 16, 17 Oct 01, 04, 05, 08, 09, 13)
(3 Marks = 1 Mark diagram, 2 Marks for explanation)
(4Marks = 1 Mark for definition 1 Marks for dia., 2 Marks for explanation)
(3 Marks = 2 Mark diagram, 1 Marks for truth table)
Ans: - Decoder is the electronic circuit which converts digital data into decimal form
(original form). This circuit is nothing but DEMUX but there is no data inputs, only
BCD inputs which are applied as control bits. BCD to decimal decoder is also known
as 1 of 10 decoder because only one of the 10th outputs becomes high.
Logic diagram: - Truth Table: -

BCD Inputs Decimal

D C B A Output
0 0 0 0 Y0 =0
0 0 0 1 Y1=1
0 0 1 0 Y2=2
0 0 1 1 Y3=3
0 1 0 0 Y4=4
0 1 0 1 Y5=5
0 1 1 0 Y6=6
0 1 1 1 Y7=7
1 0 0 0 Y8=8
1 0 0 1 Y9=9

Working: -
Case 1) When DCBA = 0000: - In this case only 1st AND gate becomes active
because its all inputs are high, hence output of only 1 st gate becomes high which is
decimal number 0
Case 2) When DCBA = 0001: - In this 2nd AND gate becomes active and output of
this gate becomes high which is decimal number 1
Case 3) When DCBA = 0010: - In this case 3rd AND gate becomes active and output
of this gate becomes high which is decimal number 2.
This process continues and as per BCD input particular one of the AND gate
becomes active and gives high output which decimal equivalent of BCD number.
Q9) Write the difference between MUX and DEMUX. (O 03)
(3 Marks = 1 Marks for each difference)

Sr.No Multiplexer De multiplexer

1 It is the circuit which has many It is the circuit which has only one
inputs but only one output input but many output

2 Multiplexer means many into Demultiplexer means one into many.

one
 3 MUX is also known as Data DEMUX is known as Decoder
selector

Q10) Explain the procedure of combinational logic design using multiplexer

and state its advantages. (M16)
Q10) Write rules to design combinational logic circuit using Multiplexer and
Demultiplexer. Also state its limitations. (M17)
(3 Marks = 2 Marks for the procedure, 1 Mark for advantages)
Ans: - The procedure for design of combinational circuit is
1) Identify the decimal number corresponding to each min term in the expression.
The input lines corresponding to these numbers are to be connected to logic 1 level.
2) All other input lines are to be connected to logic 0 level.
3) The inputs are to be applied to select inputs.
Advantages are.
1) Simplification of logic expression is not required.
2) It minimizes the hardware (ICs).
3) Logic design is simplified.
Q10) Which type of multiplexer will be required to implement the following
expression. Draw the necessary diagram.
f(A, B, C) =  m(0,1,2,4,5) (M 05)
(3 Marks = 1 Mark explanation, 2 Marks for diagram)
Ans: - Data f (A, B, C) =  m(0,1,2,4,5)
ABC are variable i.e. control inputs. As there are three control inputs 8:1 MUX
is used because 23 = 8
In this case given input terminals has to be connected to output terminals
hence they are connected to high logic.

Q11) Implement the logic expression using a multiplexer IC which has

inverted inputs such as IC 74150.
f(A, B, C, D) =m(0,2,3,6,8,9,12,14) (M 06)
(3 Marks = 1 Mark explanation, 2 Marks for diagram)
Ans: - Data f (A, B, C, D) =  m (0,2,3,6,8,9,12,14)
ABCD are variable i.e. control inputs. As there are four control inputs 16:1 MUX
is used because 24 = 16
 In this case IC 74150 which has inverted input is used given input terminals
has to be connected to output terminals are connected to low logic.

Q12) Which type of multiplexer will be required to implement the following

expression? Draw necessary block diagram.
f(A, B, C ) =  m ( 0, 2, 3, 5, 7) (M02)
(3 Marks = 1 Mark explanation, 2 Marks for diagram)
Ans: - Data f (A, B, C) =  m(0,2,3,5,7)
ABC are variable i.e. control inputs. As there are three control inputs 8:1 MUX
is used because 23 = 8
In this case given input terminals has to be connected to output terminals
hence they are connected to high logic.

Q13) Implement the expression.

f(A, B, C,D) = M( 0,2,4,6,8,10,12,14) (O 06)
(3 Marks = 1 Mark explanation, 2 Marks for diagram)
Ans: - Data f (A, B, C, D) = M (0,2,4,6,8,10,12,14)
ABCD are variable i.e. control inputs. As there are four control inputs 16:1
MUX is used because 24 = 16
In this case given input terminals has to be connected to output terminals
hence they are connected to high logic.
Q14) Implement the expression.
f (A, B, C, D) =  m (1,2,6,7,10) using multiplexer. (O 05)
(3 Marks = 1 Mark explanation, 2 Marks for diagram)
Ans: - Data f (A, B, C, D) =  m (1,2,6,7,10)
ABCD are variable i.e. control inputs. As there are four control inputs 16:1
MUX is used because 24 = 16
In this case given input terminals has to be connected to output terminals
hence they are connected to high logic.

Q15) Implement the expression using 8:1 multiplexer.

f(A, B, C, D) = m( 2,4,6,7,9,10,11,12,15)
Ans: - Data f(A, B, C, D) =  m(1,2,6,7,10)
This question is out of the syllabus.
16) Implement the following multi output combinational logic circuit using
4:16 decoder.
F1 = m (1,2,4,7,8,11,12,13), F2= m (2,3,9,11), F3 = m (10,12,13,14)
(M 08, O 08)
(3 Marks = 1 Mark explanation, 2 Marks for diagram)
Ans: - Data F1 = m (1,2,4,7,8,11,12,13), F2= m (2,3,9,11), F3 = m (10,12,13,14)
As decoder used are active low output therefore NAND gates are used in the
output stage. NAND gate is used because it gives high output when any one input is
low. Therefore, input is connected to the one of the output terminals which is
maintained in the expression.

Q17) Implement the following multi output combinational logic circuit using
4:16 decoder.
F1 = m (2,3, 6,9,12), F2= m (4,8,12), F3 = m (5,10,13) (O 09)
(3 Marks = 1 Mark explanation, 2 Marks for diagram)
Ans: - Data F1 = m (2,3, 6,9,12), F2= m (4,8,12), F3 = m (5,10,13)
As decoder used are active low output therefore NAND gates are used in the
output stage. NAND gate is used because it gives high output when any one input is
low. Therefore, input is connected to the one of the output terminals which is
maintained in the expression.

Q18) Implement the following using De MUX.

F1 = m (1, 2, 4, 7), F2= m (2, 3) (M 06)
(3 Marks = 1 Mark explanation, 2 Marks for diagram)
Ans: - F1 = m (1, 2, 4, 7), F2= m (2, 3)
As decoder used are active low output therefore NAND gates are used in the
output stage. NAND gate is used because it gives high output when any one input is
low. Therefore, input is connected to the one of the output terminal which is
maintained in the expression.

Q19) Design 16:1 Mux using two 8:1 Mux and write truth table. (M 11)
(4Marks = 3 Marks for designing, 1Marks for truth table)
Ans: - In case of 8:1 Mux three control or select lines are used but in this circuit two
Mux are connected to get 16:1 Mux hence there should be four control lines. Control
line S3 is known as Strobe or Enable because this input makes one of the Mux enable
at a time, while other control line selects the one of the data input terminals and fed
that data to output terminal. When the strobe input is high then only the Mux is in
enable mode. The Mux 1 is in enable mode when strobe input is low it is because the
complement of strobe is connected to Mux 1 and when strobe input is high Mux 2 is
in enable mode. In this circuit as there are two output terminals OR gate is used to
convert two outputs into single output.
Logic Diagram: - Truth Table:-

Control Inputs Output

S3(Strobe) S2 S1 S0 Y

0 0 0 0 D0

0 0 0 1 D1

0 0 1 0 D2

0 0 1 1 D3

0 1 0 0 D4

0 1 0 1 D5

0 1 1 0 D6

0 1 1 1 D7

1 0 0 0 D8

1 0 0 1 D9
 1 0 1 0 D10

1 0 1 1 D11

1 1 0 0 D12

1 1 0 1 D13

1 1 1 0 D14

1 1 1 1 D15

Q20) Realize 4:1 multiplexer using NAND gates. NAND gates used should have
four inputs viz. Strobe, data, and two select Inputs.
Ans: - This question is out of syllabus.
Q21) Implement the expression using multiplexer.
f (A, B, C) = M (1,2,4,6,7) (M12)
(3 Marks = 1 .5 Mark explanation, 1.5 Marks for diagram)
Ans: - Data f(A,B,C) = M( 1,2,4,6,7)
ABC are variable i.e. control inputs. As there are three control inputs 8:1 MUX
is used because 23 = 8
In this case given input terminals has to be connected to output terminals
hence they are connected to high logic.

Q22) Implement the following combinational logic circuit using 3 to 8 line

Decoder F = M (1,3,5,7) (M13)
(3 Marks = 1.5 Mark explanation, 1.5 Marks for diagram)
Ans: - F = m (1, 3, 5, 7),
As decoder used are active low output therefore NAND gates are used in the
output stage. NAND gate is used because it gives high output when any one input is
low. Therefore, input is connected to the one of the output terminals which is
maintained in the expression.
Q23) Implement the following using 8:1 multiplexer. (M14)

A B C Y

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1

(3 Marks = 1 Mark explanation, 2 Marks for diagram)

Ans: From the given table it is clear that output is high for the inputs 2, 5, 6, 7 hence
the function is given.
Data f (A, B, C) =  m (2, 5, 6, 7)
ABC are variable i.e. control inputs. As there are three control inputs 8:1 MUX
is used because 23 = 8
In this case given input terminals has to be connected to output terminals
hence they are connected to high logic.

Q24) Implement the following equation using suitable decoder. (M14)

1) Y1 = A B C D + A B C D + A B C D + A B C D
2) Y2 = A B C D + A B C D + A B C D + A B C D
(4Marks = 1Marks for explanation, 3 Marks for designing,)
Ans: For the first equation we get function as F1 = m (7, 14, 6, 9) and for the
second equation it is F2= m (11, 12, 13, 6)
As the equation contains four variables 4:16 decoder (1:16 Demux) is used
As decoder used are active low output therefore NAND gates are used in the
output stage. NAND gate is used because it gives high output when any one input is
low. Therefore, input is connected to the one of the output terminal which is
maintained in the expression.
Q25) Implement the following multi out combinational logic circuit using 1:16
demultiplexer. (With active high output) (M16)
F1 = m (3,5,8,11,14)
F2 = m (2,4,6,10)
F3 = m (1,7,9,12,13)
Ans: - Data F1 = m (3,5,8,11,14), F2= m (2,4,6,10), F3 = m (1,7,9,12,13)
As decoder used are active high output therefore OR gates are used in the output
stage. OR gate is used because it gives high output when any one input is high.
Therefore, input is connected to the one of the output terminals which is maintained
in the expression.

Q26) Implement the following logic equation using Demultiplexer IC and

proper gates at the output (M17)

(4Marks = 1Marks for explanation, 3 Marks for designing,)

Ans: For the first equation we get function as F1 = m (1, 7, 3) and for the second
equation it is F2= m (2, 5, 0)
As the equation contains three variable 1:8 Demux is used
As decoder used are active low output therefore NAND gates are used in the
output stage. NAND gate is used because it gives high output when any one input is
low. Therefore, input is connected to the one of the output terminal which is
maintained in the expression.

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