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Home Assignment 3

The document discusses CPLD architecture and designing macro cells for Boolean equations. It also discusses constructing a macrocell for a sum of products logic function and explaining registered and non-registered output operation. The document further describes the operation of an AMD CPLD architecture and explains the working of an SRAM-based crosspoint switch matrix and Cypress FLASH 370 device technology.

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26 views1 page

Home Assignment 3

The document discusses CPLD architecture and designing macro cells for Boolean equations. It also discusses constructing a macrocell for a sum of products logic function and explaining registered and non-registered output operation. The document further describes the operation of an AMD CPLD architecture and explains the working of an SRAM-based crosspoint switch matrix and Cypress FLASH 370 device technology.

Uploaded by

mohansaikrna
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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1.

Sketch the architecture of CPLD and list its major blocks and design a macro cell for given
Boolean equation Y = AB’+BC+AC+AB’C+A’B’C.
2. Construct Macrocell for Y (A,B,C)= ∑m(1,2,3,6,7) SOP logic. Explain registered and non-registered
output operation.
3. Describe the operation of AMD Mach5 CPLD architecture with neat diagram?
4. Draw and explain the working principle of SRAM-based crosspoint switch matrix.
5. With the help of block diagram explain cypress FLASH 370 device technology?

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