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COE211 CH5 Part2

The document discusses analysis and design of sequential circuits. It covers representing state through equations, tables and diagrams, and analyzing circuits by considering all input and state combinations to determine the next state and outputs. Finite state machines are represented and two types - Mealy and Moore - are described based on how outputs are determined.

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20 views24 pages

COE211 CH5 Part2

The document discusses analysis and design of sequential circuits. It covers representing state through equations, tables and diagrams, and analyzing circuits by considering all input and state combinations to determine the next state and outputs. Finite state machines are represented and two types - Mealy and Moore - are described based on how outputs are determined.

Uploaded by

hm100hm100hm100
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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COE211: Digital Logic Design

CH5: Synchronous Sequential Logic


Part 2:
Sequential Circuits Analysis and Design
Analysis of Sequential Circuits
◼ Behavior of clocked sequential circuit determined by
◼ Inputs
◼ Outputs
◼ State of flip-flops
◼ Analysis process
◼ Consider all combinations of
◼ Inputs
◼ Flip-flop states
◼ Determine next state and output of circuit
◼ Concept of a Finite State Machine (FSM)
◼ Methods
◼ State equations
◼ State table
◼ State diagram
3/9/2020 COE211: Digital Logic Design 2
Example Circuit
◼ Sequential circuit
◼ Input: x
◼ Output: y
◼ Flip-flops:
◼ 2 D-type FFs
A and B
◼ When is y=1?
◼ Very difficult to answer
◼ Systematic analysis

necessary

3/9/2020 COE211: Digital Logic Design 3


State and Output Equations
◼ Circuit view FSM view

3/9/2020 COE211: Digital Logic Design 4


State and Output Equations
◼ State equation specifies next state
◼ Function of current state and inputs
◼ State equation for flip-flops:
◼ A(t+1) = A(t) x(t) + B(t) x(t)
◼ B(t+1) = A’(t) x(t)
◼ Output expression:
◼ y(t) = (A(t) + B(t)) x’(t)
◼ Simplified notation:
◼ A(t+1) = A x + B x
◼ B(t+1) = A’ x
◼ y = (A+B) x’
◼ How to derive these Eqs?

3/9/2020 COE211: Digital Logic Design 5


Flip-flop Input Equations
◼ Similar to state equations
◼ Specifies type of flip-flop used
◼ In case of D-FFs

they are the


same as state equations.
◼ This circuit:
◼ DA = A x + B x
◼ DB = A’ x
◼ y = (A + B) x’

3/9/2020 COE211: Digital Logic Design 6


State Table
◼ What needs to be considered in table?
◼ Inputs
◼ State of flip-flops
◼ Next state of flip-flops
◼ Outputs
◼ How many entries in state table?
◼ n inputs
◼ m FFs
◼ Total of 2m+n entries
◼ For every entry
◼ Determine flip-flop change by input and current state
◼ State equation
◼ Determine the output (Output equation)

3/9/2020 COE211: Digital Logic Design 7


State Table

3/9/2020 COE211: Digital Logic Design 8


State Table

3/9/2020 COE211: Digital Logic Design 9


State Diagram
◼ State transitions represented as graph
◼ Vertices indicate states
◼ Edges represent transitions
◼ Edge annotation: “x/y” meaning input is x and output is y

3/9/2020 COE211: Digital Logic Design 10


Analysis Example 2

◼ Equation:
(state equation)
(flip-flop equation)

◼ State table:

◼ State diagram:
◼ Note: no outputs

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Analysis with JK FF

◼ Flip-flop Input Equations

3/9/2020 COE211: Digital Logic Design 12


Analysis with JK FF
◼ State Equations

3/9/2020 COE211: Digital Logic Design 13


Analysis with JK FF
◼ State Equations

◼ State table:
◼ State Diagram:

3/9/2020 COE211: Digital Logic Design 14


Finite State Machines
◼ State diagrams are representations of Finite State Machines (FSM)
◼ Two flavors of FSMs:
◼ Mealy FSM
◼ Moore FSM
◼ Difference:
◼ How output is determined
◼ Mealy FSM
◼ Output depends on input and state
◼ Output is not synchronized with clock
◼ can have temporarily unstable output
◼ Moore FSM
◼ Output depends only on state

3/9/2020 COE211: Digital Logic Design 15


Mealy vs Moore Machine
◼ Mealy Machine
◼ Output is a function of
current state and present input

◼ Moore Machine
◼ Output is a function of
current state only

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Design of Sequential Circuits

3/9/2020 COE211: Digital Logic Design 17


Design of Sequential Circuits
1. Derive state diagram from description
Reduce number of states if necessary (will NOT be covered)

2. Assign binary values to states

3. Obtain binary coded state table (transition table)

4. Choose type of flip-flops

5. Derive flip-flop input equations and output equations

6. Draw logic diagram

3/9/2020 COE211: Digital Logic Design 18


Example 1: Sequence Detector
◼ Circuit specification:
◼ Design a circuit that outputs a 1 when three consecutive 1s
have been applied to input, and 0 otherwise.”
◼ Step 1: derive state diagram
◼ What should a state represent?
◼ E.g., “number of 1’s seen so far”
◼ Moore or Mealy FSM?
◼ Both possible
◼ Chose Moore to simplify diagram
◼ State diagram:
◼ State S0: zero 1s detected
◼ State S1: one 1 detected
◼ State S2: two 1s detected
◼ State S3: three 1s detected

3/9/2020 COE211: Digital Logic Design 19


Example 1: Sequence Detector
◼ Step 2: state assignment
◼ Two flip-flops
◼ Binary state coding

◼ Step 3: Binary coded


state table
◼ Name flip-flops A and B

◼ Step 4: Choose type of


flip-flops
◼ E.g., D flip-flop
◼ Characteristic equation: Q(t+1)=DQ

3/9/2020 COE211: Digital Logic Design 20


Example 1: Sequence Detector
◼ Step 6: derive flip-flop input equations and output equation
◼ Use state table

3/9/2020 COE211: Digital Logic Design 21


Example 1: Sequence Detector
◼ Step 6b: minimize equations

3/9/2020 COE211: Digital Logic Design 22


Example 1: Sequence Detector

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Summary
● Flip flops contain state information
● State can be represented in several forms:
● State equations
● State table
● State diagram
● Possible to convert between these forms
● Circuits with states can take on a finite set of values
● Finite state machine
● Two types of “machines”
● Mealy machine
● Moore machine

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