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DLD Lab 3

The document discusses implementing a Boolean expression using logic gates. It provides an example Boolean expression F1 = x + y'z and shows its truth table. It also discusses verifying Demorgan's laws by providing truth tables.

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sanya.rizwan0912
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0% found this document useful (0 votes)
43 views4 pages

DLD Lab 3

The document discusses implementing a Boolean expression using logic gates. It provides an example Boolean expression F1 = x + y'z and shows its truth table. It also discusses verifying Demorgan's laws by providing truth tables.

Uploaded by

sanya.rizwan0912
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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FATIMA JINNAH WOMEN UNIVERSITY

Digital Logic Design

Lab Assignment No: 03


Submitted by:
Sania Rizwan
(2023-BCS-079)
Submitted to:
Mr.Majid Shafique

Department of Computer Science.


FATIMA JINNAH WOMEN UNIVERSITY
RAWALPINDI
www.fjwu.edu
BCS Digital Logic Design

EXPERIMENT # 3

IMPLEMENTATION OF BOOLEAN EXPRESSION THROUGH


LOGIC GATES & ALSO VERIFICATION OF DEMORGAN’S
LAW

1. Material Required:
● Logic Trainer
● Connecting Wires
● Power Supply
● Components: 4081, 4049, 4071
2. Procedure:
Consider as an example for the following Boolean function:
F1 =x + y’z
The function F1 is equal to 1 if x is equal to 1 or if both y’ and z are equal to 1, F1 is equal to 0
otherwise. The complement operation dictates that when y’=1 then y=0. Therefore, we can say
that F1=1 if x=1 or if y=0 and z=1. A Boolean function expresses the logical expression for all
possible values of the variables.
A Boolean function can be represented in a truth table. A truth table is a lot of combinations of
1’s and 0’s assigned to the binary variables and a column that shows the value of the function for
each binary combination. The number of rows in the truth table is 2n, where n is the number of
variables in the function. The binary combinations for the truth table are obtained from binary
numbers by counting from 0 through 2n-1. Following table shows the truth table for the function
F1.
BCS Digital Logic Design

Truth Table for F1

Input X Input Y Input Z Output F1

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

Gate implementation of F1=x+y’z

3. Verify Demorgan’s Theorem

Demorgan’s law can be stated in terms of logic terms, which is the 1st law states that,
(x+y)’= x’y’ Theorem 1
And the second law state that
(xy)’= x’+ y’ Theorem 2

a) Truth Table that verifies the above given Theorem 1,


BCS Digital Logic Design

b) Truth Table that verifies the above given Theorem 2

Input X Input Y (xy)’ X’+Y’

0 0 1 1

0 1 1 1

1 0 1 1

1 1 0 0

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