Flag register of 8086 microprocessor

Flag register in 8085 microprocessor

The Flag register is a Special Purpose Register. Depending upon the value of
result after any arithmetic and logical operation the flag bits become set (1) or
reset (0).

Figure – Format of flag register

There are total 9 flags in 8086 and the flag register is divided into two types:
(a) Status Flags – There are 6 flag registers in 8086 microprocessor which
become set(1) or reset(0) depending upon condition after either 8-bit or 16-bit
operation. These flags are conditional/status flags. 5 of these flags are same as
in case of 8085 microprocessor and their working is also same as in 8085
microprocessor. The sixth one is the overflow flag.
The 6 status flags are:

1. Sign Flag (S)

2. Zero Flag (Z)
3. Auxiliary Cary Flag (AC)
4. Parity Flag (P)
5. Carry Flag (CY)
These first five flags are defined here
6. Overflow Flag (O) – This flag will be set (1) if the result of a signed operation is
too large to fit in the number of bits available to represent it, otherwise reset
(0). After any operation, if D[6] generates any carry and passes to D[7] OR if
D[6] does not generates carry but D[7] generates, overflow flag becomes set,

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 i.e., 1. If D[6] and D[7] both generate carry or both do not generate any carry,
then overflow flag becomes reset, i.e., 0.
Example: On adding bytes 100 + 50 (result is not in range -128…127), so
overflow flag will set.
MOV AL, 50 (50 is 01010000 which is positive)

MOV BL, 32 (32 is 00110010 which is positive)

ADD AL, BL (82 is 10000010 which is negative)

Overflow flag became set as we added 2 +ve numbers and we got a -ve
number.

(b) Control Flags – The control flags enable or disable certain operations of the
microprocessor. There are 3 control flags in 8086 microprocessor and these are:
1. Directional Flag (D) – This flag is specifically used in string instructions.
If directional flag is set (1), then access the string data from higher memory
location towards lower memory location.
If directional flag is reset (0), then access the string data from lower memory
location towards higher memory location.
2. Interrupt Flag (I) – This flag is for interrupts.
If interrupt flag is set (1), the microprocessor will recognize interrupt requests
from the peripherals.
If interrupt flag is reset (0), the microprocessor will not recognize any interrupt
requests and will ignore them.
3. Trap Flag (T) – This flag is used for on-chip debugging. Setting trap flag puts
the microprocessor into single step mode for debugging. In single stepping,
the microprocessor executes a instruction and enters into single step ISR.
If trap flag is set (1), the CPU automatically generates an internal interrupt
after each instruction, allowing a program to be inspected as it executes
instruction by instruction.
If trap flag is reset (0), no function is performed.
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Addressing modes in 8086
microprocessor
Addressing modes, Addressing modes in 8085 microprocessor
The way of specifying data to be operated by an instruction is known
as addressing modes. This specifies that the given data is an immediate data or
an address. It also specifies whether the given operand is register or register
pair.
Types of addressing modes:

1. Register mode – In this type of addressing mode both the operands are
registers.
Example:
2. MOV AX, BX

3. XOR AX, DX

ADD AL, BL

4. Immediate mode – In this type of addressing mode the source operand is a 8

bit or 16 bit data. Destination operand can never be immediate data.
Example:
5. MOV AX, 2000

6. MOV CL, 0A

7. ADD AL, 45

AND AX, 0000

Note that to initialize the value of segment register an register is required.

MOV AX, 2000

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 MOV CS, AX

8. Displacement or direct mode – In this type of addressing mode the effective

address is directly given in the instruction as displacement.
Example:
9. MOV AX, [DISP]

MOV AX, [0500]

10. Register indirect mode – In this addressing mode the effective address is in
SI, DI or BX.
Example: Physical Address = Segment Address + Effective Address
11. MOV AX, [DI]

12. ADD AL, [BX]

MOV AX, [SI]

13. Based indexed mode – In this the effective address is sum of base register
and index register.
14. Base register: BX, BP

Index register: SI, DI

The physical memory address is calculated according to the base register.

Example:

MOV AL, [BP+SI]

MOV AX, [BX+DI]

15. Indexed mode – In this type of addressing mode the effective address is
sum of index register and displacement.
Example:
16. MOV AX, [SI+2000]

MOV AL, [DI+3000]

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17. Based mode – In this the effective address is the sum of base register and
displacement.
Example:
MOV AL, [BP+ 0100]

18. Based indexed displacement mode – In this type of addressing mode the
effective address is the sum of index register, base register and displacement.
Example:
MOV AL, [SI+BP+2000]

19. String mode – This addressing mode is related to string instructions. In this
the value of SI and DI are auto incremented and decremented depending
upon the value of directional flag.
Example:
20. MOVS B

MOVS W

21. Input/Output mode – This addressing mode is related with input output
operations.
Example:
22. IN A, 45

OUT A, 50

23. Relative mode –

In this the effective address is calculated with reference to instruction pointer.
Example:
24. JNZ 8 bit address

IP=IP+8 bit address

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Memory Segmentation in 8086
Microprocessor
Segmentation
Segmentation is the process in which the main memory of the computer is
logically divided into different segments and each segment has its own base
address. It is basically used to enhance the speed of execution of the computer
system, so that the processor is able to fetch and execute the data from the
memory easily and fast.
Need for Segmentation –
The Bus Interface Unit (BIU) contains four 16 bit special purpose registers
(mentioned below) called as Segment Registers.
 Code segment register (CS): is used for addressing memory location in the
code segment of the memory, where the executable program is stored.
 Data segment register (DS): points to the data segment of the memory where
the data is stored.
 Extra Segment Register (ES): also refers to a segment in the memory which is
another data segment in the memory.
 Stack Segment Register (SS): is used for addressing stack segment of the
memory. The stack segment is that segment of memory which is used to store
stack data.
The number of address lines in 8086 is 20, 8086 BIU will send 20bit address, so
as to access one of the 1MB memory locations. The four segment registers
actually contain the upper 16 bits of the starting addresses of the four memory
segments of 64 KB each with which the 8086 is working at that instant of time. A
segment is a logical unit of memory that may be up to 64 kilobytes long. Each
segment is made up of contiguous memory locations. It is an independent,

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separately addressable unit. Starting address will always be changing. It will not
be fixed.

Note that the 8086 does not work the whole 1MB memory at any given time.
However, it works only with four 64KB segments within the whole 1MB memory.

Below is the one way of positioning four 64 kilobyte segments within the 1M byte
memory space of an 8086.

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Types Of Segmentation –
1. Overlapping Segment – A segment starts at a particular address and its
maximum size can go up to 64kilobytes. But if another segment starts along

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 with this 64kilobytes location of the first segment, then the two are said to
be Overlapping Segment.
2. Non-Overlapped Segment – A segment starts at a particular address and its
maximum size can go up to 64kilobytes. But if another segment starts before
this 64kilobytes location of the first segment, then the two segments are said
to be Non-Overlapped Segment.
Rules of Segmentation Segmentation process follows some rules as follows:
 The starting address of a segment should be such that it can be evenly
divided by 16.
 Minimum size of a segment can be 16 bytes and the maximum can be 64 kB.

Advantages of the Segmentation The main advantages of segmentation are as

follows:
 It provides a powerful memory management mechanism.
 Data related or stack related operations can be performed in
different segments.
 Code related operation can be done in separate code segments.
 It allows to processes to easily share data.
 It allows to extend the address ability of the processor, i.e.
segmentation allows the use of 16 bit registers to give an addressing
capability of 1 Megabytes. Without segmentation, it would require 20
bit registers.
 It is possible to enhance the memory size of code data or stack
segments beyond 64 KB by allotting more than one segment for
each area.

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General purpose registers in 8086
microprocessor
General purpose registers are used to store temporary data within the
microprocessor. There are 8 general purpose registers in 8086 microprocessor.

1. AX – This is the accumulator. It is of 16 bits and is divided into two 8-bit

registers AH and AL to also perform 8-bit instructions.
It is generally used for arithmetical and logical instructions but in 8086
microprocessor it is not mandatory to have accumulator as the destination
operand.
Example:

ADD AX, AX (AX = AX + AX)

2. BX – This is the base register. It is of 16 bits and is divided into two 8-bit
registers BH and BL to also perform 8-bit instructions.
It is used to store the value of the offset.
3. Example:

MOV BL, [500] (BL = 500H)

4. CX – This is the counter register. It is of 16 bits and is divided into two 8-

bit registers CH and CL to also perform 8-bit instructions.
It is used in looping and rotation.
Example:

MOV CX, 0005

LOOP

5. DX – This is the data register. It is of 16 bits and is divided into two 8-bit
registers DH and DL to also perform 8-bit instructions.
It is used in multiplication an input/output port addressing.
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 Example:

MUL BX (DX, AX = AX * BX)

6. SP – This is the stack pointer. It is of 16 bits.

It points to the topmost item of the stack. If the stack is empty the stack
pointer will be (FFFE)H. It’s offset address relative to stack segment.
7. BP – This is the base pointer. It is of 16 bits.
It is primary used in accessing parameters passed by the stack. It’s offset
address relative to stack segment.
8. SI – This is the source index register. It is of 16 bits.
It is used in the pointer addressing of data and as a source in some string
related operations. It’s offset is relative to data segment.
9. DI – This is the destination index register. It is of 16 bits.
It is used in the pointer addressing of data and as a destination in some
string related operations. It’s offset is relative to extra segment.

Interrupts in 8086 microprocessor

An interrupt is a condition that halts the microprocessor temporarily to work on a
different task and then return to its previous task. Interrupt is an event or signal
that request to attention of CPU. This halt allows peripheral devices to access the
microprocessor.

Whenever an interrupt occurs the processor completes the execution of the

current instruction and starts the execution of an Interrupt Service Routine (ISR)
or Interrupt Handler. ISR is a program that tells the processor what to do when
the interrupt occurs. After the execution of ISR, control returns back to the main
routine where it was interrupted.

In 8086 microprocessor following tasks are performed when microprocessor

encounters an interrupt:

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1. The value of flag register is pushed into the stack. It means that first the value
of SP (Stack Pointer) is decremented by 2 then the value of flag register is
pushed to the memory address of stack segment.
2. The value of starting memory address of CS (Code Segment) is pushed into
the stack.
3. The value of IP (Instruction Pointer) is pushed into the stack.
4. IP is loaded from word location (Interrupt type) * 04.
5. CS is loaded from the next word location.
6. Interrupt and Trap flag are reset to 0.
The different types of interrupts present in 8086 microprocessor are given by:

1. Hardware Interrupts –
Hardware interrupts are those interrupts which are caused by any peripheral
device by sending a signal through a specified pin to the microprocessor.
There are two hardware interrupts in 8086 microprocessor. They are:
 (A) NMI (Non Maskable Interrupt) – It is a single pin non maskable hardware
interrupt which cannot be disabled. It is the highest priority interrupt in
8086 microprocessor. After its execution, this interrupt generates a TYPE 2
interrupt. IP is loaded from word location 00008 H and CS is loaded from
the word location 0000A H.
 (B) INTR (Interrupt Request) – It provides a single interrupt request and is
activated by I/O port. This interrupt can be masked or delayed. It is a level
triggered interrupt. It can receive any interrupt type, so the value of IP and
CS will change on the interrupt type received.
2. Software Interrupts – These are instructions that are inserted within the
program to generate interrupts. There are 256 software interrupts in 8086
microprocessor. The instructions are of the format INT type where type
ranges from 00 to FF. The starting address ranges from 00000 H to 003FF H.
These are 2 byte instructions. IP is loaded from type * 04 H and CS is loaded

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 from the next address give by (type * 04) + 02 H. Some important software
interrupts are:
 (A) TYPE 0 corresponds to division by zero(0).
 (B) TYPE 1 is used for single step execution for debugging of program.
 (C) TYPE 2 represents NMI and is used in power failure conditions.
 (D) TYPE 3 represents a break-point interrupt.
 (E) TYPE 4 is the overflow interrupt.

Pin diagram of 8085 microprocessor

Pin diagram of 8085 microprocessor is as given below:

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1. Address Bus and Data Bus:
The address bus is a group of sixteen lines i.e A0-A15. The address bus is
unidirectional, i.e., bits flow in one direction from the microprocessor unit to the
peripheral devices and uses the high order address bus.
2. Control and Status Signals:

 ALE – It is an Address Latch Enable signal. It goes high during first T state of
a machine cycle and enables the lower 8-bits of the address, if its value is 1
otherwise data bus is activated.

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 IO/M’ – It is a status signal which determines whether the address is for input-
output or memory. When it is high(1) the address on the address bus is for
input-output devices. When it is low(0) the address on the address bus is for
the memory.

 SO, S1 – These are status signals. They distinguish the various types of
operations such as halt, reading, instruction fetching or writing.

IO/M’ S1 S0 Data Bus Status

0 1 1 Opcode fetch

0 1 0 Memory read

0 0 1 Memory write

1 1 0 I/O read

1 0 1 I/O write

1 1 1 Interrupt acknowledge

0 0 0 Halt

 RD’ – It is a signal to control READ operation. When it is low the selected

memory or input-output device is read.

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 WR’ – It is a signal to control WRITE operation. When it goes low the data on
the data bus is written into the selected memory or I/O location.

 READY – It senses whether a peripheral is ready to transfer data or not. If

READY is high(1) the peripheral is ready. If it is low(0) the microprocessor
waits till it goes high. It is useful for interfacing low speed devices.

3. Power Supply and Clock Frequency:

 Vcc – +5v power supply

 Vss – Ground Reference

 XI, X2 – A crystal is connected at these two pins. The frequency is internally

divided by two, therefore, to operate a system at 3MHZ the crystal should
have frequency of 6MHZ.

 CLK (OUT) – This signal can be used as the system clock for other devices.

4. Interrupts and Peripheral Initiated Signals:

The 8085 has five interrupt signals that can be used to interrupt a program
execution.
(i) INTR
(ii) RST 7.5
(iii) RST 6.5
(iv) RST 5.5
(v) TRAP

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The microprocessor acknowledges Interrupt Request by INTA’ signal. In addition
to Interrupts, there are three externally initiated signals namely RESET, HOLD
and READY. To respond to HOLD request, it has one signal called HLDA.

 INTR – It is an interrupt request signal.

 INTA’ – It is an interrupt acknowledgement sent by the microprocessor after

INTR is received.

5. Reset Signals:

 RESET IN’ – When the signal on this pin is low(0), the program-counter is set
to zero, the buses are tristated and the microprocessor unit is reset.

 RESET OUT – This signal indicates that the MPU is being reset. The signal
can be used to reset other devices.

6. DMA Signals:

 HOLD – It indicates that another device is requesting the use of the address
and data bus. Having received HOLD request the microprocessor relinquishes
the use of the buses as soon as the current machine cycle is completed.
Internal processing may continue. After the removal of the HOLD signal the
processor regains the bus.

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 HLDA – It is a signal which indicates that the hold request has been received
after the removal of a HOLD request, the HLDA goes low.

7. Serial I/O Ports:

Serial transmission in 8085 is implemented by the two signals,

 SID and SOD – SID is a data line for serial input where as SOD is a data line
for serial output.

Architecture of 8086
A Microprocessor is an Integrated Circuit with all the functions of a CPU however,
it cannot be used stand alone since unlike a microcontroller it has no memory or
peripherals.
8086 does not have a RAM or ROM inside it. However, it has internal registers for
storing intermediate and final results and interfaces with memory located outside
it through the System Bus.
In case of 8086, it is a 16-bit Integer processor in a 40 pin, Dual Inline Packaged
IC.
The size of the internal registers(present within the chip) indicate how much
information the processor can operate on at a time (in this case 16-bit registers)
and how it moves data around internally within the chip, sometimes also referred
to as the internal data bus.
8086 provides the programmer with 14 internal registers, each 16 bits or 2 Bytes
wide.

Memory segmentation:
 To increase execution speed and fetching speed, 8086 segments the
memory.

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 It’s 20 bit address bus can address 1MB of memory, it segments it into 16
64kB segments.
 8086 works only with four 64KB segments within the whole 1MB memory.
The internal architecture of Intel 8086 is divided into 2 units: The Bus Interface
Unit (BIU), and The Execution Unit (EU). These are explained as following
below.

1. The Bus Interface Unit (BIU):

It provides the interface of 8086 to external memory and I/O devices via the
System Bus. It performs various machine cycles such as memory read, I/O read
etc. to transfer data between memory and I/O devices.

BIU performs the following functions-

 It generates the 20 bit physical address for memory access.

 It fetches instructions from the memory.
 It transfers data to and from the memory and I/O.
 Maintains the 6 byte prefetch instruction queue(supports pipelining).
BIU mainly contains the 4 Segment registers, the Instruction Pointer, a prefetch
queue and an Address Generation Circuit.
Instruction Pointer (IP):
 It is a 16 bit register. It holds offset of the next instructions in the Code
Segment.
 IP is incremented after every instruction byte is fetched.
 IP gets a new value whenever a branch instruction occurs.
 CS is multiplied by 10H to give the 20 bit physical address of the Code
Segment.
 Address of the next instruction is calculated as CS x 10H + IP.

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Example:
CS = 4321H IP = 1000H

then CS x 10H = 43210H + offset = 44210H

This is the address of the instruction.

Code Segment register:

CS holds the base address for the Code Segment. All programs are stored in the
Code Segment and accessed via the IP.
Data Segment register:
DS holds the base address for the Data Segment.
Stack Segment register:
SS holds the base address for the Stack Segment.
Extra Segment register:
ES holds the base address for the Extra Segment.
Address Generation Circuit:
 The BIU has a Physical Address Generation Circuit.
 It generates the 20 bit physical address using Segment and Offset addresses
using the formula:

Physical Address

= Segment Address x 10H + Offset Address

6 Byte Pre-fetch Queue:

 It is a 6 byte queue (FIFO).
 Fetching the next instruction (by BIU from CS) while executing the current
instruction is called pipelining.
 Gets flushed whenever a branch instruction occurs.

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2. The Execution Unit (EU):

The main components of the EU are General purpose registers, the ALU, Special
purpose registers, Instruction Register and Instruction Decoder and the
Flag/Status Register.

1. Fetches instructions from the Queue in BIU, decodes and executes arithmetic
and logic operations using the ALU.
2. Sends control signals for internal data transfer operations within the
microprocessor.
3. Sends request signals to the BIU to access the external module.
4. It operates with respect to T-states (clock cycles) and not machine cycles.
8086 has four 16 bit general purpose registers AX, BX, CX and DX. Store
intermediate values during execution. Each of these have two 8 bit parts (higher
and lower).
 AX register:
It holds operands and results during multiplication and division operations.
Also an accumulator during String operations.

 BX register:
It holds the memory address (offset address) in indirect addressing modes.

 CX register:
It holds count for instructions like loop, rotate, shift and string operations.

 DX register:
It is used with AX to hold 32 bit values during multiplication and division.

Arithmetic Logic Unit (16 bit):

Performs 8 and 16 bit arithmetic and logic operations.
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Special purpose registers (16-bit):
 Stack Pointer:
Points to Stack top. Stack is in Stack Segment, used during instructions like
PUSH, POP, CALL, RET etc.
 Base Pointer:
BP can hold offset address of any location in the stack segment. It is used to
access random locations of the stack.
 Source Index:
It holds offset address in Data Segment during string operations.
 Destination Index:
It holds offset address in Extra Segment during string operations.
Instruction Register and Instruction Decoder:
The EU fetches an opcode from the queue into the instruction register. The
instruction decoder decodes it and sends the information to the control circuit for
execution.
Flag/Status register (16 bits):
It has 9 flags that help change or recognize the state of the microprocessor.
6 Status flags:

1. carry flag(CF)
2. parity flag(PF)
3. auxiliary carry flag(AF)
4. zero flag(Z)
5. sign flag(S)
6. overflow flag (O)
Status flags are updated after every arithmetic and logic operation.

3 Control flags:
1. trap flag(TF)

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2. interrupt flag(IF)
3. direction flag(DF)
These flags can be set or reset using control instructions like CLC, STC, CLD,
STD, CLI, STI, etc.

The Control flags are used to control certain operations.

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