Sir Syed CASE Institute of Technology, Islamabad

EE2401 Digital Logic Design

Lab No. 2

Name of Student: Roll No. :

Date of Experiment: Report submitted on:

Marks obtained: Instructor’s Signature:

Instructor: Engr. Safdar Munir

 Familiarization with various Logic Gate ics and verification
of their truth-tables

1. Objectives
Having completed this experiment, you will be able to:
1. Understand the different options, facilities and provisions provided on the Digital Logic
Trainer.
2. Recognize the different logic gates ICs.
3. Verify the truth tables of basic logic gates.

2. Basic Information
A logic gate is an elementary building block of a digital circuit. Most logic gates have two inputs
and one output. At any given moment, every terminal is in one of the two logic states, i.e.
LOW/FALSE/ (0) or HIGH/TRUE/ (1), represented by different voltage levels. The logic state of a
terminal changes as the circuit processes data. In most logic gates, the LOW state corresponds to
zero volts (0 V), while the HIHG state corresponds to positive five volts (+5 V). There are three
basic logic gates, i.e. NOT-gate, AND-gate and OR-gate. A combination on these basic gates has
given birth to some advanced gates which are widely used, e.g. NAND-gate, NOR-gate, EX-OR
(Exclusive OR) gate and EX-NOR (Exclusive NOR) gate.
Logic Gate Symbols and Truth-Tables
NOT Gate
A NOT gate has only one input and one output. The output Q is true when the
input A is NOT true, i.e. the output is the inverse of the input, mathematically we write it as
Q = NOT (A). A NOT gate is also called an inverter.

A Q Input A Output Q
* A Q
0 1
1 0

Traditional symbol IEC symbol* Truth Table

IEC = International Electro technical Commission

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 AND Gate:
A basic AND gate has two inputs and one output. The output Q is true if both
the inputs A AND B are simultaneously true, mathematically this is stated as Q = A AND B.
Some AND gates can have more than two inputs, in that case the output is true when ALL the
inputs are true.

Input
Input A Output Q
A Q A Q B
0 0 0
0 1 0
B B 1 0 0
1 1 1

Traditional
IEC symbol Truth Table
symbol

OR Gate:
A basic OR gate also has two inputs and one output. The output Q is true if
either of the two inputs A OR B is true (or when both of them are true), i.e. Q = A OR B. Some
OR gates can have more than two inputs, in that case, the output is true if at least one input is
true.

A Q Input A Input B Output Q

A Q
0 0 0
0 1 1
1 0 1
B B 1 1 1

Traditional symbol IEC symbol Truth Table

NAND Gate (NAND = Not AND)

NAND gate is basically an AND gate but with the output inverted, as shown by
the 'o' on the output of the AND gate symbol. Thus the output is true if both the inputs A AND
B are NOT true simultaneously, in equation form we can write it as Q = NOT (A AND B).
Like AND gates, some NAND gates can have more than two inputs, in that case, the output is
true if NOT ALL the inputs are true.

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 A Q A Q Input A Input B Output Q
0 0 1
0 1 1
1 0 1
B B 1 1 0

Traditional symbol IEC symbol Truth Table

NOR Gate (NOR = Not OR)

NOR gate is basically an OR gate but with the output inverted, as shown by the
'o' on the output of the OR gate symbol. Thus the output is true if neither of the inputs A OR B
is true, in equation form we can write it as Q = NOT (A OR B). Like OR gates, some NOR
gates can have more than two inputs, in that case, the output is true if NONE of the inputs is
true.

Input A Input B Output Q

A Q A Q
0 0 1
0 1 0
1 0 0
B B 1 1 0

Traditional symbol IEC symbol Truth Table

EX-OR (Exclusive-OR) Gate
A basic EX-OR gate also has two inputs and one output. The output Q is true if
either of the two inputs A OR B (but not both) is true, mathematically it is written as
Q = (A AND NOT(B)) OR (B AND NOT(A)). Hence it is like an OR gate but excluding the
case when both the inputs are true simultaneously, in other words the output is true if the inputs
are DIFFERENT. Advanced EX-OR gates can have more than two inputs, in that case, the
output is true only when an ODD number of inputs are true.

Input A Input B Output Q

A Q A Q
0 0 0
0 1 1
1 0 1
B B 1 1 0

Traditional symbol IEC symbol Truth Table

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 EX-NOR (Exclusive-NOR) Gate
This is equivalent to an EX-OR gate with the output inverted, as shown by the 'o' on
the output of the Ex-OR gate symbol. Thus the output Q is true if both the inputs A and B are
the SAME, i.e. either both are true or both are false, in equation form this is described as
Q = (A AND B) OR (NOT(A) AND NOT(B)). Like EX-OR, EX-NOR gates can have more
than two inputs, in that case, the output is true when an EVEN number of inputs are true.

Input Input Output

Q A B Q
A Q
0 0 1
0 1 0
B 1 0 0
B
1 1 1

Traditional symbol IEC symbol Truth Table

Universal Gates
The NAND and NOR gates can be said to be universal gates, since combinations of them can be
used to accomplish any of the basic operations and can, thus produce an inverter, an OR gate or
an AND gate. The non-inverting gates do not have this versatility since they can't produce an
inversion.

3. Experimental Work
Material Required
1. Logic Trainer
2. Components (ICs):
74LS00 (NAND Gate)
74LS04 (NOT Gate
74LS08 (AND Gate)
74LS32 (OR Gate)
74LS80 (EX-OR Gate)
74LS02 (XNOR Gate)
3. Connecting wires

Procedure
1. Connect the logic Trainer to 220V Ac power supply.
2. Turn on the Trainer and verify the DC voltage by using voltmeter, it should be almost
5.0 volts (specifically between 4.75V – 5.25V). If not consult the Lab Supervisor.
3. Install the IC chip under experiment, on the trainer’s breadboard.
4. Connect the +Vcc (pin # 14) and Ground (pin # 7) pins of the IC to +5V and Gnd supply
of the trainer board. (Consult Fig 3.2 for the pin diagrams of the IC under test)
5. Make the appropriate circuit connections as shown in Fig 3.1(a, b, c, d, e and f) for the
particular IC under test. Use the trainer’s logic switches to provide “0” and “1” at the
inputs and use the trainer’s LEDs to display the output. Note that there are more than one
gate in each IC chip, so you can use any one of these gates to make your connections
(Consult Fig 3.2 for the pin numbers corresponding to each gate in that particular chip).

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 6. Record your observations according to Table 3.1and verify whether the output conform
to the truth tables of each gate.
7. Repeat steps 3-6 for each of the IC chips.
8. Write down your observations & comments at the end, as per your concept developed
during this experimental work.

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 Circuit Diagrams

Fig 2.1 (a) NOT Gate (74LS04)

Fig 2.1 (b) AND Gate (74LS08) Fig 2.1 (c) NAND Gate (74LS00)

Use power supply +5v instead of Cell

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 AND GATE OR GATE

NAND GATE NOR GATE

74386

EX-OR GATE NOT GATE

Fig 2.2: Pin Diagrams of IC’s

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 Experimental Results
Input A Input B Output Q
Input A Output Q
0 0
0
0 1
1
1 0
NOT GATE 1 1
OR GATE
Input A Input B Output Q Input A Input B Output Q
0 0 0 0
0 1 0 1
1 0 1 0
1 1 1 1

AND GATE NOR GATE

Input A Input B Output Q Input A Input B Output Q

0 0 0 0
0 1 0 1
1 0 1 0
1 1 1 1

NAND GATE EX-OR GATE

Table 2.1: Truth Tables of Different Logic Gates

4. In Case of Trouble

 Check the power supply for correct voltage.

 Check the Vcc (pin # 14) and Ground (pin # 7) connections of the IC under test.
 Check all the wire connections and remove any possible breaks.
 Check the IC under test using truth table.

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