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Analog Electronics Tutorial 3

The document contains 10 questions about analyzing analog circuits involving differential pairs, common source stages, and other MOSFET configurations. It provides relevant device parameters and asks students to calculate values like voltage gain, current sharing, output swing given various inputs.

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78 views3 pages

Analog Electronics Tutorial 3

The document contains 10 questions about analyzing analog circuits involving differential pairs, common source stages, and other MOSFET configurations. It provides relevant device parameters and asks students to calculate values like voltage gain, current sharing, output swing given various inputs.

Uploaded by

mbathula
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Indian Institute of Technology Roorkee

Tutorial 3
ECN-205: Analog Circuits
Instructor: Prof. Sourajeet Roy/ Prof. Sudeb Dasgupta

Question 1: The circuit of Fig. shown below, uses a resistor rather than a current source to
𝑊
define a tail current of 1 𝑚𝐴. Assume that ( ) = 25/0.5, 𝜇𝑛 𝐶𝑜𝑥 = 50 𝜇𝐴/𝑉 2 , 𝑉𝑇𝐻 =
𝐿 1,2
0.6 𝑉, 𝜆 = 𝛾 = 0, and 𝑉𝐷𝐷 = 3 𝑉.

a. What is the required input CM voltage for which 𝑅𝑆𝑆 sustains 0.5 𝑉?
b. Calculate 𝑅𝐷 for a differential gain of 5.
c. What happens at the output if the input CM level is 50 𝑚𝑉 higher than the value
calculated in (a)?

Question 2: Design an NMOS differential pair for a voltage gain of 5 and a power budget of
2 𝑚𝑊 subject to the condition that the stage following the differential pair requires an input
CM level of at least 1.6 𝑉. Assume 𝜇𝑛 𝐶𝑜𝑥 = 100 𝜇𝐴/𝑉 2 , 𝜆 = 0, and 𝑉𝐷𝐷 = 1.8 𝑉

Question 3: The common-source stage and the differential pair shown in Fig. below
incorporate equal load resistors. If the two circuits are designed for the same voltage gain and
the same supply voltage, discuss the choice of
a. transistor dimensions for a given power budget,
b. power dissipation for given transistor dimensions.

Question 4: A MOS differential pair is driven with an input CM level of 1.6 𝑉. If 𝐼𝑆𝑆 =
0.5 𝑚𝐴, 𝑉𝑇𝐻 = 0.5 𝑉, and 𝑉𝐷𝐷 = 1.8 𝑉, what is the maximum allowable load resistance?
Question 5: Determine the voltage gain of the circuit shown in Fig. below.

Question 6: Assuming 𝜆 = 0, calculate the voltage gain of the topology shown in Fig. below.

𝑊
Question 7: In the circuit of Fig. shown below, ( ) = 50/0.5 and 𝐼𝑆𝑆 = 0.5 𝑚𝐴.
𝐿 1,2

a. What is the maximum allowable output voltage swing if 𝑉𝑖𝑛,𝐶𝑀 = 1.2 𝑉 ?


b. What is the voltage gain under this condition?

Question 8: A differential pair uses input NMOS devices with 𝑊/𝐿 = 50/0.5 and a tail
current of 1 𝑚𝐴.

a. What is the equilibrium overdrive voltage of each transistor?


b. How is the tail current shared between the two sides if 𝑉𝑖𝑛1 − 𝑉𝑖𝑛2 = 50 𝑚𝐴?
c. What is the equivalent 𝐺𝑚 under this condition?
d. For what value of 𝑉𝑖𝑛1 − 𝑉𝑖𝑛2 does the 𝐺𝑚 drop by 10%? By 90%?
Question 9: In the circuit of Fig. shown below assume that 𝐼𝑆𝑆 = 1 𝑚𝐴 and 𝑊/𝐿 = 50/0.5
for all the transistors.
a. Determine the voltage gain.
𝐼
b. Calculate 𝑉𝑏 such that 𝐼𝐷5 = 𝐼𝐷6 = 0.8 ( 𝑆𝑆 ).
2
c. If 𝐼𝑆𝑆 requires a minimum voltage of 0.4 𝑉, what is the maximum differential output
swing?

Question 10: Due to a manufacturing error, in the circuit of Fig. shown below, 𝑀2 is twice as
wide as 𝑀1 . Calculate the small-signal gain if the dc levels of 𝑉𝑖𝑛1 and 𝑉𝑖𝑛2 are equal.

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