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Analog Electronics Tutorial 1

This document contains 17 questions related to analog circuits and MOSFET devices. The questions cover topics like calculating drain current for an NMOS device given various voltages, determining the threshold voltage that makes drain current zero, calculating charge in an NMOS channel, and determining device widths needed to achieve certain resistances. Other questions involve MOS capacitor depletion capacitance, matching of drain currents between devices, and plotting capacitance versus oxide thickness for different materials.

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0% found this document useful (0 votes)
45 views

Analog Electronics Tutorial 1

This document contains 17 questions related to analog circuits and MOSFET devices. The questions cover topics like calculating drain current for an NMOS device given various voltages, determining the threshold voltage that makes drain current zero, calculating charge in an NMOS channel, and determining device widths needed to achieve certain resistances. Other questions involve MOS capacitor depletion capacitance, matching of drain currents between devices, and plotting capacitance versus oxide thickness for different materials.

Uploaded by

mbathula
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Indian Institute of Technology Roorkee

Tutorial 1
ECN-205: Analog Circuits
Instructors: Prof Sourajeet Roy/ Prof. Sudeb Dasgupta

Question 1: For a n-MOSFET device, following data are given as (𝑉𝑆 , 𝑉𝐵 = 0), 𝑉𝐺 = 1𝑉.
a. For 𝑉𝐷𝑆 = 0.2 𝑉 and 𝑉𝐷𝑆 = 5𝑉, find the values of 𝐼𝐷 respectively?
b. What will be the body biasing voltage which will make the value of 𝐼𝐷 to be zero.
1
𝑉𝑇𝑁0 = 0.7 𝑉, 𝐾 = 40 µ𝐴/𝑉 2 , 𝛾 = 0.4 𝑉 2 , 2𝜙𝐹 = 0.6 𝑉, 𝑊 = 10 𝜇𝑚, 𝐿 = 1 𝜇𝑚.
Question 2: Calculate the total charge stored in the channel of an NMOS transistor having
𝐶𝑂𝑋 = 6 𝑓𝐹/𝜇𝑚2 , 𝐿 = 0.25 𝜇𝑚, and 𝑊 = 2.5 𝜇𝑚, and operated at 𝑉𝑂𝑉 = 0.5 𝑉 and 𝑉𝐷𝑆 =
0 𝑉.
Question 3: An n-channel MOS device in a technology for which oxide thickness is 20 𝑛𝑚,
minimum channel length is 1 𝜇𝑚, and 𝑉𝑡 = 0.8 𝑉 operates in the triode region, with small 𝑉𝐷𝑆
and with the gate−source voltage in the range 0 𝑉 to +5 𝑉. What device width is needed to
ensure that the minimum available resistance is 1 𝐾Ω ?
Question 4: With the knowledge that 𝜇𝑃 = 0.4 𝜇𝑁 , what must be the relative width of n-
channel and p-channel devices if they are to have equal drain currents when operated in the
saturation mode with overdrive voltages of the same magnitude?
Question 5: Consider an n-channel MOSFET with 𝑡𝑂𝑋 = 9 𝑛𝑚, 𝜇𝑁 = 500 𝑐𝑚2 /𝑉𝑠, 𝑉𝑡 =
0.7 𝑉, and 𝑊/𝐿 = 10. Find the drain current in the following cases:
a. 𝑉𝐺𝑆 = 5 𝑉 and 𝑉𝐷𝑆 = 1 𝑉
b. 𝑉𝐺𝑆 = 2 𝑉 and 𝑉𝐷𝑆 = 1.3 𝑉
c. 𝑉𝐺𝑆 = 5 𝑉 and 𝑉𝐷𝑆 = 0.2 𝑉
d. 𝑉𝐺𝑆 = 𝑉𝐷𝑆 = 5 𝑉
Question 6: An NMOS transistor having 𝑉𝑡 = 1 𝑉 is operated in the triode region with small
𝑉𝐷𝑆 . With 𝑉𝐺𝑆 = 1.5 𝑉, it is found to have a resistance 𝑟𝐷𝑆 of 1 𝐾Ω. What value of 𝑉𝐺𝑆 is
required to obtain 𝑟𝐷𝑆 = 200 𝛺 ? Find the corresponding resistance values obtained with a
device having twice the value of 𝑊.
Question 7: Consider a N-MOSFET as shown in figure below. What will be the change in ID
𝑊
if VDD changes from 3.3 to 1.8V. Consider VTH = 0.5V and 𝜇𝑁 𝐶𝑂𝑋 𝐿 = 100 µ𝐴/𝑉 2
Question 8: Design the circuit to obtain a current 𝐼𝐷 of 0.4 𝑚𝐴. Find the value required for 𝑅
𝜇𝐴
and find the dc voltage 𝑉𝐷 . Let the NMOS transistor have 𝑉𝑡 = 2 𝑉, 𝜇𝑁 𝐶𝑂𝑋 = 200 𝑉 2 , 𝐿 =
10𝜇𝑚 and 𝑊 = 100 𝜇𝑚. Neglect channel length modulation effect.

Question 9: The oxide capacitance 𝐶𝑂𝑋 of a MOSCAP in depletion is 0.5 𝑛𝐹/𝑐𝑚2 and
depletion region capacitance 𝐶𝐷𝑅 = 0.12 𝑛𝐹/𝑐𝑚2 . Calculate the total depletion capacitance of
the MOSCAP?
Question 10: Figure below shows two NMOS transistors operating in saturation at equal 𝑉𝐺𝑆
and 𝑉𝐷𝑆 . If the two devices are matched except for a maximum possible mismatch in their W/L
ratios of 2%, what is the maximum resulting mismatch in the drain currents?

Question 11: The threshold voltage of a MOS is given by:


𝑡𝑜𝑥 𝑄𝑑
𝑉𝑡ℎ = 2𝜙𝐹 +
𝜖𝑜𝑥
2
Assume that the value of 2𝜙𝐹 = 3 𝑉𝑡ℎ (Neglect all non-linearities). If the oxide thickness 𝑡𝑜𝑥
increase by 20%, what is the change in the threshold voltage Δ𝑉𝑡ℎ ? (Assume nominal value of
𝑉𝑡ℎ = 1 V).
Question 12: Calculate the total charge stored in the channel of an NMOS transistor having
𝐶𝑂𝑋 = 25 𝑓𝐹/𝜇𝑚2 , 𝐿 = 65 𝑛𝑚, and 𝑊 = 650 𝑛𝑚, and operated at 𝑉𝑂𝑉 = 0.15 𝑉 and
𝑉𝐷𝑆 = 0𝑉.
Question 13: An n-channel MOS device in a technology for which oxide thickness is 4 𝑛𝑚,
minimum channel length is 0.18𝜇𝑚, 𝑘𝑛′ = 400 𝜇𝐴/𝑉 2 , and 𝑉𝑡 = 0.5𝑉 operates in the triode
region, with small 𝑉𝐷𝑆 and with the gate–source voltage in the range 0 𝑉 to +1.8 𝑉. What
device width is needed to ensure that the minimum available resistance is 1 𝐾Ω ?
Question 14: Consider the CMOS circuit shown in the figure below (substrates are connected
𝑊
to their respective sources). The gate width (𝑊) to gate length (𝐿) ratios ( 𝐿 ) of the transistors
are as shown. Both the transistors have the same gate oxide capacitance per unit area. For the
pMOSFET, the threshold voltage is −1 𝑉 and the mobility of holes is 40 𝑐𝑚2 /𝑉𝑠. For the
nMOSFET, the threshold voltage is 1 𝑉 and the mobility of electrons is 300 𝑐𝑚2 /𝑉𝑠. Find the
steady state output voltage 𝑉𝑂 .

Question 15: For a particular IC-fabrication process, the transconductance parameter 𝑘𝑛′ =
400𝜇𝐴/𝑉 2 , and 𝑉𝑡 = 0.5𝑉. In an application in which 𝑉𝐺𝑠 = 𝑉𝐷𝑆 = 𝑉𝑠𝑢𝑝𝑝𝑙𝑦 = 1.8𝑉, a drain
current of 2 𝑚𝐴 is required of a device of minimum length of 0.18𝜇𝑚. What value of
channel width must the design use?
Question 16: Plot the graph for capacitance vs thickness of oxide layer for a varying thickness
(from 2𝑛𝑚 to 7𝑛𝑚) for a fixed material of insulating layer of oxide of 𝑆𝑖𝑂2.
Question 17: Plot the graph for capacitance vs thickness of oxide layer for a varying thickness
(from 2𝑛𝑚 to 7𝑛𝑚) for a new material of insulating layer of oxide of 𝐻𝑓𝑂2. Also Comment
and compare with the graph obtained in question no. 16.

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