Using Cadence Virtuoso

Opamp Design
Introduction
This document gives a review and collection of the online available resources that
help in using Cadence to design an operational amplifier and reporting its various
parameters. The methods have originally been given for a 2 stage amplifier, though
they are applicable to other opamp designs as well.

In a general design, the following steps take place:

● Decide your specifications.

● Design the circuit accordingly (Size the devices, with help of equations)
● Simulate the circuit
● Note various parameters, and retune the sizes in order to meet specifications

There are various tools available, out of which one of them is Cadence Virtuoso. This
document gives the steps to use Cadence in order to measure various parameters of
amplifiers. Please note, that these are available online across various resources, and
this is a collection of all those at one place.

The following are covered in this document:

I. Operational Amplifier Design Specifications

II. Opamp Design Resources
III. Measuring Gain, Unity Gain Bandwidth and Phase Margin
IV. Measuring ICMR
V. Measuring CMRR
VI. Measuring Offset
VII. Pole Zero Analysis
VIII. Measuring Power Consumption
IX. Measuring PSRR
X. Measuring Slew Rate

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 I. Opamp Design Specifications
For an opamp, the following specifications need to be chosen:

● Load capacitance
● ICMR (+)
● ICMR (-)
● Gain (preferably > 60dB)
● Unity Gain Bandwidth
● Phase Margin (generally > 60 degrees)
● Slew Rate (preferably > 10V/us)
● CMRR
● PSRR (not discussed much in today’s designs)
● Power

2 stage opamp

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 II. Opamp Design Resources
Here (https://youtu.be/JBiMdEb6t-Q) is a playlist created by Hafeez KT, who goes
through all the design steps required to design a 2 stage operational amplifier. The 9
steps are as follows:

1. Decide Length of devices

2. Decide Cc (compensation capacitor) 𝐶𝑐 ≥ 0. 22 * 𝐶
𝐿

3. Decide I5 from Slew Rate. 𝑆𝑅 = 𝐼5

𝐶𝑐

4. Find sizes of M1, M2 (depends on Gain Bandwidth and Cc)

a. 𝑔𝑚 = (𝑈𝑛𝑖𝑡𝑦 𝐺𝑎𝑖𝑛 𝐵𝑎𝑛𝑑𝑤𝑖𝑑𝑡ℎ) * 𝐶𝑐 * 2π
1
𝑔𝑚2
b. (𝑊/𝐿) =
1,2 µ *𝐶𝑜𝑥*𝐼5
𝑛

5. Find sizes of M3, M4 (depends on ICMR(+) )

a. µ𝑝 * 𝐶𝑜𝑥 * (𝑊/𝐿)3,4 = 2*𝐼3
+2
[𝑉𝑑𝑑 − |𝑉𝑡ℎ𝑝| + (𝑉𝑡ℎ) − 𝐼𝐶𝑀𝑅 ]
𝑀1

6. Find size of M5 (depends on ICMR(-) )

− 2*𝐼𝐷1
a. 𝑉 ≤ 𝐼𝐶𝑀𝑅 − − (𝑉𝑡ℎ)
𝐷𝑆(𝑠𝑎𝑡 𝑀5) µ𝑛𝐶𝑜𝑥(𝑊/𝐿)1 𝑀1(𝑚𝑎𝑥)

b. (𝑊/𝐿) =
2*𝐼𝐷5
2
5 µ 𝐶𝑜𝑥(𝑉 )
𝑛 𝐷𝑆 𝑠𝑎𝑡

7. Design of M6 (decides Phase Margin largely)

a. 𝑔𝑚4 = (µ𝑝𝐶𝑜𝑥) * (𝑊/𝐿)4 * 2𝐼𝐷4
b. (𝑊/𝐿) = (𝑊/𝐿) *
𝑔𝑚6
6 4 𝑔𝑚4

8. Design of I6
a. 𝐼 = 𝐼 * (𝑊/𝐿)6
6 4 (𝑊/𝐿)4

9. Design of M7
a. (𝑊/𝐿) = 𝐼7 * (𝑊/𝐿)
7 𝐼5 5

These are the necessary steps which are required to decide the sizes of the opamp on
a preliminary basis. But these aren’t sufficient. A lot of insight is required by the
designer to get the circuit working at desired specifications.

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Reference: P.E. Allen and D.R. Holberg, “CMOS Operational Amplifiers,” in CMOS Analog
Circuit Design. 3rd ed. New Delhi: Oxford University Press, 2017, ch. 6, pp. 261-352.

III. Measuring Gain, Unity Gain Bandwidth, Phase Margin

In order to measure gain, give a common mode supply to the positive input, say Vcm
(say 0.8 V for 65nm technology). Now, to the negative input, give a voltage supply of
(Vcm + acm), where acm being a small signal voltage (say 20mV).

Follow these steps:

1. Launch ADE L.
2. Make sure the
voltages to rails
(Vdd and Vss) are
supplied from the
Stimuli Window.
3. Go to Analyses
4. Choose dc analysis.
Check Save DC
Operating Point.
This is to check

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 later, whether all devices are in saturation!
5. Again press Analyses. Choose ac analysis
6. Give sufficient frequency range (depending on design parameters)
7. Go to Artist Kit, Setup Corners. Choose all typical, and no for variations. Save
Scenario and click on Save Model File.

8. Now, run the simulation. Click on Results, Print, DC Operating Points. Click on
each transistor one by one. You’ll get the operating points of the transistor.
Find region. If it’s 2, well and good, as 2 signifies saturation, else, you need to
bring it to saturation. The other regions are (0 → cutoff, 1 → linear, 2 →
saturation, 3 → subthreshold). Check for all transistors, all should be in
saturation.
9. Now, Go to Results in the
ADE L window, Direct Plot,
AC Gain and Phase. The tool
will bring you to the
schematic window. Select
the output wire, and then
the input on which the ac
small signal was given, (in
our case, the negative

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 input). A plot will be displayed.
10. Split the plots. In the gain plot, note the value of the gain until it’s horizontal,
i.e. until it is in the bandwidth range. This is the open loop gain. (You can use
Create Graph Label (after right click), to note the value of the gain on the
graph itself)
11. Click on the gain plot (with the vertical axis in dB), go to Markers (in the top
bar), click on Create Marker. Choose Position, by YMode, and enter 0. Press OK.
Your Unity Gain bandwidth is available to you.
12. Now, click on phase plot. Again Go to markers, Choose position as by Xmode,
and enter the unity gain bandwidth noted in previous step. (enter 30M, for
30MHz bandwidth). Press OK. The phase available to you at this point is the
phase margin.
13. Make sure to change the background of the plot as white, (a black background
is nearly invisible when projected :/ ) Go to Graph (top bar), Properties,
change color to white. Great!
14. Now, you’re free to take screenshots.

Reference: “Design of two stage operational amplifier (opamp) part 8 (simulation in

cadence)” by Hafeez KT. Available: https://youtu.be/dTBUeugPxjE

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IV. Measuring ICMR (Input Common Mode Range)
One can follow two ways to be sure about the ICMR.

1) Checking saturation
a) Set the Common Mode voltage to ICMR(+)
b) Run the DC and AC analysis.
c) Check the DC Operating Points (From Results → Print → DC Operating
Points) for each transistor
d) All transistors should be in saturation. If not, then probably, the design is
not working on targeted ICMR, and you may have to check on a reduced
value.
e) Repeat the above for ICMR(-)
2) Noticing gain, bandwidth and phase margin for the extreme values. If these are
satisfied for ICMR(-) and ICMR(+), then we can be assured that they’ll be
satisfied for all the middle values as well.

Note: In order to check the ICMR ranges, one can also do Parametric analysis. The
steps for the same are as follows:

1. Change the voltage source that was supplying common mode voltages to both
inputs, to a variable, say vcm.
2. Now, in the ADE L window, go to Variables, Copy From Cellview.
3. Go to Tools → Parametric Analysis. Add the variable vcm. Add appropriate
values to From and To, and Step Mode (preferably Linear Steps) and apt Step
Size depending on accuracy you want. Click on Run.
4. Again, do the direct plot of AC Gain and Phase, all the simulations are
available. Depending on the gain targetted, one can easily the Input Common
Mode Range from here :)

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V. Measuring CMRR (Common Mode Rejection Ratio)
We know that,
𝐶𝑀𝑅𝑅 = 20𝑙𝑜𝑔 ( 𝐶𝑜𝑚𝑚𝑜𝑛
𝐷𝑖𝑓𝑓𝑒𝑟𝑒𝑛𝑡𝑖𝑎𝑙 𝐺𝑎𝑖𝑛 ) = 20 𝑙𝑜𝑔 (𝑑𝑖𝑓𝑓𝑒𝑟𝑒𝑛𝑡𝑖𝑎𝑙 𝑔𝑎𝑖𝑛) − 20𝑙𝑜𝑔(𝑐𝑜𝑚𝑚𝑜𝑛 𝑚𝑜𝑑𝑒 𝑔𝑎𝑖𝑛)
𝑀𝑜𝑑𝑒
𝐺𝑎𝑖𝑛

We want the amplifier to amplify the differential signal and hence, a high CMRR is
necessary.

The CMRR can be measured through the following steps:

1. Here, both inputs shall be given the same input.

2. As done previously, make a (dc + acm) input, and connect it to both the inputs.
3. Do ac analysis.
4. Go to Results → Direct Plot → AC dB20. The window of schematic will appear.
Click on the output node. And press Escape.
5. The window with a plot will appear. This plot is of common mode gain.

For the opamp in consideration, differential mode gain is given by Ad = 44dB, and
Acm = -38dB

Therefore, CMRR = Ad - (Acm) = 44 - (-38) = 82 dB

Reference: “CMRR & Power dissipation simulaiton.” by Virbhadra Rathod. Available:

https://youtu.be/tbPKHq36zL4

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VI. Measuring Offset
The offset of the opamp can be measured as follows:

1. Operate the opamp in unity gain mode, i.e. connect the negative terminal to
the output.
2. Give some voltage at the +ve terminal (can be dc as well)
3. Now, select Transient Analysis in the Analyses option, and set an appropriate
time, say 1us.
4. In the ADE L window, go to Outputs on top bar, choose To be Plotted, and select
the output node, and the +ve input node.
5. Run the simulation.
6. Here, the output should be of the same value of the source which was
connected at the positive terminal of the opamp. Hence, the difference gives
the offset value.

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VII. Pole Zero Analysis
For the stability of the amplifier, it is necessary that all the poles lie in the left half
plane. The pole zero analysis can help us analyse the real time poles. It can also help
in visualizing the impact of various compensation techniques, such as Cc, Nulling
Resistor (Rz) on the stability of the opamp.

The steps for the pole zero analysis are as follows:

1. For this analysis, it is necessary that the input is provided by an input voltage
source.
2. Click on Analyses in the ADE L window, Choose pz.
3. Now, you need to choose the Positive Output Node. Click on Select, and choose
the output node.
4. For the negative output node, if you have a double ended output, then the
other output needs to be chosen. Else, ground node will be selected.
5. Choose the input voltage source (can be dc or ac, doesn’t matter)
6. Press OK.
7. Run the simulation, the poles and zeros shall come in the results window. Note,
that all poles should have their real part as negative. The imaginary part is not
to be worried about. If there is even a single pole with the real part as
positive, then the amplifier is not stable.

VIII. Measuring Power Consumption*

The power consumption can be calculated as follows:

1. Remove the Vdd pin, and replace it by a voltage source, with supply voltage.
2. Do a DC analysis.
3. Go to Results → Print → DC Operating Points, select the voltage source giving
Vdd.
4. The window shows both the current flowing through this source, and also the
power. This is the power consumption by the amplifier.

*Reference: “CMRR & Power dissipation simulation.” by Virbhadra Rathod. Available:

https://youtu.be/tbPKHq36zL4

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IX. Measuring PSRR (Power Supply Rejection Ratio)
In order to measure the PSRR, follow the following steps:

1. Operate the opamp in the unity gain mode, shorting the output with the
negative voltage source.
2. Connect a small perturbation to the supply voltage, say an ac voltage of 20mV.
3. Now, do the ac analysis of the circuit.
4. Click on Results → Direct Plot → AC dB20
5. Click on output node, and press escape.
6. The value obtained is 1/PSRR, which is the reason why it’s in negative.
7. Hence, PSRR = -ve of the value obtained on the curve. Notice, the PSRR
decreases as the frequency nears the unity gain bandwidth.

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X. Measuring Slew Rate
The slew rate for the opamp can be measured as follows:

1. Operate the opamp in the unity gain mode, i.e. short the negative input and
the output.
2. Give a pulse input at the positive input. Since this opamp is built in 65nm
technology, a pulse is given from 200mV to 1.2V, with a period of say 500ns.
3. Here, the transient analysis is done, and the output is plotted.
4. The rising slope and the falling slope need to be calculated.
5. The rising slope can be calculated as the slope of the line between the 20% of
Vdd, and 80% of Vdd points.
6. On similar lines, the falling slope can be calculated.

Reference: “Slew Rate Simulation” by Virbhadra Rathod. Available:

https://youtu.be/yGcSgpLBZDM

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