ELE3075

Microelectronic Circuits2

Chapter 10
Differential Amplifiers
Fundamentals of Microelectronics

Ickhyun Song
Assistant Professor
Department of Electronic Engineering
Hanyang University
Ickhyun Song 1
10.1 General Considerations (1)
• Single-Stage Amplifier
- VCC contains a ripple from rectification that leaks to the output
- The output signal will be the sum of the amplified input signal and the VCC ripple

Ickhyun Song 2
10.1 General Considerations (2)
• Supply Ripple Rejection
- Since both node X and Y contain the ripple, their difference will be free of ripple
- It is possible to eliminate the ripple from the “net” output

v X  Av vin  vr
vY  vr
v X  vY  Av vin
Ickhyun Song 3
10.1 General Considerations (3)
• Common Inputs
- Signals cannot be applied in phase to the inputs of a differential amplifier, since the
outputs will also be in phase, producing zero differential output
- The circuit will generate zero at the output

v X  Av vin  vr
vY  Av vin  vr
v X  vY  0

Ickhyun Song 4
10.1 General Considerations (4)
• Differential Inputs
- When the inputs are applied differentially, the outputs are 180° out of phase; enhancing
each other when sensed differentially
- The output has no ripple from VCC, but it contains the amplified input signal

v X  Av vin  vr
vY   Av vin  vr
v X  vY  2 Av vin

Ickhyun Song 5
10.1 General Considerations (5)
• Differential Signals
- A pair of differential signals can be generated by a transformer
- Differential signals have the property that they share the same average value to ground
and are equal in magnitude but opposite in phase

Ickhyun Song 6
10.1 General Considerations (6)
• Single-Ended vs. Differential Signals

Ickhyun Song 7
10.1 General Considerations (7)
• Differential Pair
- With the addition of a tail current, the circuits above operate as an elegant, yet robust
differential pair

Ickhyun Song 8
10.3 MOS Differential Pair (1)
• Qualitative Analysis
- Regarding common-mode response, MOS differential pair produces zero differential
output as VCM changes
- The equilibrium overdrive voltage is defined as the overdrive voltage seen by M1 and M2
when both of them carry a current of ISS/2

I SS
V X  VY  VDD  RD
2
I SS
VGS  VTH equil 
W
 n Cox
L

Ickhyun Song 9
10.3 MOS Differential Pair (2)
• Qualitative Analysis
- In order to maintain M1 and M2 in saturation, the common-mode output voltage cannot fall
below the value above
- This value usually limits voltage gain

I SS
VDD  RD  VCM  VTH
2

Ickhyun Song 10
10.3 MOS Differential Pair (3)
• Differential Response
- The sum of two MOSFET currents is equivalent to ISS
- When the differential voltage is large enough, only one MOSFET carries ISS

Ickhyun Song 11
10.3 MOS Differential Pair (4)
• Small-Signal Response
- MOS differential pair exhibits a “virtual” ground node
- Small signal gain is the same as the single stage CS amplifier

Δ𝐼𝐷1 = 𝑔𝑚 (Δ𝑉 − Δ𝑉𝑃 )

VP  0
Av   g m RD

Ickhyun Song 12
10.3 MOS Differential Pair (5)
• Example 10.16
- Design an NMOS differential pair for a voltage gain of 5 and a power budget of 2 mW
subject to the condition that the stage following the differential pair requires an input CM
level of at least 1.6 V. Assume μnCox = 100 μA/V2, λ = 0, and VDD = 1.8V.

Ickhyun Song 13
10.3 MOS Differential Pair (6)
• Example 10.18
- The common-source stage and the differential pair incorporate equal load resistors. If the
two circuits are designed for the same voltage gain and the same supply voltage, discuss
the choice of (a) transistor dimensions for a given power budget, (b) power dissipation for
given transistor dimensions.

Ickhyun Song 14
10.3 MOS Differential Pair (7)
• Large-Signal Analysis
- What is the input and output characteristics of the MOS pair?
- There exists a finite differential input voltage that completely steers the tail current from
one transistor to the other
- This value is known as the maximum differential input voltage

  n Cox Vin1  V in 2 
1 W 4 I SS
I D1  I D 2  Vin1  Vin 2 
2

2 L W
 n Cox
L

Vin1  Vin 2 max

Ickhyun Song 15
10.3 MOS Differential Pair (8)
• Small-Signal Analysis
- When the input differential signal is small compared to 4ISS/μnCox(W/L), the output
differential current is linearly proportional to it, and small-signal model can be applied
- Node P will not move for small input signals and the concept of half circuit can be used to
calculate the gain

Ickhyun Song 16
10.3 MOS Differential Pair (9)
• Example 10.22
- Determine the voltage gain of the circuit shown in Fig. 10.34(a). Assume λ ≠ 0.

Ickhyun Song 17
10.3 MOS Differential Pair (10)
• Example 10.23
- Assuming λ = 0, compute the voltage gain of the circuit.

Ickhyun Song 18
10.3 MOS Differential Pair (11)
• Example 10.24
- Assuming λ = 0, calculate the voltage gain of the topology.

Ickhyun Song 19
10.4 Cascode Differential Amplifiers (1)
• Cascode Stage
- A pair of M3 and M4 are added in series with M1 and M2, respectively
- Drawback: Limited common-mode range

Av   g m1rO 3 g m 3 rO1

Ickhyun Song 20
10.4 Cascode Differential Amplifiers (2)
• MOS Telescopic Cascode
- PMOS cascode stage is used as a load instead of the current source

Av   g m1  g m 3 rO 3 rO1  || ( g m 5 rO 5 rO 7 )
Ickhyun Song 21
10.4 Cascode Differential Amplifiers (3)
• Example 10.26
- Due to a manufacturing defect, two equal parasitic resistances, R1 and R2, have appeared
as shown below. Compute the voltage gain of the circuit.

Ickhyun Song 22
10.5 Common-Mode Rejection (1)
• Effect of Finite Tail Impedance
- If the tail current source is not ideal, then when an input CM voltage is applied, the
currents in M1 and M2 and hence output CM voltage will change

𝑅𝐷
Δ𝑉𝑜𝑢𝑡,𝐶𝑀 2
=−
Δ𝑉𝑖𝑛,𝐶𝑀 1
+ 𝑅𝐸𝐸
2𝑔𝑚
𝑅𝐷
=−
1/𝑔𝑚 + 2𝑅𝐸𝐸

Ickhyun Song 23
10.5 Common-Mode Rejection (2)
• Input CM Noise with Ideal Tail Current
- The differential output voltages for both cases (when RSS is infinite or not) are the same
- Thus, for small input CM noise, the differential pair is not affected

Ickhyun Song 24
10.5 Common-Mode Rejection (3)
• Effect of Asymmetries
- If finite tail impedance and asymmetry are both present, then the differential output signal
will be corrupted
- The imperfection of load resistor mismatch leads to a difference between Vout 1 and Vout2
- Common mode to differential mode (DM) conversion: ACM−DM

Vout RD

VCM 1 / g m  2 REE

Δ𝑅𝐷
𝐴𝐶𝑀−𝐷𝑀 ≈
2𝑅𝐸𝐸

Ickhyun Song 25
10.5 Common-Mode Rejection (4)
• Common-Mode Rejection Ratio (CMRR)
- While undesirable, CM-DM conversion cannot be simply quantified by ACM−DM
- If the circuit provides a large differential gain, ADM, then the relative corruption at the output
is small
- CMRR defines the ratio of wanted amplified differential input signal to unwanted converted
input common-mode noise that appears at the output

ADM
CMRR 
ACM  DM

Ickhyun Song 26
10.6 Differential Pair with Active Load (1)
• Differential to Single-Ended Conversion
- Many circuits require a differential to single-ended conversion
- Sensing the output at node Y with respect to ground?
- Active load performs the conversion with no loss of gain

Ickhyun Song 27
10.6 Differential Pair with Active Load (2)
• 10.6.1 Qualitative Analysis
- With current mirror used as the load, the signal current produced by the Q1 can be
replicated onto Q4
- This type of load is different from the conventional “static load” and is known as an “active
load”
- Active load responds to the input signal and enhances the single-ended output, whereas
the load on the right does not

Ickhyun Song 28
10.6 Differential Pair with Active Load (3)
• 10.6.1 Qualitative Analysis
- The input differential pair decreases the current drawn from RL by Δ I and the active load
pushes an extra ΔI into RL by current mirror action; these effects enhance each other.

Ickhyun Song 29
10.6 Differential Pair with Active Load (4)
• 10.6.1 Qualitative Analysis
- Similar to its bipolar counterpart, MOS differential pair can also use active load to enhance
its single-ended output
- Because of the vastly different resistance magnitude at the drains of M1 and M2, the
voltage swings at these two nodes are different and therefore, node P cannot be viewed
as a virtual ground

Ickhyun Song 30
10.6 Differential Pair with Active Load (5)
• 10.6.2 Quantitative Analysis
- Approach I: Use of a complete small-signal model of the amplifier

Ickhyun Song 31
10.6 Differential Pair with Active Load (6)
• 10.6.2 Quantitative Analysis
- Approach II: Decompose the circuit into sections

Ickhyun Song 32
 Summary
• Chapter 10
- Differential signals
- Large-/Small-signal operation of a differential amplifier
- Cascode differential amplifier
- Common-mode rejection ratio
- Differential amplifier using active load

Ickhyun Song 33