This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2014.2323075, IEEE Transactions on Power Electronics

A High Efficiency DC-DC Boost Converter for a Miniaturized

Microbial Fuel Cell
Xu Zhang, Hao Ren, Soonjae Pyo, Jae-Ik Lee, Jongbaeg Kim, and Junseok Chae, IEEE senior member
Abstract the efficiency needs to be compromised [8]. Unlike switching
This paper presents a high efficiency DC-DC boost capacitor converter, the efficiency of switching inductor
converter to interface a miniaturized 50 µL Microbial Fuel converter is limited by its parasitics. Thus, the switching
Cell (MFC) having 1 cm2 vertically aligned carbon nanotube inductor converter is favorable to be optimized to boost the
(VACNT) anode and 1 cm2 Cr/Au cathode. Geobacteraceae- input voltage with high conversion efficiency.
enriched mixed bacterial culture in growth medium and 100 Still, designing high conversion efficiency switching
mM buffered ferricyanide solutions are used as the anolyte inductor DC-DC converter that outputs a few µWs imposes
and catholyte, respectively. The miniaturized MFC produces many challenges. Most commercial or in-research switching
up to approximately 10 µW with an output voltage of 0.4 V - inductor DC-DC converters mark less than 60 % in efficiency
0.7 V. Such low voltage, which is also load dependent, at μW level [9]-[10]. Carlson et al, reported 40-70%
prevents the MFC to directly drive low power electronics. A efficiency at 1 V [6]; however, the dead-time limits the
PFM (Pulse Frequency Modulation) type DC-DC converter in converter input voltage to be less than 0.24 V.
DCM (Discontinuous Conduction Mode) is designed and In this paper, a high efficiency (85% peak efficiency) low
implemented to address the challenges and provides a load power DC-DC converter for a miniaturized MFC is presented.
independent output voltage with high conversion efficiency. The challenges of high conversion efficiency at μW level are
The fabricated DC-DC converter in UMC 0.18 µm has been addressed. First, the parasitic capacitance of the inductor is
tested with the MFC. At 0.9 V output, the converter has a incorporated in the efficiency analysis unlike ignored in other
peak efficiency of 85 % with 9 µW load. switching inductor designs [11]. High efficiency converters at
μW level prefer a large inductor. As a result, parasitic
I. Introduction capacitance has significant impact on the sizing of the
The global challenge of fossil fuel has made the research switching transistors. Second, inductor peak current is limited
into alternative energy sources a widely studied area. One of by oscillator-based control, which results in multiple inductor
the attractive alternatives is a microbial fuel cell (MFC), current pulses in one comparator switching period. Such
which converts chemical energy into electrical form through behavior has profound implications on output voltage ripple
the catabolism of bacteria. Most MFCs are in macro-sized and limits the maximum inductance value. Finally, a high
forms that serve as prototypes of large power sources or efficiency converter at ~10 µW load is implemented and
energy-efficient wastewater treatment technology. Recent coupled with a miniaturized MFC for experimental
activities are to miniaturize MFCs for portable power sources verification. The paper is organized as follow: In Section II, a
[1]-[4]. A miniaturized MFC has demonstrated a power brief introduction to MFC is presented. Typical output profile
density in the order of 10 µW/cm2 and is able to produce a and electrical model are described. Section III discusses the
power of about 10’s µW in the lab [1]. With such power choice of converter topology and the method to optimize the
capability, the MFC could supply low power electronics and converter efficiency. Circuit implementations are elaborated
enable wide applications including wireless sensor networks in Section IV and the experiment results are presented in
and implantable micro-devices [5]-[6]. Section V. Finally, Section VI summarizes our work.
Direct powering low power electronics with a MFC
poses, however, several challenges. The typical output voltage II. MFC
of a MFC is less than 0.7 V and is load dependant. To address A MFC is an electrochemical device that converts
the challenges, a DC-DC converter is needed to interface chemical energy of organic substrates into electricity through
between the MFC and the low power electronics. The the catabolism of exoelectrogen such as Geobacter sp. (Figure
converter is required to boost its output to the value that 1(top)). Geobacter oxidizes organic substrates (e.g. Acetate)
electronics can work with and to have high conversion to produce electrons, protons, and CO2. The oxidization
efficiency at μW level. process could be represented by:
Mainly three types of DC-DC converters are available:
linear regulation, switching capacitor and switching inductor
CH 3COO − + 2 H 2O → 2CO2 + 8e− + 7 H + (1)
[7]-[8] converters. The linear regulation converter has a Electrons are transferred to the anode via conductive
limited efficiency less than the ratio of output voltage to input nanowires produced by Geobacter and travel to the cathode
voltage. In addition, it can only output less voltage than its where they are reduced by electron acceptors such as O2 and
input, which limits its application for the MFCs. The ferricyanide ([Fe(CN)6]3-).
efficiency of switching capacitor converter is limited by the O2 + 4e− + 4 H + → 2 H 2O (2)
output resistance. In other words, zero load gives ~100%
Carbon based materials, such as carbon cloth, carbon
efficiency ideally. To produce reasonable power at the output,
mesh, carbon paper, etc., have been adopted as anode
1

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materials of macro-/meso-scale MFCs for relatively good circuit voltage of a MFC is around 0.7 V. The output voltage
electrochemical characteristics and chemical stability. Among decreases as the output current increases. The maximum
them, carbon nanotube (CNT), a nanostructured carbon power of a MFC is 10 µW - 20 µW.
allotrope, is an attractive material due to its high SAV
(Surface Area to Volume) ratio, high conductivity, excellent
electrochemical characteristics, and superb mechanical and
chemical stability [1].

Figure 2: (Top) Electrical model of MFC - a current controlled

voltage source (Bottom) Output voltage and current profile of a
miniaturized MFC. The MFC has open circuit voltage of
Figure 1: (Top) Schematic of a Microbial Fuel Cell (MFC). Organic approximately 0.7 V and has a maximum power of about 17 µW.
substrates (i.e., acetate) are oxidized by exoelectrogen to produce
electrons to transfer to the anode. The electrons travel through an III. Converter Topology
external load to be reduced at the cathode by the oxidant. (Bottom) Various topologies of switching inductor converters have
Photograph of fabricated anode and SEM of vertically-aligned been reported. The control loop of the converter could be
carbon nanotube (VACNT) implemented in either digital or analog domain [13]-[14].
Digital control benefits from control flexibility and scaling
A vertically-aligned carbon nanotube (VACNT) provides with technology, yet it is power hungry, complex and
enhanced electron transfer rate due to its regular periodic consumes more area [14], which motivates us to implement
distribution and straight conductive path. The VACNT is the an analog control loop. Depending on how the signal
anode material of our micro-scale MFC. Figure 1(bottom) feedback is realized in the control loop, two converter modes
show a photograph of the fabricated anode and a scanning exist: current or voltage mode [11], [13]. Current mode
electronic microscope (SEM) image of VACNTs, converter has faster response at the expense of extra area and
respectively. The grown VACNTs are multi-walled, with a power budget for the current sensing circuit, which is not
diameter of 10-15 nm and a length of 15 µm. necessary for our application, driving us to adopt a voltage
A MFC could be modeled as a current controlled voltage mode converter. In addition, the converter regulation can
source with an internal resistance as in Figure 2(top) [12]. Rin work in DCM (Discontinuous Conduction Mode) or CCM
is the internal resistance, which is a function of the types of (Continuous Conduction Mode). Moreover, converter control
exoelectrogen, electrolyte, electrode and membrane, and is loop regulates the converter in different ways. PWM (Pulse
typically in the range of 100 Ω-10 kΩ. The voltage source, V, Width Modulation) changes the duty cycle of the switching
is the open circuit voltage of MFC and is a function of signal to vary output voltage while PFM (Pulse Frequency
electrode overpotential, pH difference across the membrane, Modulation) changes the switching frequency to achieve the
activation / concentration loss, etc. In the model, the control same goal. Continuous PWM is known to have high
signal is the output current imfc of MFC. The control current efficiency at high load range and PFM in DCM has relatively
passes through a first order feedback system to vary the high efficiency at light load range [15]. As a consequence, we
output voltage of MFC. K is a scaling factor. Td characterizes adopt the PFM in our design.
the time that MFC needs to stabilize its output when a step The schematic of the proposed DC-DC converter in PFM
load signal is applied. The time constant of the feedback is in mode is depicted in Figure 3. When M1 switch is turned on,
the order of 1’s-10's mins. In practice, the output of MFC is MFC charges the inductor L to its maximum current. When
typically connected with a large capacitor for converter start- M1 is turned off, the current stored in the inductor L passes
up. Thus, 100’s kHz small variation from MFC load is greatly through the CMOS Control Rectifier (CCR) and charges the
attenuated and its feedback signal is negligible. output load. When the inductor current reaches less or equal
An exemplar output voltage and current relation of a to zero and output voltage (Vout) becomes greater than Vs, the
miniaturized MFC is plotted in Figure 2(bottom). The open
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current path from output to inductor is then blocked by the At the steady state, the average current passing through
CCR to avoid any energy loss from the output to ground inductor should be equal to the current passing through Rload
through the body diode of M1. As a result of these switching plus Ictrl that supplies the control circuit. If we assume Ictrl is
events, Vout increases and maintains at a stable value as the much smaller than the load current average (Iavg) or the
control loop tunes the equivalent frequency of the switchings. efficiency of the converter is high, which results in finite
During the start-up, the control loop of the converter is inaccuracy of calculation at low power level, we have
powered by MFC directly. When the output voltage of the Vout Rload + I ctrl ≈ Vout Rload = I avg = I max (D1 + D2 )N 2
converter is greater than that of the MFC, the control loop is (7)
powered from converter output. Such a supply switching D 2V N  Vin  Vin N  Vin 
= 1 in 1 +  = 2
1 + 
event is automatically managed by the on-chip supply 2 Lf  Vout − Vin  8 LTf osc  Vout − Vin 
switching module. In our design, the maximum inductor current is limited by
the oscillator frequency. The limiting mechanism benefits
from low power (the power to limit the inductor peak current
is mostly dominated by the oscillator, which is typically less
than 0.1 µW) and involves no additional current sensing loop
so that no design effort is required to maintain the stability of
a current loop.

Figure 3: The schematic of the proposed DC-DC converter working

in PFM model. On-chip power is managed by power switching.
Adaptive dead-time control is achieved by CCR. Inductor switching Figure 4: Inductor current profile of the converter. Comparator
is controlled by output feedback delay causes multiple pulses in the same switching period

When the output voltage is less than the reference, A. Converter Efficiency
NMOS switch (M1) turns on and the current passing through The energy loss associated with the converter inductor
the inductor keeps increasing up to comes from the inductor conduction loss (PL,R) due to
I max = D1Vin Lf = Vin 2 Lf osc (3) parasitic series resistor and inductor switching loss associated
with the parasitic capacitance (PL,C):
where
PL = PL , R + PL ,C = ( D1 + D2 ) N 3 × (Vin 2 f osc L ) α L
2
D1 = 1 2Tf osc (4), (8)
+C p Vin2 + (Vout − Vin )  f osc 2 D1 N
2
D1 is the ratio of NMOS on-period to the switching period 1/f
(T) (Figure 4). After 1/2fosc (Tosc/2), the NMOS switch is  
turned off by the oscillator. At the same time, the PMOS where Cp is the parallel parasitic capacitance of the inductor
switch (M2) in the CCR turns on and keeps on for D2T. D2 is and α is a constant to determine the series resistance of the
the ratio of PMOS on-period to the switching period. The inductor under the assumption that series resistance is
inductor current passes though the PMOS switch and charges proportional to the square root of the inductance, since the
Cload and Rload. The PMOS switch has incorporated a quality factor (Q) and parasitic capacitance of discrete
comparator to achieve automatic control of its on-off status inductor almost remain constant for a wide range of
and forms the CCR, which addresses the dead-time issues and inductance values. Losses from NMOS and PMOS switches
make the switch behaves like a synchronous diode. When the exist. For simplicity, we assume both NMOS and PMOS
PMOS switch is on, the inductor current keeps decreasing. consume the same amount of power.
When inductor current reaches zero, CCR turns the PMOS off For a transistor switch, the loss consists of conduction
and prevents the output from charging the inductor. The time loss and switching loss:
2
it takes for inductor to decrease from Imax to 0 satisfies:
PNMOS = Pcond
1 V 
+ Psw =  in 
( D1 + D2 ) N
I max = D2 (Vout − Vin ) Lf (5) 3  2 f osc L  βW L (Vout − Vth ) (9)
Thus from Eq. (1) and (2), we have
+CoxWLVout 2 f osc 2 D1 N
D2 = D1Vin (Vout − Vin ) (6)
where Cox, β, Vth are device parameters associated with
Due to the delay of comparator, the switching events technology. W and L are the width and length of the switch,
keep happening N times as shown in Figure 4. respectively.

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Power loss (uW) and an oscillator frequency of approximately 300 kHz.

1000
Finally, the converter efficiency could be calculated as:
900
(
η ≈ Vout I avg PL + 2 PNMOS + Vout I avg (11) )
800
Oscillator freq. (kHz)

700 B. Stability of the Converter

600 One of the advantages of the proposed DC-DC converter
500
is its stability. Considering each switching cycle, the energy
variation satisfies:
400 0.2
0.23621
593 ΔEin = ΔEL + ΔECload + ΔERload (12)
300 0.2097
6
where the energy variations are defined as the difference of
200 the energies at (n+1)T and nT. ΔEin is the input energy
100 variation. ΔEL is the energy variation on the inductor, which is
1 2 3 4 5 6 7 8 9 10
Inductor (mH)
(a) zero for each cycle due to the DCM operation. ΔECload and
Power loss (uW)
1000 ΔERload are the energy variation on the load capacitor and
900 resistor, respectively. The energy loss associated with biasing
800 and control circuits is lumped in ΔE Rload . Following similar
derivation in [16], the energy on the load capacitor has the
Oscillator freq. (kHz)

700
form of:
600
ECload ,( n +1)T = MECload , nT + ΔEin (1 + T Rload Cload )
−1
(13)
500

400
where
0.32
0.26005  T   T 
M = 1 −  1 +  < 1 (14)
300 902
0.21
798
 R C
load load   Rload Cload 
200
0.2179
100
8 Since ΔEin is bounded and M < 1, ΔECload is bounded. Thus,
1 2 3 4 5 6 7 8 9 10
Inductor (mH)
(b) the system is always stable.
Figure 5: Optimizing oscillator frequency and inductor for high
efficiency DC-DC converter with 10 μW load when the power switch C. Output Ripple
is sized as: (top) W/L= 500 and (bottom) W/L= 5,000 A single pulse current from the inductor charges the
output load capacitor and resistor, which results in a voltage
In addition, biasing circuit, reference, oscillator, increment Δv on the converter output voltage. Solving
comparator, body diodes, etc. consume a finite amount of differential equations, the voltage increment caused by single
power. These circuits are either biased in sub-threshold region pulse is
or current limited. Their combined power consumption is
approximately 1 µW, which is ignored in the analysis for Δv = Δvsgl + − Δvsgl − (15)
simplicity. This omission results in inaccuracy to compute the  R V R2 C 
efficiency at low power level. Consequently, the total power Δvsgl + =  Vout − load in − load load (Vout − Vin ) 
loss is  2 Lf osc L  (16)
Ploss = PL + PNMOS + PPMOS ≈ PL + 2 PNMOS (10)  − 2 R C Vfin V −V  R V
×  e load load osc ( out in ) − 1 − load in
From Eq. (8)-(10), the total converter power loss is   2 Lf osc
plotted with a 10 μW load at 0.9 V for a switch with sizes of  
W/L = 500 and 5,000 in Figure 5. Large inductor is suggested  1  1
 −
Vin


Rload Cload  f osc 2(Vout −Vin ) f osc 
to achieve high efficiency, which also dominates the dynamic Δvsgl − 
= −Vout 1 − e  − Veqconv (17)
loss of the converter. The switch is sized to ensure parasitic  
gate/drain capacitance (~100's fF with the designed transistor  
sizes) is smaller than inductor capacitance (Cp: typically a few where, Veqconv is the equivalent voltage drop on the Cload to
pFs) and its turn-on resistance is insignificant to inductor supply the DC-DC converter during the single pulse charge
series resistance (RL). As a result, power loss is not sensitive event. Thus, N pulses cause the output varied by:
to the switch sizes (Figure 5) and W/L of the switch (L = 0.18 Δv+ = N Δv (18)
μm) should be 500-5,000. When W/L is greater than 5,000, When no pulse current is present, the output resistor
the transistor loss is dominated by the switching loss, which is discharges Cload in the rest of the switch period (T) and the
sensitive to the output voltage as shown in Eq. (8)-(9). Thus, output voltage decreases by:
W/L = 500 is used in the design. Moreover, the efficiency Δv− ≈ Vout Rload Cload × (T − N f osc ) (19)
shows less sensitivity to oscillator frequency for W/L = 500.
The maximum efficiency is achieved with a 4-5 mH inductor Finally, the voltage ripple could be determined as

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Δvout ,rppl = Δv+ + Δv− (20) Cload is charged. Moreover, the net voltage increase has to be
greater than zero to ensure the function of the converter. As a
Clearly, large inductor, high oscillator frequency and result, the inductance should be limited to just ensure the
large load capacitor help to reduce the ripple. Choices of voltage increment (Δv) is greater than zero in the maximum
inductance and oscillator frequency are limited by efficiency loading condition to enhance converter efficiency, reduce
and maximum power requirement. In our design, large load output voltage ripple and meet the maximum power (or
capacitor is utilized to suppress the ripple to 10’s mV level. minimum Rload) specification simultaneously.

Figure 8: Low power comparator schematic with 3 stages: pre-

amplification, regeneration and final-amplification

Figure 6: Schematic of CCR (CMOS Control Rectifier). NMOS sizes:

W/L=1/0.36. PMOS sizes: W/L=2/0.36. M2 sizes: W/L=20/0.18.
Comparison of Vs and Vout is performed by coupled current mirrors.
If Vs>Vout, M2 turns on; otherwise, M2 turns off.

Figure 9: On-chip power supply switching schematic. Vin and Vout

are compared to control the 2-to-1 switch formed by M38-M40

IV. Circuit Implementation

A. Power stage
From simulation, Veqconv is estimated to be 1.5 mV. For a
maximum power of 10 µW and a voltage output of 0.9 V, the
maximum inductance can be computed to be ~5 mH. In our
design, a 4.7 mH inductor (sizes: 5mm × 4mm) is used to
meet the power requirement and achieve high efficiency. The
Figure 7: Low power oscillator at 100's kHz: 3-stage inverter chain
with current limiting and biasing from constant-gm circuit voltage ripple is suppressed to 10's mVpp level by adopting
100 nF (sizes: 1.6 mm × 0.8 mm) capacitor as in Eq. (15)-
D. Maximum power (20). MFC has an open circuit voltage of ~0.7 V. However,
Though large inductor increases the efficiency and when loaded, the output voltage of MFC decreases as plotted
reduces the output voltage ripple, the maximum inductance in Figure 2. As a result, an input capacitor at the converter is
value is limited by the maximum power that converter needs necessary to start-up the converter and should be large enough
to handle. Increasing the inductance of the converter reduces to sufficiently store initial energy with a voltage of typically
the voltage increment (Δv) in a single charge event as greater than 0.5V. From the simulation, the converter takes
demonstrated in Eq. (15)-(17). In other words, increasing the 200-300 µs to start and consumes 1 mW, corresponding to
inductance will reduce the net voltage increase every time 200-300 nJ. Thus, the start-up capacitor should be 100-1000
5

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times larger than the converter load capacitor. Such capacitor logic function to control the loop, i.e. when In+ (scaled
is typically in a discrete form and is in parallel to the MFC version of Vout by output resistor divider) is smaller than In-
output. The MFC is miniaturized, yet still has very large form (reference value), the comparator outputs logic high. The pre-
factor compared to IC; thus this discrete capacitor does not amplification, final amplification stage and inverter stage are
have significant impact on the overall form factor. In our current limited to operate with low power. Notice that there is
simulation and experiment, a 100 µF (through hole no current limiting device on the regeneration stage as the
component was used in the experiment. Surface mount current in the regeneration stage is already regulated by the
component with sizes 3.2 mm × 1.6 mm is available) is gate voltages on M43 and M44. Such features make the
demonstrated to be enough for the converter to operate at 0.9- comparator a very low power design, which consumes less
1.2 V. The internal circuit is biased from the converter output than 100 nW from simulations. In the regeneration stage, the
in nominal operation, no cascode output or stacked structure cross-coupled PMOSs (M47-M50) provide fast regeneration to
is used to make the circuit functional without adopting minimize the comparator delay. From the simulation, with a 3
sophisticated low voltage design techniques. mV differential input, the comparator takes 5 µs to resolve the
value to the rail.
B. CMOS Control Rectifier
CMOS Control Rectifier (CCR) was proposed to provide E. Start-up and Supply Switching
adaptive dead-time control [17]. It switches the PMOS M2 on, The MFC and the start-up capacitor power the control
when the inductor is fully charged. It also turns the M2 off circuit when the converter is connected at first. As the circuit
when the current of the inductor approaches zero. Such an loads the MFC, the MFC output voltage starts to decrease,
adaptive control is provided by comparing the voltages on the and the output voltage of the converter keeps increasing.
two terminals of the CCR. The schematic of the CCR used in When the converter output is greater than that of MFC, the
our design is shown in Figure 6. The voltage difference is control circuit is cut off from MFC/start-up capacitor and is
converted as current difference by the current mirror pairs supplied by the converter output.
M3/M4 and M5/M7. Through the coupled current mirrors, the The schematic of an automatic switching circuit is shown
source of M8 preserves the relation between Vs and Vout. Thus, in Figure 9, which manages the transition of converter power
the drain of M10 is pulled up or pulled down to drive M2, supply from MFC/start-up capacitor to the converter output.
through an inverter U1. The inverter U1 includes current The circuit consists of a comparator and a 2-to-1 switch. The
limiting device to limit the current flow during the switching comparator controls the switch (M38-M40) based on the
event for low power operation. The current limiting device is relation between MFC voltage and the output voltage of the
implemented by a PMOS transistor sourcing current to the converter. M34 and M37 are skewed to ensure the transition
driver. The current is optimized not to waste the transition when the output voltage is slightly higher than that of the
period of M2. In the design, the sources of PMOS in the MFC. M38 and M39 are stacked in series to limit the leakage
current mirrors are used to sense the voltage difference between Vin (MFC) and Vout (the output of the converter).
between Vs and Vout. The capacitor Cc provides hysteresis to
prevent unwanted noise switching the transistors and helps to
stabilize the operation of the CCR through feedback.

C. Low power oscillator

We adopt a 3-stage inverter chain oscillator with current
limiting devices (Figure 7). At both the pull-up and pull-down
sides, current limiting devices limit the charging and
discharging current to sub-100 nA range. The load capacitor
with parasitics at each stage is in the order of 10 fF. Assuming
a voltage swing of about 1 V, the oscillation frequency is
100's kHz depending on the biasing. The biasing of the
current limiting devices comes from a constant-gm current
biasing circuit, where all the transistors are biased in sub-
threshold to provide reference current from sub-100 nA to
100's nA. The biasing circuit also provides the biasing to the
rest of the converter through pbias and nbias. The oscillator Figure 10: Die photo of the DC-DC converter, fabricated by the
operates at less than 1 MHz with less than 1.2 V swing, and Mixed-Mode/RF UMC 0.18 µm technology
the power consumption of the oscillator is in the order of
3 stage × 10 fF × (1.2V ) × 1MHz , which is less than 0.1 µW.
2

D. Low power comparator

The comparator adopts a common topology. It consists of
a pre-amplification stage (M41-M45), regeneration stage (M46-
M52), and a final amplification (M53-M57) stage as shown in
Figure 8. The final output is inverted to provide the correct
6

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NMOS driving signal controls the switching events of the

converter. The oscillator frequency is about 310 kHz, slight
off from its designed frequency of 300 kHz. The DCM
switching has a cycle time of about 16.8 µs. A triangular
DCM profile is observed for the inductor current. The
inductor current is recorded by measuring the voltage across
an 800 Ω resistor in series with the inductor. The large
resistor consumes a few µWs; thus, it is removed when the
efficiency of converter is characterized. The peak current of
the inductor is approximately 100 µA, which is closed to the
expected value (135 µA) from eq. (3)-(4). The 100 µA peak
Figure 11: Measured waveform of converter: Output voltage, NMOS current suggests the converter is functional. The output ripple
driving signal and inductor current is measured to be less than 50 mVpp. The converter is
connected to the miniaturized MFC with a 100 µF capacitor in
parallel to test its conversion efficiency (Figure 12). The
converter efficiency is measured by comparing the DC
powers of MFC input and converter output load. The
measured conversion efficiency is plotted for different loads
at 0.9 V, 1.05 V and 1.2 V output. High voltage output tends
to degrade the efficiency since it requires more charging cycle
at a given output power. In our measurement, the converter
has a peak efficiency of ~85 % with a 9 µW load at 0.9 V
output. In addition, the maximum output power of the
(a)
converter decreases as the output voltage increases due to the
limitation of the maximum power of the MFC, as the
efficiency drops when the output voltage increases. At light
load, the converter loss is dominated by the miscellaneous
power loss from e.g. biasing circuit, comparator, body diode
conduction etc. Consequently, the converter efficiency
increases with load power, as the miscellaneous loss becomes
a smaller portion of the total power. However, as the load
increases beyond the peak efficiency point, more switching
events start to add more energy loss and reduce the
conversion efficiency.
(b) The converter efficiency is characterized at different
temperatures: 25 °C, 45 °C and 65 °C (Figure 12). Sudden
voltage drops are observed. The output voltage drops rapidly
as the MFC cannot deliver high power and high voltage
simultaneously. In addition, the converter efficiency is a
function of temperature. As a result, the collapse of output
voltage also becomes a function of temperature. In the
functional voltage range, the output DC voltage of the
converter drops ~3 mV/K as a result of the temperature
sensitivity of the reference circuit. In future implementation, a
band-gap reference could be adopted to address this issue.
Though the output voltage is a function of temperature, the
(c) efficiency of the converter remains almost unchanged. The
reason is that though leakage and body diode conduction
Figure 12: (a) Measured converter efficiency at 0.9 V, 1.05 V and reduces the converter efficiency at elevated temperature, the
1.2 V for different load conditions. The converter has a peak output voltage drop helps to increases the efficiency to
efficiency of 85 % with a 9 µW load at 0.9 V output. (b) Measured
compensate the body diode effect.
converter efficiency at 25 °C, 45 °C and 65 °C for different loads
and (c) Output voltage drops as ambient temperature increases. The performance of our design is compared with other
reported converters in Table 1. Carlson, et al. [6] reported a
V. Measurement Results converter having 64 % efficiency at 0.9 V output with a
A die photo of fabricated DC-DC converter (830 µm x stringent input voltage limitation. The rest of the converter
500 µm) is shown in Figure 10. The converter is fabricated by has much less efficiency at µW level to our best knowledge.
the mixed-mode/RF UMC 0.18 µm technology. Our design achieves 85 % efficiency at 0.9 V with wide input
The fabricated converter is tested with a miniaturized range and requires no external battery for start-up, which
MFC and a 640 kΩ load resistor. As shown in Figure 11, the makes it suitable to interface miniaturized MFCs.
7

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2014.2323075, IEEE Transactions on Power Electronics

Table 1: Comparison of the performance of low power high [14] Z. Lukic, N. Rahman, A. Prodic, "Multibit Σ-Δ PWM digital controller
efficiency converters IC for DC-DC converters operating at switching frequencies beyond 10
BQ25504 Paing, et Carlson, MHz", IEEE Transactions on Power Electronics, vol. 22, no. 5, pp.
This work 1693-707, 2007
[9] al.[10] et al.[6] [15] S.S. Kudva, R. Harjani, "Fully-Integrated On-Chip DC-DC Converter
Input voltage >0.6 With a 450X Output Range", IEEE Journal of Solid-State Circuits, vol.
0.13-3 0.135 <0.24
(V) (start-up) 46, no. 8, pp. 1940-51, 2011
Output [16] HM. Ferdowsi, A. Emadi, M. Telefus, C. Davis, "Pulse regulation
1.8 4.15 0.6-1.3 0.9-1.2 control technique for flyback converter", IEEE Transactions on Power
voltage (V)
Peak 60% Electronics, vol. 20, no. 4, pp. 798-805, 2005
37% 64% 85% [17] T.Y. Man, P.K.T. Mok, M. Chan, "A CMOS-control rectifier for
efficiency at at 1.8V
at 4.15V at 0.9V at 0.9V discontinuous-conduction mode switching DC-DC converters", IEEE
µW level (Vin=0.4) International Solid-State Circuits Conference, 2006
Maximum
300 mW 400 µW 100 µW 10 µW
power
Xu Zhang received the B.S. degree in Electronic Engineering
Extra battery Yes Yes Yes No
from Tsinghua University, Beijing, China, in 2006, and the
Process NA discrete 0.13 µm 0.18 µm
Ph.D. degree in Electrical Engineering from Arizona State
. University, Tempe, USA in 2012. Currently, he works with
VI. Conclusion NXP Semiconductors, Inc. His areas of interest include power
A miniaturized MFC is an energy converter, utilizing electronics, interface circuits and high speed/microwave
renewable energy sources. However, the MFC has several devices and circuits.
limitations including its low output voltage and load
dependent characteristics. To address the limitations, a high Hao Ren received the B.S. degree in Mechanical Engineering
efficiency DC-DC converter is designed, aiming to boost and from University of Science and Technology of China, Hefei,
stabilize the output of MFC. Measurements suggest that the China, in 2008, and the M.S. in Optical Engineering from
converter can provide a load independent output at 0.9 V - 1.2 Chinese Academy of Sciences, Chengdu, China, in 2011. He
V with a peak conversion efficiency of 85 %. is currently working toward the Ph.D. degree in Electrical
Engineering at Arizona State University.
VII. Reference
[1] H. Ren, J. Chae, “Scaling Effect on MEMS-based Microbial Fuel Cells:
Toward a Carbon-neutral Miniaturized Power Source,” Solid-state Soonjae Pyo received the B.S. degree in Mechanical
Sensors, Actuators, and Microsystems Workshop, SC, 2012. Engineering from Yonsei University, Seoul, Korea, in 2009.
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generating 100 μW of power", Sensors and Actuators A, vol. 177, pp.
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IEEE Journal of Solid-State Circuits, vol. 45, no. 4, pp. 741-50, 2010 the M.S. degree in mechanical engineering from the
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current efficiency CMOS linear regulator using a flexible control
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Converter with Efficiency-Optimized Frequency Control and computer science from the University of Michigan, Ann
Reconfigurable Compensation", IEEE Transactions on Power Arbor, in 2000 and 2003, respectively. He joined Arizona
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synchronous buck-boost converter for portable applications", IEEE with readout/control electronics.
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