An embedded system communicates with the outside world through

peripherals1

 IBM 370/168
 VAX 11/780
 Intel 80486
 Motorola 6800, 6809 and 68000 families
 Intel 8080, iAPX 432 and x86 family
 Zilog Z80, Z8 and Z8000 families
 National Semiconductor NS320xx family
 MOS Technology 6502 family,

RISC stands for Reduced Instruction Set Computer. It is a type of

microprocessor architecture that utilizes a small, highly-optimized set of
instructions, rather than a more specialized set of instructions often found in
other types of architectures.

An embedded system is an integrated system that is formed as a combination of

computer hardware and software for a specific function
Non-volatile memory is suitable for low volume production of embedded
systems

Task-level concurrency management

Inter-Integrated Circuit

RCLK

Reset pin. It is an active-high

 User mode: the default mode for most application programs,

non-privileged.
 Supervisor mode: a protected mode for the operating system,
entered on reset or by software interrupt.
 Interrupt (IRQ) mode: a mode for general-purpose interrupt
handling, entered by hardware interrupt request.
 Fast Interrupt (FIQ) mode: a mode for fast data transfer or
channel process, entered by hardware fast interrupt request.
  System mode: a privileged version of user mode, used for
operating system tasks that require access to user resources.

six classes

Task scheduling in embedded systems can be done using a real-

time operating system (RTOS).
A task scheduler is a program that manages the execution of tasks
on a computer system. A task can become blocked or unblocked
depending on its state and the availability of resources. A task is
blocked when it is waiting for some event to occur, such as an
input/output operation, a timer, a semaphore, or a message. A
task is unblocked when the event it was waiting for has occurred,
and it is ready to resume execution.
The task scheduler knows when a task has become blocked or
unblocked by reading the task’s state variable, which is part of
the task control block (TCB). The TCB is a data structure that
stores information about the task, such as its priority, stack
pointer, registers, and flags. The task scheduler maintains a list of
all the tasks in the system, and updates their state variables
according to the events that happen. For example, when a task
performs an input/output operation, the task scheduler sets its
state variable to blocked, and removes it from the ready queue.
When the input/output operation is completed, the task scheduler
sets its state variable to ready, and adds it to the ready queue. The
task scheduler then selects the highest priority task from the
ready queue to run on the processor.
The task scheduler can use different algorithms to decide which
task to run next, such as round-robin, priority-based, or shortest
job first. The task scheduler can also use different policies to
handle preemption, which is the ability to interrupt a running
task and switch to another one. The task scheduler can be
preemptive, which means it can switch tasks at any time, or
cooperative, which means it can only switch tasks when the
current task voluntarily yields the processor. The task scheduler
can also use different mechanisms to communicate with the tasks,
such as interrupts, signals, or messages.

A task is a set of program

instructions that are loaded in memory . The state information of a
12

task is represented by task state, task structure, and task control

block . The states of a task are as follows :
1 2

 Idle state: the state of the task when it is just created.

 Ready state: the state of the task when it is ready to run.
 Running state: the state of the task when it is currently
running.
 Blocked state: the state of the task when it is waiting for an
event to occur.

I2C stands for Inter-Integrated Circuit. It is a bus interface

connection protocol incorporated into devices for serial
communication. It was originally designed by Philips Semiconductor
in 1982. Recently, it is a widely used protocol for short-distance
communication. It is also known as Two Wired Interface(TWI).
Working of I2C Communication Protocol :
It uses only 2 bi-directional open-drain lines for data communication
called SDA and SCL. Both these lines are pulled high.
Serial Data (SDA) – Transfer of data takes place through this pin.
Serial Clock (SCL) – It carries the clock signal.
I2C operates in 2 modes –
 Master mode
 Slave mode

I2C Bus (Interface wires) consists of just two wires

The ARM microcontroller is a 32-bit reduced instruction set computing

(RISC) machine that was first developed in 1985 by the Acorn Group of
Computers . It is widely used in portable devices like digital cameras, mobile
1

phones, and home networking modules due to its low power consumption and
reasonable performance . The ARM processors have a reduced instruction set,
1

which allows for a smaller size for the IC, making them space efficient . By
2

combining the ARM microprocessor with RAM, ROM, and other peripherals in
one single chip, an ARM microcontroller is created . The ARM microcontroller
2

is commonly used in different types of embedded and industrial projects due to

its advantages over other controllers and modern structures . It is used in
3

different categories of control systems, wireless circuits, sensing devices, and

automobiles . 3

ARM chips are used in:

 Light, portable, battery-powered devices, including
smartphones, laptops, and tablet computers, as well as
embedded systems.
 Microcontrollers, which are small computer chips typically
dedicated to one specific task. These feature in a wide variety
of products including electronic passports, car control
systems, hard disks, and flash memory.
 Modern smartphone SoCs (System on a Chip) in both the
Android and Apple ecosystems.
 The PC market via Windows on Arm and Apple’s growing
custom Apple Silicon range for Macs.
An interrupt is a signal emitted by hardware or software when a process or an
event needs immediate attention. It alerts the processor to a high-priority
process requiring interruption of the current working process. In I/O devices one
of the bus control lines is dedicated for this purpose and is called the Interrupt
Service Routine (ISR)12. When a device raises an interrupt at let’s say process i,
the processor first completes the execution of instruction i. Then it loads the
Program Counter (PC) with the address of the first instruction of the ISR.
Before loading the Program Counter with the address, the address of the
interrupted instruction is moved to a temporary location. Therefore, after
handling the interrupt the processor can continue with process i+1. While the
processor is handling the interrupts, it must inform the device that its request
has been recognized so that it stops sending the interrupt request signal. Also,
saving the registers so that the interrupted process can be restored in the future,
increases the delay between the time an interrupt is received and the start of the
execution of the ISR. This is called Interrupt Latency1.

OR
Interrupt is a method of creating a temporary halt during program
execution and allows peripheral devices to access the microprocessor . It is
123

a signal emitted by hardware or software when a process or an event needs

immediate attention . The microprocessor responds to that interrupt with an ISR
23

(Interrupt Service Routine), which is a short program to instruct the

microprocessor on how to handle the interrupt.

An ISR, also known as an interrupt service routine, is a function or

subprogram in a computer program that is executed in response to an
interrupt. The main purpose of an ISR is to handle interrupts, which
are signals sent by hardware or software to interrupt the normal flow
of program execution. By responding to interruptions, ISRs ensure
that critical tasks are carried out promptly and efficiently.

When an interrupt occurs, the processor suspends its current task and
hands control to the ISR. The ISR then executes the code required to
handle the interruption, which may include storing the context of the
interrupted task, processing the interrupt request, and restoring the
context of the interrupted task after handling the interruption. This
allows the system to respond quickly to time-critical events and
ensure the proper functioning of the entire system.

RTOS
OS
Parameters of
RTOS OS
Comparison

Full Form Real Time Operating Operating System

System

Definition As it stands for Real- OS or an operating

Time Operating system is a software
System, this operating application that serves
system offers quick and as a conduit between
precise solutions to the hardware of a
prioritized operations. computer and the
operator

Features An RTOS can deal with The operating system

interruptions (OS) on your laptop
successfully using or pc or even phone
priority based controls all of the
functioning applications and
technology that
revolves around your
hardware and software

Codes Coding for RTOS is Coding for a standard

complex and feedback OS is generally easy
specific. and hassle-free.

Performance Although real-time Performance is decent

and Stability operating systems may and depends partially
give greater efficiency on the processor and
in some instances due RAM used in the
to reduced concurrency computer.
 Embedded systems are classified based on performance and functional
requirements. Some common types of embedded systems are:
 Real-time embedded systems: These systems have strict time
constraints and must respond to events or inputs within a specified
time frame.
 Standalone embedded systems: These systems do not depend on any
host system and can work independently.
 Networked embedded systems: These systems are connected to a
network and can communicate with other devices or systems through
the network.
 Mobile embedded systems: These systems are portable and can operate
on battery power. They are often used in smartphones, tablets,
wearable devices, etc.

Embedded systems are purpose-built systems that are tailored for specific
applications, optimizing design, reducing costs, and improving power
efficiency . They are an essential component of the IoT ecosystem and provide
1

several benefits, including being cost-effective, dependable, and energy-

efficient . Other benefits include being compact, reliable, and performing tasks
2

with great accuracy . Embedded systems are also characterized by performing

3

specific tasks, being low cost, time-specific, low power, and high efficiency .
4

The purpose of an embedded system is to perform a specific function or task

within a larger system or device. Embedded systems are designed to be
efficient, reliable, and low-cost, and they often have real-time constraints. For
example, an embedded system in a digital watch is responsible for keeping time,
displaying the date, and setting alarms. An embedded system in a washing
machine is responsible for controlling the water level, temperature, and spin
cycle. An embedded system in a car is responsible for managing the engine,
brakes, and airbags. Embedded systems are everywhere, and they make our
lives easier and safer

An embedded system is a combination of hardware and software that

performs a specific task or function. The elements of an embedded
system are:

 Processor: The processor is the brain of the embedded system.

It executes the instructions and controls the operation of the
system. The processor can be a microprocessor, a
microcontroller, a digital signal processor, or a custom-designed
chip.
 Memory: The memory is used to store the code and data of the
embedded system. The memory can be classified into two types:
ROM (Read Only Memory) and RAM (Random Access
Memory). ROM is used to store the program code and
configuration data that do not change during the execution.
RAM is used to store the temporary data and variables that
change during the execution.
 Bus: The bus is a communication channel that connects the
processor, memory, and peripheral devices. The bus can be
classified into two types: address bus and data bus. The address
bus is used to specify the location of the memory or peripheral
device that the processor wants to access. The data bus is used
to transfer the data between the processor, memory, and
peripheral devices.
 Peripheral devices: The peripheral devices are the input and
output devices that interact with the external world. The
peripheral devices can be classified into two types: sensors and
actuators. Sensors are used to measure the physical quantities
such as temperature, pressure, light, sound, etc. Actuators are
used to control the physical devices such as motors, valves,
relays, etc.
  I/O ports: The I/O ports are the interfaces that connect the
peripheral devices to the bus. The I/O ports can be classified
into two types: parallel and serial. Parallel ports transfer
multiple bits of data at a time using multiple wires. Serial ports
transfer one bit of data at a time using one or two wires.
 Controllers: The controllers are the devices that manage the
communication and synchronization between the processor,
memory, bus, and peripheral devices. The controllers can be
classified into two types: interrupt controller and DMA (Direct
Memory Access) controller. Interrupt controller handles the
requests from the peripheral devices to interrupt the processor
and execute a specific service routine. DMA controller transfers
the data between the memory and peripheral devices without
involving the processor.

I2C stands for Inter-Integrated Circuit. It is a bus interface

connection protocol incorporated into devices for serial
communication. It was originally designed by Philips
Semiconductor in 1982. Recently, it is a widely used protocol
for short-distance communication. It is also known as Two
Wired Interface(TWI).
Working of I2C Communication Protocol :
It uses only 2 bi-directional open-drain lines for data
communication called SDA and SCL. Both these lines are
pulled high.
Serial Data (SDA) – Transfer of data takes place through
this pin.
Serial Clock (SCL) – It carries the clock signal.
I2C operates in 2 modes –
 Master mode
 Slave mode
Each data bit transferred on SDA line is synchronized by a
high to the low pulse of each clock on the SCL line.

According to I2C protocols, the data line can not change

when the clock line is high, it can change only when the
clock line is low. The 2 lines are open drain, hence a pull-up
resistor is required so that the lines are high since the devices
on the I2C bus are active low. The data is transmitted in the
form of packets which comprises 9 bits. The sequence of
these bits are –
1. Start Condition – 1 bit
2. Slave Address – 8 bit
3. Acknowledge – 1 bit

A real-time clock (RTC) is an electronic device that keeps track of

the current time. It is used in computers, embedded systems, and other
electronic devices to maintain accurate time and date information. The
RTC is powered by a small battery, which allows it to keep running
even when the device is turned off or unplugged 1.
A watchdog timer is a hardware device that is used to monitor the
operation of a system and ensure that it is functioning correctly. It is
commonly used in embedded systems, where it is important to ensure
that the system is running continuously and without errors. The
watchdog timer works by periodically sending a signal to the system’s
processor. If the processor fails to respond to the signal within a
certain amount of time, the watchdog timer will assume that the
system has crashed and will take corrective action, such as resetting
the system.

Interrupt latency is the time that elapses between the occurrence of an

interrupt and the execution of the first instruction of the interrupt
service routine (ISR) that handles the interrupt 1. It is a measure of the
system’s ability to respond to external events in a timely
manner. Interrupt latency is important in determining the performance
and responsiveness of a system and is a key consideration in the
design and optimization of real-time and embedded systems 1.
An interrupt is a signal sent to the computer’s processor asking it to
stop what it’s doing and start handling the interrupt right away 1.
Devices like the keyboard, mouse, and network card communicate
with the processor and request services using interrupts. They are
crucial to how modern operating systems function and enable the
processor to react quickly to outside events 1.
Interrupt latency can be affected by various factors such as the
hardware architecture, the operating system, and the type of interrupt
being handled 1.

To avoid interrupt latency, you can : 12345

 Prioritize interrupts and handle critical interrupts with

higher priority.
 Use DMA transfer instead of interrupt if a peripheral
has access to DMA.
 Keep ISR (Interrupt Service Routine) short.
 Avoid using loops in ISR.
 Avoid time-consuming instructions.
.
Inter Process Communication through shared memory is a concept
where two or more process can access the common memory and
communication is done via this shared memory where changes made
by one process can be viewed by another process.
The problem with pipes, fifo and message queue – is that for two
process to exchange information. The information has to go through
the kernel.
 Server reads from the input file.
 The server writes this data in a message using either a pipe,
fifo or message queue.
 The client reads the data from the IPC channel,again
requiring the data to be copied from kernel’s IPC buffer to
the client’s buffer.
 Finally, the data is copied from the client’s buffer.
A total of four copies of data are required (2 read and 2 write). So,
shared memory provides a way by letting two or more processes
share a memory segment. With Shared Memory the data is only
copied twice – from input file into shared memory and from shared
memory to the output file.

The shared data problem arises when multiple processes access the
same shared data concurrently, leading to data inconsistency and race
conditions. Process synchronization is a technique that can be used to
coordinate the processes that use shared data 1. Task synchronization
is a type of process synchronization that is used to synchronize the
access of shared data between tasks 2.
The following steps can be taken to overcome the shared data
problem with task synchronization technique:
1. Mutual Exclusion: Mutual exclusion is a technique that ensures
that only one task can access the shared data at a time. This can
be achieved using locks, semaphores, or monitors 3.
2. Synchronization: Synchronization is a technique that ensures
that tasks are executed in a specific order. This can be achieved
using semaphores or monitors 3.
3. Deadlock Prevention: Deadlock occurs when two or more tasks
are blocked, waiting for each other to release
resources. Deadlock can be prevented by ensuring that tasks do
not hold resources indefinitely and by using timeouts 3.
4. Starvation Prevention: Starvation occurs when a task is
blocked indefinitely and is unable to access the shared
data. Starvation can be prevented by using techniques such as
priority scheduling 3.

The Features of 8051 Microcontroller family are as follows.

 4 KB on-chip ROM (Program memory).

 128 bytes on-chip RAM (Data memory).
 The 8-bit data bus (bidirectional).
 16-bit address bus (unidirectional).
 Two 16-bit timers.
 Instruction cycle of 1 microsecond with 12 MHz crystal.
 Four 8-bit input/output ports.
 128 user-defined flags.
 Four register banks of 8 bit each.
 16-byte bit-addressable RAM.
 The general-purpose registers are 32 each is 8-bit.
  8051 has two external and three internal interrupts.
 8051 microcontroller specifies some special function features
like UARTs, ADC, Op-amp, etc.
 It has a 16-bit program counter and data pointer.

8051 Microcontroller
Architecture
Let's see the internal architecture of 8051 Microcontroller
represented in form of block diagram as shown below:

Basic components present internally inside 8051

Microcontroller architecture are:

CPU (Central Processing Unit): CPU act as a mind of any

processing machine. It synchronizes and manages all processes
that are carried out in microcontroller. User has no power to
control the functioning of CPU. It interprets the program stored
in ROM and carries out from storage and then performs it
projected duty. CPU manage the different types of registers
available in 8051 microcontroller.

Interrupts: Interrupts is a sub-routine call that given by the

microcontroller when some other program with high priority is
request for acquiring the system buses the n interrupts occur in
current running program.

Interrupts provide a method to postpone or delay the current

process, performs a sub-routine task and then restart the
standard program again.

Types of interrupt in 8051 Microcontroller:

Let's see the five sources of interrupts in 8051 Microcontroller:

o Timer 0 overflow interrupt - TF0

o Timer 1 overflow interrupt - TF1
o External hardware interrupt - INT0
o External hardware interrupt - INT1
o Serial communication interrupt - RI/TI

Memory: For operation Micro-controller required a program.

This program guides the microcontroller to perform the specific
tasks. This program installed in microcontroller required some
on chip memory for the storage of the program.

Microcontroller also required memory for storage of data and

operands for the short duration. In microc ontroller 8051 there
is code or program memory of 4 KB that is it has 4 KB ROM and
it also comprise of data memory (RAM) of 128 bytes.
Bus : Bus is a group of wires which uses as a communication
canal or acts as means of data transfer. The different bus
configuration includes 8, 16 or more cables. Therefore, a bus
can bear 8 bits, 16 bits all together.

Types of buses in

Let's see the two types of bus used in 8051 microcontroller:

o Address Bus: 8051 microcontrollers is consisting of 16 bit

address bus. It is generally be used for transferring the
data from Central Processing Unit to Memory.
o Data bus: 8051 microcontroller is consisting of 8 bits data
bus. It is generally be used for transferring the data from
one peripherals position to other peripherals.

The 8051 microcontroller has three types of memory:

 Internal RAM is used for temporarily storing data and intermediate

results during the operation of the microcontroller. It occupies the first
128 bytes of the address space (00-7Fh) and is divided into four banks of
eight registers (R0-R7) and 80 bytes of general-purpose RAM3.
 Special function registers are used for controlling and monitoring
various functions of the microcontroller, such as timers, counters, serial
port, input/output ports, etc. They occupy the second 128 bytes of the
address space (80-FFh) and are accessed by direct addressing only3.
 Program memory is used for storing the program to be executed, i.e., the
instructions. It can be either internal or external, depending on the model
of the microcontroller and the state of the EA pin. The 8051
microcontroller can address up to 64 kB of program memory4.
 External data memory is used for expanding the data storage capacity
of the microcontroller. It can be accessed by indirect addressing or by
using special instructions such as MOVX. The 8051 microcontroller can
address up to 64 kB of external data memory4.
A watchdog timer (WDT) is a piece of hardware that can be used to
automatically detect software anomalies and reset the processor if
any occur. Generally speaking, a watchdog timer is based on a
counter that counts down from some initial value to zero. The
embedded software selects the counter’s initial value and
periodically restarts it. If the counter ever reaches zero before the
software restarts it, the software is presumed to be malfunctioning
and the processor’s reset signal is asserted. The processor (agnd
the embedded software it’s running) will be restarted as if a human
operator had cycled the power.
Figure 1 shows a typical arrangement. As shown, the watchdog
timer is a chip external to the processor. However, it could also be
included within the same chip as the CPU. This is done in many
microcontrollers. In either case, the output from the watchdog
timer is tied directly to the processor’s reset signal.
What is Interrupt latency?
Interrupt latency is the time that elapses between the
occurrence of an interrupt and the execution of the first
instruction of the interrupt service routine (ISR) that handles
the interrupt.

 It is a measure of the system’s ability to respond to

external events in a timely manner.
 The shorter the interrupt latency, the more responsive
the system will be.
 Interrupt latency is expressed in core clock cycles.
Importance of Interrupt Latency
Interrupt latency is an important consideration in the design
and optimization of real-time and embedded systems. These
systems often have hard real-time constraints, meaning that
they must respond to external events within a specified time
period.
 A high interrupt latency can result in the system
missing a deadline, which can cause the system to fail
or produce incorrect results.
 If interrupts are not handled in a timely manner then
the system will exhibit slow response times.

Round-Robin Algorithm
The round-robin approach is a time-sharing scheduling algorithm. In the round-
robin
scheduling, a time slice is assigned to each task in a circular order. Tasks are
executed without priority. There is an FIFS (first-in-first-service) queue that
stores all
tasks in the ready state. Each time, the task at the head of the queue is removed
from the queue and dispatched for execution. If the task is not finished within
the
assigned time slice, it is placed at the tail of the FIFS queue to wait for its next
turn.
The round-robin scheduling algorithm is simple to implement. It is fair to all
tasks in
using the processor. The major drawback is that it delays the completion of all
tasks
and may cause tasks to miss their deadlines. It is not a good option for
scheduling
tasks with hard deadlines.

Characteristics of Round-Robin Scheduling :

Here are the important characteristics of Round-Robin Scheduling:

1. Round robin is a pre-emptive algorithm

2. The CPU is shifted to the next process after fixed interval time, which is
called time quantum/time slice.
3. The process that is preempted is added to the end of the queue.
4. Round robin is a hybrid model which is clock-driven
5. Time slice should be minimum, which is assigned for a specific task that
needs to be processed. However, it may differ OS to OS.
6. It is a real time algorithm which responds to the event within a specific
time limit.
7. Round robin is one of the oldest, fairest, and easiest algorithm.
8. Widely used scheduling method in traditional OS.