0% found this document useful (0 votes)
6 views

Embedded Lab2

The document provides an overview of the Microchip PIC mid-range family of microcontrollers, with details on the 16F84A architecture including memory organization, peripherals, instruction flow and programming options.

Uploaded by

Saddam Abdullah
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
6 views

Embedded Lab2

The document provides an overview of the Microchip PIC mid-range family of microcontrollers, with details on the 16F84A architecture including memory organization, peripherals, instruction flow and programming options.

Uploaded by

Saddam Abdullah
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 26

Lab 2

Introducing the PIC Mid-Range

25/03/1443
Family and the 16F84A and Starting

Eng - Omeir
to Program – an Introduction to
Assembler

1
Some Examples of the Microchip Mid-Range Family

Device number No. of Clock Memory Peripherals/special features


pins* speed (K = Kbytes, i.e. 1024
bytes)

16F84A 18 DC to 1K program memory, 1 8-bit timer,


20MHz 68 bytes RAM, 1 5-bit parallel port,
64 bytes EEPROM 1 8-bit parallel port,

25/03/1443
ICSP.

16LF84A 18 DC to as above As above, with extended supply


20MHz voltage range

Eng - Omeir
16F84A-04 18 DC to as above As above
4MHz
16F87 18 DC to 4K program memory, 2 parallel ports,
20MHz 368 bytes RAM, 3 counter/timers,
256 bytes EEPROM. 2 capture/compare/PWM modules,
2 serial communication modules,
2 analog comparators,
nanoWatt technology,
software-selectable oscillator block,
ICSP.

16F88 18 DC to as above as above, and


20MHz 7 10-bit ADC channels 2
The 16F84A Microcontroller: Pin Connection Diagram

25/03/1443
Eng - Omeir
3
The 16F84A Block Diagram – the main features
Extra “non-
Address for Program Memory Data volatile” Data
Memory Memory
Program Memory

Data from

25/03/1443
Program
Address for Data
Memory,
Memory
carrying
instruction Data bus for
word Data Memory

Eng - Omeir
and peripherals

It is easy to see the Program


memory, which uses Flash Counter/Timer
Peripheral
memory technology.
Alongside this comes the
Stack, which we meet later. Digital Input/
Microchip call the main Output Ports
data memory “File
Registers”. There is another
section of data memory
which uses EEPROM 4
The CPU
technology.
The 16F84A Core and Instruction Flow

The Instruction word


flows here. The word will
contain the instruction, and

25/03/1443
maybe also address and
data information

Eng - Omeir
Address info.
flows here “Literal” data
flows along here

Instruction info
flows here

The core is the “microprocessor


The Arithmetic
inside the microcontroller”, Logic Unit
centred around the ALU. It is
5
interesting to see the path that the
instruction takes from program The “Working
Register”
memory.
The Status Register

25/03/1443
Eng - Omeir
Condition
Code
Flags

6
Program Memory and Stack
Program
Counter

16 Series
instructions which The program
invoke the Stack must start here

25/03/1443
The Interrupt
Service Routine Program Counter
must start here points to locations in
program memory

Eng - Omeir
Unimplemented memory
space, still addressable by
the 13-bit 16F84A program
address bus.

7
Data Memory and Special Function Register Map

These are the Special Function


Registers, which allow the CPU
to interact with the peripherals msb is “bank

25/03/1443
select bit”
(Status register).

Eng - Omeir
General purpose memory

8
The 16F84A The configuration word determines certain operating features of the
Configuration microcontroller. It is in program memory, but cannot be accessed in
Word normal operation. It is written to during the programming process.
You set its value either by response to a dialogue box in MPLAB, or
by use of Assembler Directives, at the head of your programme.

25/03/1443
Eng - Omeir
9
Instruction Pipelining

25/03/1443
Eng - Omeir
10
Summary

• The PIC mid-range is a diverse and effective family of microcontrollers.


• The 16F84A architecture is representative of all mid-range microcontrollers, with
Harvard structure, pipelining and a RISC instruction set.
• The PIC 16F84A has a limited set of peripherals, chosen for small and low-cost

25/03/1443
applications. It is thus a smaller member of the family, with features that are a subset of
any of the larger ones.
• The 16F84A uses three distinct memory technologies for its different memory areas.

Eng - Omeir
• A particular type of memory location is the Special Function Register, which acts as the
link between the CPU and the peripherals.
• Reset mechanisms ensure that the CPU starts running when the appropriate operating
conditions have been met, and can be used to restart the CPU in case of program failure.

11
The Problem of Programming,
and Programming Options

Shall I
compare 11010010
01010010
thee to a Use Assembler 11010101
summer 01001011
day........? 01100011

25/03/1443
....

Use Machine Code

Eng - Omeir
Use High Level Language

What options do we have for programming a microcontroller? 12


The Assembler Option

25/03/1443
Eng - Omeir
13
Developing a Simple Project

Write/modify Source Code

25/03/1443
Assemble/Compile

Eng - Omeir
(Simulate)

Download

Test in Hardware
14
The PIC 16 Series ALU f for file (i.e. memory location in RAM), a 7-bit number;
b for bit, to be found within a file also specified, a single bit;
d for destination, as described above, a single bit;
k for literal, an 8-bit number if data, or 11-bit if address

25/03/1443
Eng - Omeir
15
The PIC
16 Series
Instruction
Set

25/03/1443
Eng - Omeir
16
Some Example Instructions
clrw clears the value in the W register to zero. There are no operands to specify. Column 5
tells us that the Status register Z bit is affected by the instruction. As the result of this
instruction is always zero, the bit is always set to 1. No other Status register bits are affected.
clrf f clears the value of a memory location, symbolised as f. It is up to the programmer to
specify a value for f, which needs to be a valid memory address. Again, because the result is

25/03/1443
zero, the Status register Z bit is affected.
addwf f,d adds the contents of the W register to the contents of a memory location
symbolised by f. There is a choice of where the result is placed, determined by the value of

Eng - Omeir
the operand bit d. Because of the different values that the result can take, all three condition
code bits, i.e. Z, C, and DC are affected by the instruction.
addlw k adds a literal, i.e. an 8-bit number written into the program and represented by k,
to the value held in the W register. Like the addwf instruction, The Z, C, and DC Status
register bits can all be affected by the instruction.
bcf f,b clears a single bit in a memory location, symbolised by f. The bit number b will take
a value from 0 to 7, to identify any one of the 8 bits in a memory location. No Status register
flags are affected, even though it is possible to imagine that the result of the instruction could
be to set a memory location to zero.
17
goto k This instruction causes the program execution to jump to another point in the
program, whose address is given by the constant k. It is up to the programmer to give a value
for k. No Status bits are affected.
Writing in Assembler

Left-most space

Assembler
format: label instruction operand(s) ;comment

25/03/1443
optional

For example:

Eng - Omeir
label comment

instruction
comment
;now switch on red led
Start bsf status,5 ;select memory bank 1
addwf counter operands 18
Assembler Directives

These look like Assembler mnemonics, but are instructions to the (Cross-)
Assembler program itself. They differ from one Assembler to the other, though
there does tend to be some similarity.

25/03/1443
Assembler Directive Summary of Action
list implement a listing option*

Eng - Omeir
#include include additional source file
org set program origin
equ define an assembly constant; this
allows us to assign a value to a label
end end program block

Example MPASM Directives


19
Representing Numbers

25/03/1443
Radix Example Representation
Decimal D„255‟
or

Eng - Omeir
Hexadecimal H„8d‟ Ox8d
Octal O„574‟
Binary B„01011100‟
ASCII „G‟ or A„G‟

20
Assembler File Structure (Simple Form)
Files that the Assembler
(e.g. MPLAB) generates

For us, this will be


MPLAB Executable File

25/03/1443
.hex

Eng - Omeir
Source File List File
Assembler
.asm .lst

Written by you, as a text


file, in Assembler format
Error File
.err

21
Introducing MPLAB
Continue here with
the MPLAB tutorial
from page 86 of the
book.

25/03/1443
Eng - Omeir
22
A First Program

;******************************************************************
;Very first program
;This program repeatedly adds a number to the Working Register.

25/03/1443
;TJW 1.11.08 Tested 1.11.08
;******************************************************************
;
; use the org directive to force program start at reset vector
org 00

Eng - Omeir
;program starts here
clrw ;clear W register
loop addlw 08 ;add the number 8 to W register
goto loop
end ;show end of program with "end" directive

23
A second Program

;
;specify SFRs
status equ 03
porta equ 05
trisa equ 05
portb equ 06
trisb equ 06

25/03/1443
;
org 00
;Initialise
start bsf status,5 ;select memory bank 1

Eng - Omeir
movlw B'00011000'
movwf trisa ;port A according to above pattern
movlw 00
movwf trisb ;all port B bits output
bcf status,5 ;select bank 0
;
;The “main” program starts here
movlw 00 ;clear all bits in ports A and B
movwf porta
movwf portb
loop movf porta,0 ;move port A to W register
movwf portb ;move W register to port B
goto loop 24
end
Eng - Omeir 25/03/1443
25
Instruction Formats of PIC Mid-Range Microcontrollers

25/03/1443
Eng - Omeir
26

You might also like