A New PWM Controller with One Cycle Response

K. Mark Smith, Zheren Lai, and Keyue M. Smedley

Dept. of Electrical and Computer Engineering
University of California, Irvine, CA 92697

Abstract - This paper proposes a new nonlinear control method. Furthermore, class-D power amplifiers with
technique that has one cycle response, does not need a resettable conventional PWM methods are susceptible to the power
integrator in the control path, and has nearly constant switching supply ripple causing distortion. Typically to alleviate this
frequency. It obtains one cycle response by forcing the error problem, the power source is designed to stringent
between the switched-variable and the control reference to zero
requirements adding cost and complexity to the system.
each cycle. The on-pulse of the controller is adjusted each cycle
by a simple circuit to ensure almost constant switching Since the constant frequency one cycle response method
frequency. The small switching frequency variation due to ensures that each cycle the average value of the switched-
variations in the reference signal and supply voltage and delays variable equals the control reference, they inherently reject
in the circuit are quantified. An additional improvement is power supply disturbances, dramatically lowering the
achieved by using double edge modulation An experimental power source regulation requirements. The precision and
IO& bandwidth, 100 Watt Rh4S power audio amplifier using power supply rejection capability is sigmfkantly lower in
the control method shows THD+N less than 0.62% and power the one cycle control methods that have widely changing
supply ripple rejection (PSRR) of 56dl3 demonstrating the switching frequencies. Reference [4] also made an attempt
applicability of this control technique for high fidelity audio to fix the switching frequency, however this adjustment no
applications.
longer has one cycle response and becomes unstable if duty
I. Introduction ratio is greater than 50%.
This paper proposes a new nonlinear control technique
Switching converters are most often controlled with
that has one cycle response, does not need a fast resettable
pulse-width modulation (PWM). PWM is generally
integrator in the control path, and is suitable for
realized by comparing a modulation signal with a sawtooth
controlling high bandwidth amplifiers with excellent
signal. Linear feedback has traditionally been used to
performance. It obtains one cycle response similar to the
achieve control over certain state variables in the switching
non-constant switching methods described in [11 by forcing
converters. However, nonlinear control of PWM switching
the error between the averaged switched-variable and the
converters have shown excellent improvement compared to
control reference to zero each cycle. However, unlike these
linear feedback methods at optimizing system response,
methods, the on-pulse or off-pulse of the controller is
reducing the distortion, and rejecting power supply
adjusted each cycle by a simple circuit to ensure almost
disturbances [1-71. These techniques improve performance
constant switching frequency. There will be some
over the linearly controlled techniques by directly
switching frequency variation due to the variation in
controlling the switching variables (e.g. switched voltage
power supply and reference signals and delays in the
or current). Reference [ 11 describes several approaches
control circuitry. Quantification of these effects are
that ensure the switching variable exactly equals the
described. Additionally the method is applied to control a
control reference each switching period and thus have one
1OkHz bandwidth power amplifier. The experimental
cycle response. The constant frequency approach in [l] is
transfer function, total harmonic distortion plus noise
simple, robust, and has been applied to high fidelity class-
D audio applications [3]. This technique requires a fast Switched Network
reset circuit and integrator to minimize signal distortion j v,,
during the reset period. The non-constant switching
frequency version of [l] and the method described in [4] i v, switched-variable

are also simple techniques providing one cycle response by

ensuring the error between the switched-variable and the
control reference is zero each cycle. A nice feature of these
techniques is that they do not need a re-settable integrator,
reducing component speed requirements. However, their Adiustable Width
switching frequency is widely changing (over 10 times),
which deteriorates performance.
Class-D power amplifiers for high fidelity audio
amplification require wide bandwidth and low distortion -
-L
which imposes a great challenge to the conventional PWM Fig. 1. Conceptual Qagram of the new control method

$1 0.000 1 997 IEEE

0-7803-3704-2/97 970
 constant width

One Shot
1 I Period 1 Period 2
Fig. 3. Constant one-shot pulse width
Vp = V,l) remains constant. Because INTl forces a
balanced AC waveform, this dramatically decreases the
second switching period. Similar problems occur if the
Vpl or Vp2 have variations.
The required pulse width to maintain constant
switching frequency for any Vpl, Vp2, and Vref can be
found by examining the error integrator operation
equation:

where TE = RECEas shown in Fig. 1 and T,= t2-bis the

switching period. The first term describes the error
integrator operation when Vp = V,l and the second term
describes the operation when V, = Vp2. If T, is assumed to
be constant, the one-shot on time (tone = tl-to) should
satisfy the following.

Rearranging (2) puts it into a form that can be realized

with a simple resettable integrator circuit:

The conceptual diagram with the adjustable one shot

control is shown in Fig. 4. The integrator wheset block is
a normal integrator with input I and output 0 when Ri is
low. Otherwise the output is reset to zero when Ri is high.
During a one-shot period the Ri input is low and the
integrator integrates the Z input until it satisfies (3). The
CMP2 then goes high resetting the flip flop which changes
the state of Vp and resets the integrator until the flip-flop is
set by CMPl at the beginning of the next cycle.
The control circuit has been defined for any switched
network where a switched-variableis to be controlled. The
error integrator INTl ensures one cycle response without a
resettable integrator in the control path. With this circuit,

97 1
 .,....,..,.........,.,, ,
....SwichCdNmok
j v,,
wit&control I V, rwitrhed-varisbk

V8d.
I I
I

Leading Edge i T r a h g Edge i LeadkgEdge i T " g Edge

+---Double Edge -Double Edge1 -

Fig. 5. Double edge modulation

Fig. 4. Complete concq&l diagram 111. Switching Frequency Variation

The derivation in section I1 assumed that Vpl, Vp2 and
Table. 1. Switched-variablevalues for some switching Vref are approximately constant during one switching
converters cycle. However, if these values are changing substantially
Converter I
Edge I I I
Vpi Vp2 tone/Ts during a switching cycle, the switching frequency, f,, will
I modul. I I I be affected. Additionally, the derivation also assumed that
Buck 1 trailing I V, I o I vreog the circuit delays are zero. These delays, inherent in any
circuit, can also affect the switching frequency. This
section shows how the switching frequency is affected by
the variations in Vpl,V,, and Vrefiand non-zero delays in
the circuit.
The exact switching period is found by rewriting (3)
there will be no reset transient when the integrator is not and (1) with Vpl, Vp2, and Vrefasfunction of time:
integrating error. The resettable integrator is used to
control the one-shot pulse width to obtain nearly constant
switching frequency. However, because it does not have to
be reset instantaneously (only before the start of the next
cycle) the reset circuit speed does not have to be very fast.
Table 1 gives some examples of the switched-variable and
hevalues for some commonly used amplifier topologies 0 tom
where V,, Vgl, V g are power supply voltages. Ts is found from ( 5 ) after solving for tone in (4). For
Leading, Trailing, and Double Edge Modulation double edge modulation each half cycle period (trailing
and leading edge) is solved for and then added to obtain
The new control method can be implemented with the complete period.
leading, trailing, and double edge modulation. Notice that For time-varient functions of Vpl(t), Vp2(t), and Vredt),
the term leading edge, trailing edge, and double edge are a closed form solution is not possible. Therefore, a
not identical to the traditionally used ones. Traditionally, computer was used to calculate the switching frequency
the terms leading, trailing, and double edge modulation fluctuations. The results were computed for a trailing and
apply to constant frequency P W M methods. Because the double edge 111 bridge converter with sinusoidal ripple in
frequency is constant, one of the edges or the center of the the power supply, Vg(t), and a sinusoidal reference signal,
pulse is fixed while the other edge is modulated. The edge Vredt).
modulation tries to force the local average of the pulse to
equal the reference signal. The new control method only A. VgInduced& Variation
modulates the pulse width to achieve constant switching Fluctuation of the switching frequency with a constant
frequency. The one cycle response is determined by the reference signal and a changmg power supply were
error integrator equaling zero at the end of the cycle. analyzed by assuming the supply voltage equaled the
Therefore the edge modulation only indirectly controls the following:
local average of the pulse. With these observation, for the
new control method, the terms leading, trailing, and double v , ( t ) =1 + . 2 s i n ( w , r + 9 ) (6).
edge modulation apply to the edge of the PWM pulse that This represents a e o % power supply ripple about the DC
is modulated by the one-shot. Fig. 5 shows how double value. Ts was numerically solved for Merent values of w
edge modulation can be implemented by combining g, $, and Vrec The switching frequency variation in a
leading and trailing edge modulation on alternate half- complete power supply ripple cycle are shown in Fig. 6 for
cycles. the trailing edge modulation and Fig. 7 for the double edge
modulation respectively. F, represents the nominal

972
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._....._._......____..,

1.02 Vref Volts

e
2
+
1.015
1.01
1.005
- -0.7
$
3
1.20

1.10

-
-0.3
6 1
v) 0.99
_*- 0.3

0.7
!.$i
m
0.90
0.985
0.80
0 98
0.975 4 i 070 4 1
0 90 180 270 360 0 90 1x0 270 360
Phase angle (degree) Phase angle (degree)

Fig. 6. f, variation caused by supply ripple vs. I$ for Fig. 8. f, variation caused by VrefVS. I$ for trailing edge
trailing edge modulation when Fs/fg=100 modulation when FJfrd = 10

1.10 ................... .................................................................

~

108
1.06

8
h

1.002
f 1.04
5 1.02
t
m -O-- -0.3
8
i
1.00

l'ooo
*- 0.3 3,o 0.98
.3 0.998 2 0.96
8 0.94
0 996 0.92

, 0.90 4 1
0.994
0 90 1x0 270 360
0 90 180 270 360
Phase angle (degree)
Phase angle (degree)

Fig. 9. f, variation caused by VrefVS. 4 for double edge

Fig. 7. f, variation caused by supply ripple vs. 4 for double modulation when F,/f,,f= 10.
edge modulation when Fs/fg=100
switching frequency when both Vref and Vg are constant. 100.00
Fig. 6 and Fig. 7 are graphs of ffl, vs. I$ when F, is 100
times greater than fg = 5427~.Even at such high power 10.00
supply ripple the switching frequency fluctuation is only
f2.25% and +.5%of the nominal value for trailing edge 8
and double edge modulation respectively. In 20kHz 1>2 1.00

bandwidth audio amplifer applications, the fundamental of 8

the power supply ripple (120Hz) will be more than 2000 0.10
times smaller than the switching frequency (>250kHz).
Therefore, the approximation of constant switching
frequency with respect to a power supply ripple is well 0.01
within reason.
B. VrefInducedfs Vwiation
Fig. 10. Maximum f, variation for different F,/f,,f ratios
Variations in the switching frequency with a constant
power supply and a changing reference signal were modulation and Fig. 9 for double edge modulation
determined assuming that the reference signal equaled the respectively. Fig. 8 and Fig. 9 show f,/F, vs. I$ with F, 10
following: time greater than frefciire42n. Double edge modulation
v,&) = A sin(mr,t + 4 ) shows much less f, variation, +8%, compared to leading
(7). edge modulation ~ 7 % Figure
. shows the maximum f,
Ts was numerically solved for different values of Wrefi 4, variation over a complete signal frequency for different
and A. The calculated frequency variations over a ratios of FJfrGfi Once again the double edge modulation
complete signal cycle are shown in Fig. 8 for trailing edge shows less variation than trailing edge modulation.

973
 One Shot
QW
p
+IdealTs +: td3
Ideal Ts
7T, caused by tdl -+ 4-Ts caused by td2-td3 i

Fig. 11. bl induced fs variation. Fig. 12. b2 and h induced f, variation

Additionally, the amount of variation drops with lower Vref Fig. 12 shows how td2 and t a can effect the switching
peak amplitudes (A) and higher Fs/fref ratios. frequency. The added period caused by the delays is
C. Control Delay Inducedf, Vuriation proportional to the difference in the delays (Q3-k~). This
difference in delays can be thought of as causing the one-
There are three inherent delays in the circuit that can cause shot to turn off before it should. This difference then can
sigmficant switching frequency variation unless corrected cause a substantial decrease in the switching period as
for. The first delay, bl, is defined as the delay from the given by the following equation:
completion of the one shot pulse and the reset of the flip-
flop to the change in V, to Vp2. The second delay, 412, is
the delay from the error integrator equaling zero and
setting the flip-flop to the change in V, to Vpl. The final
delay, h,is the error integrator equaling zero and setting Although (10) shows that when Vref -+ Vp2, AT,z-+ -, if
the flip-flop to the start of the resettable integrator 01;). & and $Q are made equal then the variation will be
Fig. 11 shows how can cause variation is switching neglected. Since h3 will most often be smaller than h2, it
frequency. As shown in the figure, although the one shot is very easy to put in a small delay into the circuit to
has finished its pulse, the output variable does not change completely eliminate this variation. Another solution is to
until a small delay later. Moreover, as shown in the make th~sdelay difference equal to the delay described in
diagram, this small delay can be amplified to cause a much -
(8) (bl = & h2). However, this would need h2 to be
larger switching frequency variation. The added period made larger adding additional error to the one cycle
caused by tdl is dependent on the slopes of the integrator response.
output as shown in below:
IV. Experimental circuit and test results
A. Single Edge vs. Double Edge Modulation
For DC-AC amplifier applications, constant frequency
As shown in (8), when Vref -+ Vp2, ATsl-+ -.
one cycle control leading or trailing edge (single edge)
To compensate for this delay, a linear extrapolator was modulation contain signal distortion because of pulse-
added to the resettable integrator circuitry. This position-modulation caused by the reference signal and
extrapolator ends the one shot period tdl before the end, power supply ripple changes [9]. The new control method
therefore effectively limiting the delay. It does this by
will not have exactly constant switching frequency when
using the slope of integrator output and multiplies that by
either Vrefor the switching variable values V,l and Vp2 are
& ~ before
l subtracting it from the CMp2 negative input. changing. Although this fluctuation is small, because it is
Conveniently, the slope of the integrators output is added to the pulse position modulation effect, single edge
proportional to its input and therefore the resettable
modulation produces too much signal distortion for high
integrator circuit equation (3) is modified slightly below: fidelity audio applications with a reasonable switching
speed. However, double edge modulation eliminates the
pulse position modulation and reduces switching frequency
variations as shown in Section 111. Therefore, the
Inclusion of the extrapolator in the circuit needs at most experimental circuit incorporated double edge modulation.
one additional input into the adder for CMP2.

974
 V.

-".,
Fig. 14. Double Edge Modulation Theoretical Waveforms

Adjustable Widul One Shot

Fig. 13. Double Edge Modulated Implementation

B. Experimental Circuit
A 100 watt RMS, lOkHz bandwidth audio amplifier
was built to prove theoretical expectation of the control
method performance. The bus voltage is 50 volts and the
nominal switching frequency is 1OOkHz. The circuit uses
double edge modulation because of its improved
performance. By optimizing components, a double edge Fig. 15. Experimental switching frequency variation due
modulator can be built with only a few additional parts to reference signal.
compared to the single edge modulator implementation.
Fig. 13 shows the implementation for a full bridge DC-AC C. fiperimentalf, variadion by V&
power amplifier and Fig. 14 shows the theoretical The switching frequency variation was tested for a
waveforms. This implementation uses only one additional sinusoidal control reference signal shown in Fig. 15. The
summer, a switch, and a few logic gates to implement the frequency of the reference signal is 10 times lower than the
double edge modulation. The four state state-machine is switching frequency (100H-I~)and the test was performed
used to alternately perform leading and trailing edge for normalized peak reference voltages of .8 and .6. The
modulation on alternate half cycles. Table 2 describes and results matches very well with the theoretical prediction
gives the output values for these states. At time to the one shown in Fig 9. The maximum variation is less than
shot is triggered to start a leading edge modulated half flOkHz (*lo%)>. The phase delay in the experimental
cycle with the state machine in state S1 and V, = -Vg results is inherent to the time-to-voltage converter
When the one shot integrator equals -(V,-V,f> at tl, CMP2 (Tektronix TVC501) used for the measurement.
goes high and triggers the state machine to the next state.
D. Vref to Switched-Variable Vp Transfer Function
Now, Vp = V, and the error integrator, VE, integrates until
it reaches zero at t2 and CMPl becomes zero. Then the The normalized transfer function from Vref to the
one shot is started again and for this half cycle the switched-variable Vp is shown in Fig 16. The magnitude
operation is a trailing edge PWM modulator. When the is constant and the phase delay is minimal over the
one shot integrator equals -(Vg+Vref)at t3 CMP2 goes high complete bandwidth as is expected for one cycle controlled
and triggers the state machine to Sq. Vp become -Vg again amplifiers [3] . Therefore the overall response of the
and the error integrator integrates until the it reaches zero system will be determined by the low pass filter on the
at 4 and the operation is repeated cycle by cycle. output.
Table 2. State assignment and output values E. Total Harmonic Distortion plus Noise (THD+N
State I Description Qi Qz
The THD+N response of the system was tested and
s1 I One shot : Vp = -Vg I o I o shown in Fig. 17 for different values of output power. The
S2 I I
~ E r e t c l m s t o ~ e r o : ~ p = v g1 1
results show the excellent performance the system obtained
s3 One Shot : Vp = Vg 1 0
maintaining less than 0.62% THD+N over the complete
s4 VE returns to zero: Vp = -Vg 0 1
frequency range.

975
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~ ~ ~

- 0 0.6
0 RMS
$
$
P

i5
-2

-4

-6
-8
,-.
z
0.5

d 0.4
0.3

0.2
,
1
---t 83W

-10 0.1
10 100 1000 10000 100000
Frequency ( H I ) 0
0 2000 4000 6000 8000 10000
(a) Freq (Hz)

4
Fig. 17. THD + N for Werent output power
2

0
a -40 00
1 -2
5
-50 00
i -4
-6
-60 00
-8
8
-10
1 10 100 1000
Freq (Hz)
10000 100000 d -7000
-8000

0) -90 00
Fig. 16. Transfer function Vflrefi (a) magnitude (b) phase.
-10000
10 100 1000 10000
F. Power Srcpply Rippie Rejection (PSRR) Frequency (Kzf

The PSRR test was performed by inducing an Fig. 18. Power Supply Ripple Rejection for a DC output.
intentional ripple in the power supply of 20% (Vg = 40 +
4sin(ogt)). The frequency was then swept and the gain of edge modulation. The non-ideal circuit delay induced
the power supply ripple to output is shown in Fig. 18 for switching frequency variations were analyzed and simple
different DC Vref signals represented by duty ratio. This solutions were derived. A 100 Watt RMS power and
101;HZ bandwidth full bridge converter was built to venfy
figure shows the excellent power supply ripple rejection
the applicability of the control to high fidelity audio
this control method obtains. Low frequency noise is
applications. The results show excellent THD+N levels
attributed to the slight rise in rejection below 6OHz. At
120Hz, the fundamental of a AC-DC rectii7er, the rejection and superb rejection of the power supply disturbances.
is more than 65dB. References
V. Conclusion K. M. Smedley and S. Cuk, “One Cycle control of switching
converters,” in IEEE PESC, 1991 Record, pp.1173-1180
A new non-linear control technique was presented that “Dynamics of one-cycle controlled Cuk converter,” IEEE
Tram. Power Eledron., vol. 10, no. 6 p. 625-633, Nov. 1995.
provides one cycle response and nearly constant fresuency 2. Lai and K.M. Smedley, “A new extension of one cycle control
without the need of a resettable integrator in the control and its application to switching power amplifiers,” IEEE Trans.
path. It combines the performance characteristics of the Power Electron., vol 11, no. 1, pp. 99-106, Nov. 1995
F.C. Schwarz, “Engineering information on an analog signal to
constant frequency one cycle control in [l] without the discrete time interval converter (ASDTIC),” NASA CR-134544,
need of a fast integrator reset circuit to minimize signal 1974.
distortion. The theoretical equation for the control circuit A Capel, et al. “Application of the injected current model for the
are derived for any switched network where a switched- dynamic analysis of the switching regulators with the new
concept of LCJ modulator,’ in IEEE PESC, 1978 record, pp.
variable is to be controlled. To obtain nearly constant 135-147.
switching fkequency, the pulse width of the one shot is C. W. Deisch, “Simple switching control method changes power
modulated by a simple circuit. Due to changing power converter into a current source,” in IEEE PESC, 1978 Record,
pp. 300-306.
supply and reference signals and non-ideal circuit delays, P. Maranesi; L. Pinola; V. Varoli, “The incremental voltage
there will be some variation in switching frequency. control mode for PWM regulators,” IEEE PESC 1988. p. 549-54
Computer analysis demonstrated that the effect of a vol. 1
Z. Lai and K. M. Smedley, “A general constant frequency pulse-
changing power supply has little effect on the switching width modulator and its applications,” in HFPC, 1996 Record,
frequency. The changing reference signal vs. switching ~~279-290.
frequency variation analysis shows that double edge K.M. Smedley, “Integrators in pulse width modulation,’’ in IEEE
Power Electronics Specialist Conference, 1996 Record
modulation obtains excellent improvement over single

976