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Module 1 - Lecture 5

The document discusses memory segmentation and addressing modes in 8086 microprocessors. Memory segmentation divides main memory into segments that each have a base address to increase execution speed. The 8086 has 16 segments that are each 64KB in size. Addressing modes describe how operands are accessed and include immediate, direct, register, register indirect, indexed, register relative, based indexed, and relative based indexed modes. Control transfer instructions have intersegment or intrasegment addressing depending on if the destination is in the same or different segment.

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0% found this document useful (0 votes)
32 views

Module 1 - Lecture 5

The document discusses memory segmentation and addressing modes in 8086 microprocessors. Memory segmentation divides main memory into segments that each have a base address to increase execution speed. The 8086 has 16 segments that are each 64KB in size. Addressing modes describe how operands are accessed and include immediate, direct, register, register indirect, indexed, register relative, based indexed, and relative based indexed modes. Control transfer instructions have intersegment or intrasegment addressing depending on if the destination is in the same or different segment.

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Ritoban Sengupta
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Microprocessor & Microcontroller (Module - 1)

Mr. Kaushik Neogi


DEPT. OF EE, ASANSOL ENGINEERING COLLEGE
Paper Code: PC-EE-602

Lecture 5
Contents: 2

 Memory Segmentation
 Addressing modes of 8086
 Forming the effective Addresses
 References
Memory Segmentation:
3

 It is the process in which the main memory of computer is divided


into different segments and each segment has its own base address.

 Segmentation is used to increase the execution speed of computer


system so that processor can able to fetch and execute the data
from memory easily and fastly.
Memory Segmentation:
4
 The memory in an 8086 based system is organized as segmented
memory.
 The CPU 8086 is able to access 1MB of physical memory. The
complete 1MB of memory can be divided into 16 segments, each of
64KB size and is addressed by one of the segment register.
 The 16-bit contents of the segment register actually point to the
starting location of a particular segment. The address of the
segments may be assigned as 0000H to F000h respectively.
 To address a specific memory location within a segment, we need
an offset address. The offset address values are from 0000H to
FFFFH so that the physical addresses range from 00000H to
FFFFFH.
Memory Segmentation:
5
Memory Segmentation:
6
Physical address is calculated as
below:
Ex: Segment address ---- 1005H
Offset address ----------- 5555H
Segment address ----- 1005H ---- 0001 0000 0000 0101
Shifted left by 4 Positions 0001 0000 0000 0101 0000
+
Offset address --- 5555H ------ 0101 0101 0101 0101
----------------------------------------------------
Physical address -------155A5H 0001 0101 0101 1010 0101

Physical address = Segment address * 10H + Offset address.


Memory Segmentation:
7
The main advantages of the segmented memory scheme are as
follows:

1. Allows the memory capacity to be 1MB although the actual


addresses to be handled are of 16-bit size.
2. Allows the placing of code, data and stack portions of the
same program in different parts (segments) of memory, for
data and code protection.
3. Permits a program and/or its data to be put into different
areas of memory each time the program is executed, i.e.,
provision for relocation is done.
Memory Segmentation:
8
Overlapping segment:
• A segment starts at a particular address and its maximum
size can go up to 64 Kbytes. But if another segment starts along this 64
Kbytes location of the first segment, the two segments are said to be
overlapping segment.
• The area of memory from the start of the second segment
to the possible end of the first segment is called as overlapped segment.
Non Overlapped Segment:
• A segment starts at a particular address and its maximum
size can go up to 64 Kbytes. But if another segment starts before this 64
Kbytes location of the first segment, the two segments are said to be
Non- overlapping segment.
Addressing modes of 8086:
9
• Addressing mode indicates a way of locating data or operands.
• The addressing modes describe the types of operands and the way
they are accessed for executing an instruction.
• According to the flow of instruction execution, the instructions
may be categorized as
1) Sequential control flow instructions and
2) Control transfer instructions
Sequential control flow instructions are the instructions,
which after execution, transfer control to the next instruction
appearing immediately after it (in the sequence) in the program. For
example, the arithmetic, logic, data transfer and processor control
instructions are sequential control flow instructions.
Addressing modes of 8086:
10
The control transfer instructions, on the other hand, transfer
control to some predefined address or the address somehow specified
in the instruction, after their execution. For example, INT, CALL,
RET and JUMP instructions fall under this category.
The addressing modes for sequential control transfer instructions
are:

1. Immediate: In this type of addressing, immediate data is a part


of instruction and appears in the form of successive byte or bytes.
Ex: MOV AX, 0005H

In the above example, 0005H is the immediate data. The immediate


data may be 8-bit or 16-bit in size.
Addressing modes of 8086:
11
2. Direct: In the direct addressing mode a 16-bit memory address
(offset) is directly specified in the instruction as a part of it.

Ex: MOV AX, [5000H]


Here, data resides in a memory location in the data segment, whose
effective address may be completed using 5000H as the offset address
and content of DS as segment address. The effective address here, is
10H * DS + 5000H.

3. Register: In register addressing mode, the data is stored in a


register and is referred using the particular register. All the registers,
except IP, may be used in this mode.
Ex: MOV BX, AX
Addressing modes of 8086:
12
4. Register Indirect: Sometimes, the address of the memory
location, which contains data or operand, is determined in an indirect
way, using the offset register. This mode of addressing is known as
register indirect mode. In this addressing mode, the offset address of
data is in either BX or SI or DI register. The default segment is either
DS or ES. The data is supposed to be available at the address pointed
to by the content of any of the above registers in the default data
segment.
Ex: MOV AX, [BX]

Here, data is present in a memory location in DS whose offset address


is in BX. The effective address of the data is given as 10H * DS+[BX].
Addressing modes of 8086:
13
5. Indexed: In this addressing mode, offset of the operand is
stored in one of the index registers. DS and ES are the default
segments for index registers, SI and DI respectively. This is a special
case of register indirect addressing mode.

Ex: MOV AX, [SI]

Here, data is available at an offset address stored in SI in DS. The


effective address, in this case, is computed as 10*DS+[SI].
Addressing modes of 8086:
14
6. Register Relative: In this addressing mode, the data is available
at an effective address formed by adding an 8-bit or 16-bit
displacement with the content of any one of the registers BX, BP, SI
and DI in the default (either DS or ES) segment.
Ex: MOV AX, 50H[BX]
Here, the effective address is given as 10H *DS+50H+[BX]
7. Based Indexed: The effective address of data is formed, in this
addressing mode, by adding content of a base register (any one of BX
or BP) to the content of an index register (any one of SI or DI). The
default segment register may be ES or DS.
Ex: MOV AX, [BX][SI]
Here, BX is the base register and SI is the index register the effective
address is computed as 10H * DS + [BX] + [SI].
Addressing modes of 8086:
15
8. Relative Based Indexed: The effective address is formed by
adding an 8 or 16-bit displacement with the sum of the contents of
any one of the base register (BX or BP) and any one of the index
register, in a default segment.

Ex: MOV AX, 50H [BX] [SI]

Here, 50H is an immediate displacement, BX is base register and SI is


an index register the effective address of data is computed as
10H * DS + [BX] + [SI] + 50H
Addressing modes of 8086:
16
For control transfer instructions, the addressing modes depend upon
whether the destination is within the same segment or different one. It
also depends upon the method of passing the destination address to the
processor.
Basically, there are two addressing modes for the control transfer
instructions, intersegment addressing and intrasegment addressing
modes.

If the location to which the control is to be transferred lies in a different


segment other than the current one, the mode is called intersegment
mode.

If the destination location lies in the same segment, the mode is called
intrasegment mode.
Addressing modes of 8086:
17

Intersegment direct

Intersegment

Modes for control Intersegment indirect


Transfer instructions Intrasegment direct

Intrasegment

Intrasegment indirect
Addressing modes for Control Transfer Instructions
Addressing modes of 8086:
18
9. Intrasegment Direct Mode: In this mode, the address to which the
control is to be transferred lies in the same segment in which the
control transfer instruction lies and appears directly in the
instruction as an immediate displacement value. In this addressing
mode, the displacement is computed relative to the content of the
instruction pointer IP.

10. Intrasegment Indirect Mode: In this mode, the displacement to


which the control is to be transferred, is in the same segment in
which the control transfer instruction lies, but it is passed to the
instruction indirectly. Here, the branch address is found as the
content of a register or a memory location. This addressing mode
may be used in unconditional branch instructions.
Addressing modes of 8086:
19
11. Intersegment Direct: In this mode, the address to which the control
is to be transferred is in a different segment. This addressing mode
provides a means of branching from one code segment to another
code segment. Here, the CS and IP of the destination address are
specified directly in the instruction.

12. Intersegment Indirect: In this mode, the address to which the


control is to be transferred lies in a different segment and it is
passed to the instruction indirectly, i.e contents of a memory block
containing four bytes, i.e IP (LSB), IP(MSB), CS(LSB) and CS
(MSB) sequentially. The starting address of the memory block may
be referred using any of the addressing modes, except immediate
mode.
Forming the effective Addresses:
20
The following examples explain forming of the effective addresses in
the different modes.

Ex: 1. The contents of different registers are given below. Form


effective addresses for different addressing modes.

Offset (displacement)=5000H

[AX]-1000H, [BX]- 2000H, [SI]-3000H, [DI]-4000H, [BP]-5000H,


[SP]-6000H, [CS]-0000H, [DS]-1000H, [SS]-2000H, [IP]-7000H

Shifting segment address four bits to the left is equivalent to


multiplying it by 16D or 10H .
Forming the effective Addresses:
21
i. Direct addressing mode:

MOV AX,[5000H]

DS : OFFSET  1000H : 5000H

10H*DS  10000—segment address

offset  +5000---offset address

------------------
15000H – Effective address
Forming the effective Addresses:
22
ii. Register indirect:

MOV AX, [BX]

DS : BX  1000H : 2000H

10H*DS  10000—segment address

[BX]  +2000---offset address

------------------
12000H – Effective address
Forming the effective Addresses:
23
iii. Register relative:

MOV AX, 5000 [BX]

DS : [5000+BX]

10H*DS  10000—segment address

offset address  +5000

[BX]  +2000

17000H – Effective address


Forming the effective Addresses:
24
iv. Based indexed:

MOV AX, [BX] [SI]

DS : [BX+SI]

10H*DS  10000—segment address

[BX]  +2000

[SI]  +3000

15000H – Effective address


Forming the effective Addresses:
25
v. Relative based index:

MOV AX, 5000[BX][SI]


DS : [BX+SI+5000]
10H*DS  10000—segment address

[BX]  +2000

[SI]  +3000

+5000

1A000H – Effective address


References: 26

1. Advanced Microprocessors and Peripheral, Koshor M Bhurchandi, Ajay


Kumar Ray, 3rd Edition, MC Graw hill education.
2. Microprocessor & Interfacing, D.V. Hall, Mc Graw Hill.
3. Microprocessor & Peripherals, S.P. Chowdhury & S. Chowdhury, Scitech.
4. The 8086 Microprocessors: Programming & Interfacing the PC, K.J.Ayala,
Thomson.

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