DIGITAL LOGIC & DESIGN (EE-227)

ASSIGNMENT #3
ID: __________ NAME: __________________ SECTION: ____

1. Consider the following combinational circuit

a. Derive the Boolean expressions for the outputs F1 and F2 as a function of the four inputs.
b. List the truth table with 16 binary combinations of the four input variables. Then list the binary values for T1
through T4 and outputs F1 and F2 in the table.
c. Simplify Boolean expressions of F1 and F2 using Boolean algebra and K-maps.
d. List the truth table for simplified expression F1 and F2 and compare both truth tables

EXPRESSIONS

TRUTH TABLE
A B C D T1 T2 T3 T4 F1 F2
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
 ASSIGNMENT # 3 [EE-227]
SIMPLICATION OF EXPRESSIONS:

TRUTH TABLE
A B C D F1 F2 A B C D F1 F2
0 0 0 0 0 8 1 0 0 0
1 0 0 0 1 9 1 0 0 1
2 0 0 1 0 10 1 0 1 0
3 0 0 1 1 11 1 0 1 1
4 0 1 0 0 12 1 1 0 0
5 0 1 0 1 13 1 1 0 1
6 0 1 1 0 14 1 1 1 0
7 0 1 1 1 15 1 1 1 1
COMPARE RESULTS:

2
 ASSIGNMENT # 3 [EE-227]
2. Consider the following combinational circuit

a. Derive the Boolean expressions for the output F1 as a function of the four inputs.
b. List the truth table with 16 binary combinations of the four input variables. Then list the binary values output F1
in the table.
c. Simplify Boolean expressions of F1 using Boolean algebra and K-maps.
d. List the truth table for simplified expression F1 and compare both truth tables.

EXPRESSION

TRUTH TABLE
A B C D F1 A B C D F1
0 0 0 0 0 8 1 0 0 0
1 0 0 0 1 9 1 0 0 1
2 0 0 1 0 10 1 0 1 0
3 0 0 1 1 11 1 0 1 1
4 0 1 0 0 12 1 1 0 0
5 0 1 0 1 13 1 1 0 1
6 0 1 1 0 14 1 1 1 0
7 0 1 1 1 15 1 1 1 1

3
 ASSIGNMENT # 3 [EE-227]
SIMPLICATION OF EXPRESSION:

TRUTH TABLE
A B C D F1 A B C D F1
0 0 0 0 0 8 1 0 0 0
1 0 0 0 1 9 1 0 0 1
2 0 0 1 0 10 1 0 1 0
3 0 0 1 1 11 1 0 1 1
4 0 1 0 0 12 1 1 0 0
5 0 1 0 1 13 1 1 0 1
6 0 1 1 0 14 1 1 1 0
7 0 1 1 1 15 1 1 1 1
COMPARE RESULTS:

4
 ASSIGNMENT # 3 [EE-227]
3. Design a combinational circuit that converts a three-bit Binary number to a 3-bit Gray code.
NOTE: Implement the circuit with exclusive-OR gates.

TABLE
BINARY GRAY CODE
A B C G2 G1 G0
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
SIMPLIFICATION:

EXPRESSIONS:

5
 ASSIGNMENT # 3 [EE-227]
4. Design a combinational circuit that converts a 3-bit Gray code to a three-bit Binary number.
NOTE: Implement the circuit with exclusive-OR gates.

TABLE
GRAY CODE BINARY
G2 G1 G0 A B C
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
SIMPLIFICATION:

EXPRESSIONS:

6
 ASSIGNMENT # 3 [EE-227]
5. Design a combinational circuit that converts a bit four binary number to a four-bit Gray code.

BINARY GRAY CODE

A B C D G3 G2 G1 G0
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
SIMPLIFICATION:

EXPRESSIONS:

7
 ASSIGNMENT # 3 [EE-227]
6. Design a combinational circuit that converts a BCD to an 8,4, -2, -1 code.

BCD CODE 8,4, -2, -1 CODE

A B C D 8 4 -2 -1
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
SIMPLIFICATION:

EXPRESSIONS:

8
 ASSIGNMENT # 3 [EE-227]
7. Design 4-bit adder using just Half adders? Only circuit required?

8. Convert following 4-bit adder to 4-bit subtractor circuit? So it could perform operation A-B?
Note: B could be represented in 2’s complement

9
 ASSIGNMENT # 3 [EE-227]
9. Perform unsigned Addition A+B where A= 9 and B= 7 using Following is 4-adder/subtractor circuit? Also write short
note on working of C and V bits for signed and unsigned addition/subtraction

10
 ASSIGNMENT # 3 [EE-227]
10. Design Circuit that accepts 4-bit BCD number as input and Detects BCD is valid/invalid?

A B C D F A B C D F
0 0 0 0 0 8 1 0 0 0
1 0 0 0 1 9 1 0 0 1
2 0 0 1 0 10 1 0 1 0
3 0 0 1 1 11 1 0 1 1
4 0 1 0 0 12 1 1 0 0
5 0 1 0 1 13 1 1 0 1
6 0 1 1 0 14 1 1 1 0
7 0 1 1 1 15 1 1 1 1
SIMPLIFICATION:

EXPRESSIONS:

11. Perform BCD Addition using following circuit? BCD numbers are given in boxes on top?

11
 ASSIGNMENT # 3 [EE-227]
12. Perform BCD addition (258)BCD+ (449) BCD using following circuit?

12
 ASSIGNMENT # 3 [EE-227]
13. Implement the binary arithmetic operation (A-B), using the following 8-bit addition/Subtraction circuit?
A= (52)10= (?)2 B= (25)10= (?)2

13
 ASSIGNMENT # 3 [EE-227]
14. Design a single bit comparator from the following table? Write expression for A==B, A<B and A>B? Design circuit
from expression using logic gates?
TABLE:
INPUT OUTPUT
A B A>B A==B A<B
0 0
0 1
1 0
1 1

EXPRESSIONS
FA==B =

FA > B =

FA < B =

15. Write expression for 5-bit comparator? (Use section 4.6(Morris Mono) to design 5-bit comparator)

EXPRESSIONS
FA==B =

FA > B =

FA < B =

16. Apply the Waveform give below to the comparator circuit. Determine the output waveforms of A==B, A<B, A>B
which are active low enable.

WAVEFORMS
FA==B =

FA > B =

FA < B =

14
 ASSIGNMENT # 3 [EE-227]
17. Design following 2x4 Decoder? For reference see Section 4.9(figure 4.19)

BLOCK DIAGRAM

TABLE
INPUT OUTPUT
E1 ̅̅
𝑬̅̅𝟎 𝑰̅𝟏 𝑰̅𝟎 ̅̅̅̅
𝑶𝟎 ̅̅̅̅
𝑶𝟏 ̅̅̅̅
𝑶𝟐 ̅̅̅̅
𝑶𝟑

EXPRESSIONS:
̅̅̅̅
𝑶𝟎 =
̅̅̅̅
𝑶𝟏 =
̅̅̅̅
𝑶𝟐 =
̅̅̅̅
𝑶𝟐 =

15
 ASSIGNMENT # 3 [EE-227]
18. Use 2x4 decoder to design 3x8 decoder? Rename OUTPUTS and identify least and most decoder

19. Use following 2x4 decoders to implement given function

a. F(A,B,C)= ∑(0,1,2,4,6) b. 𝐹 (𝐴, 𝐵, 𝐶 ) = ∏(1,4,5,6)

16
 ASSIGNMENT # 3 [EE-227]

c. F(A,B,C)= ∑(0,1,2,4,6) d. 𝐹 (𝐴, 𝐵, 𝐶 ) = ∏(1,4,5,6)

e. F(A,B,C)= ∑(0,1,2,4,6) f. 𝐹 (𝐴, 𝐵, 𝐶 ) = ∏(1,4,5,6)

17
 ASSIGNMENT # 3 [EE-227]
g. F(A,B,C)= ∑(0,1,2,4,6) h. 𝐹 (𝐴, 𝐵, 𝐶 ) = ∏(1,4,5,6)

20. Use following 2x4 decoder to construct 4 X 16 decoder. You are not supposed to use any external gates?

18
 ASSIGNMENT # 3 [EE-227]
21. Design following 3x8 Decoder? For reference see Section 4.9(figure 4.18, table 4.6)

BLOCK DIAGRAM

TABLE
INPUT OUTPUT
̅̅
𝑬̅̅𝟎 𝐸1 A B C ̅̅̅
𝐷0 ̅̅̅1
𝐷 ̅̅̅
𝐷2 ̅̅̅
𝐷3 ̅̅̅
𝐷4 ̅̅̅
𝐷5 ̅̅̅
𝐷6 ̅̅̅
𝐷7
X X X 1 1 1 1 1 1 1 1
X X X 1 1 1 1 1 1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
EXPRESSIONS
̅̅̅̅
𝑫𝟎 = ̅̅̅̅
𝑫𝟏 = ̅̅̅̅
𝑫𝟐 =
̅̅̅̅
𝑫𝟑 = ̅̅̅
𝐷4 = ̅̅̅
𝐷5 =
̅̅̅̅
𝑫𝟔 = ̅̅̅̅
𝐷7 =

19
 ASSIGNMENT # 3 [EE-227]
22. Use above designed 3 X 8 decoder to design 4 X 16 23. Implement following function using two 3 X 8
decoder decoder F(A,B,C,D)= ∑(𝟎, 𝟑, 𝟓, 𝟕, 𝟏𝟏, 𝟏𝟓)

24. Design 4X2 Low Priority Encoder? For reference see section 4.10(table 4.8)

TABLE
INPUT OUTPUT
D0 D1 D2 D3 A B Valid
0 0 0 0
1 X X X
0 1 X X
0 0 1 X
0 0 0 1
SIMPLIFICATION AND EXPESSIONS

20
 ASSIGNMENT # 3 [EE-227]
25. Design 8 X 3 Low Priority Encoder? For reference see slides Lec_17 uploaded on google classroom?

TABLE
INPUTS OUTPUTS
I0 I1 I3 I4 I5 I6 I7 00 01 O2
1 X X X X X X
0 1 X X X X X
0 0 1 X X X X
0 0 0 1 X X X
0 0 0 0 1 X X
0 0 0 0 0 1 X
0 0 0 0 0 0 1
SIMPLIFICATION AND EXPRESSION

26. Use following 4 X 1 multiplexer to create 8 X 1 multiplexer?

21
 ASSIGNMENT # 3 [EE-227]
27. Use following 4 X 1 multiplexer to create 16 X 1 multiplexer?

22
 ASSIGNMENT # 3 [EE-227]
28. Use following 8 X 1 multiplexer to create 16 X 1 multiplexer?

29. Implement given function using 8 X 1 multiplexer? 𝑭(𝒙, 𝒚, 𝒛) = ∑(𝟎, 𝟏, 𝟐, 𝟒, 𝟓, 𝟔)

23
 ASSIGNMENT # 3 [EE-227]
30. Implement given function using 4 X 1 multiplexer? 𝑭(𝒙, 𝒚, 𝒛) = ∑(𝟎, 𝟏, 𝟐, 𝟒, 𝟓, 𝟔)

TABLE
X Y Z F
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

31. Implement given function using 8 X 1 multiplexer? 𝑭(𝒘, 𝒙, 𝒚, 𝒛) = ∑(𝟎, 𝟐, 𝟓, 𝟕, 𝟖, 𝟏𝟎, 𝟏𝟐, 𝟏𝟑, 𝟏𝟒, 𝟏𝟓)

24