Quectel EC200T Hardware Design

EC200T
Hardware Design
LTE Standard Module Series
Rev. EC200T_Hardware_Design_V1.0
Date: 2019-09-12
Status: Released
www.quectel.com
EC200T Hardware Design
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EC200T_Hardware_Design 1 / 83
About the Document
History
Revision Date Author Description
Jaye SANG/
1.0 2019-09-12 Initial
Niko WU
Contents
About the Document ................................................................................................................................... 2

Contents ....................................................................................................................................................... 2
Table Index ................................................................................................................................................... 4
Figure Index ................................................................................................................................................. 6
1 Introduction .......................................................................................................................................... 8
1.1. Safety Information...................................................................................................................... 9
2 Product Concept ................................................................................................................................ 10

2.1. General Description ................................................................................................................. 10
2.2. Key Features ........................................................................................................................... 11
2.3. Functional Diagram ................................................................................................................. 13
2.4. Evaluation Board ..................................................................................................................... 14
3 Application Interfaces ....................................................................................................................... 15

3.1. General Description ................................................................................................................. 15
3.2. Pin Assignment ........................................................................................................................ 16
3.3. Pin Description......................................................................................................................... 17
3.4. Operating Modes ..................................................................................................................... 25
3.5. Power Saving........................................................................................................................... 26
3.5.1. Sleep Mode .................................................................................................................... 26
3.5.1.1. UART Application ................................................................................................. 26
3.5.1.2. USB Application with USB Remote Wakeup Function ........................................ 26
3.5.1.3. USB Application with USB Suspend/Resume and MAIN_RI Wakeup Function . 27
3.5.1.4. USB Application without USB Suspend Function ................................................ 28
3.5.2. Airplane Mode ................................................................................................................ 28
3.6. Power Supply........................................................................................................................... 29
3.6.1. Power Supply Pins ......................................................................................................... 29
3.6.2. Decrease Voltage Drop .................................................................................................. 30
3.6.3. Reference Design for Power Supply .............................................................................. 31
3.7. Power-on/off/Reset Scenarios ................................................................................................. 31
3.7.1. Turn on Module Using the PWRKEY ............................................................................. 31
3.7.2. Turn off Module .............................................................................................................. 33
3.7.2.1. Turn off Module Using the PWRKEY Pin............................................................. 34
3.7.2.2. Turn off Module Using AT Command ................................................................... 34
3.7.3. Reset the Module ........................................................................................................... 34
3.8. (U)SIM Interface ...................................................................................................................... 36
3.9. USB Interface .......................................................................................................................... 38
3.10. UART Interfaces ...................................................................................................................... 40
3.11. PCM and I2C Interfaces .......................................................................................................... 42
3.12. SD Card Interface*................................................................................................................... 44
3.13. WLAN Interface* ...................................................................................................................... 46
3.14. ADC Interfaces ........................................................................................................................ 47
3.15. Network Status Indication ........................................................................................................ 48

3.16. STATUS ................................................................................................................................... 49
3.17. Behaviors of the MAIN_RI ....................................................................................................... 50
3.18. FORCE_USB_BOOT Interface ............................................................................................... 51
4 Antenna Interfaces............................................................................................................................. 53
4.1. Main/Rx-diversity Antenna Interfaces ...................................................................................... 53
4.1.1. Pin Definition .................................................................................................................. 53
4.1.2. Operating Frequency ..................................................................................................... 53
4.1.3. Reference Design of RF Antenna Interface ................................................................... 55
4.1.4. Reference Design of RF Layout..................................................................................... 56
4.2. Antenna Installation ................................................................................................................. 58
4.2.1. Antenna Requirement .................................................................................................... 58
4.2.2. Recommended RF Connector for Antenna Installation ................................................. 58
5 Electrical, Reliability and Radio Characteristics ............................................................................ 60

5.1. Absolute Maximum Ratings ..................................................................................................... 60
5.2. Power Supply Ratings ............................................................................................................. 61
5.3. Operation and Storage Temperatures ..................................................................................... 61
5.4. Current Consumption .............................................................................................................. 62
5.5. RF Output Power ..................................................................................................................... 65
5.6. RF Receiving Sensitivity .......................................................................................................... 66
5.7. Electrostatic Discharge ............................................................................................................ 67
6 Mechanical Dimensions .................................................................................................................... 68

6.1. Mechanical Dimensions of the Module.................................................................................... 68
6.2. Recommended Footprint ......................................................................................................... 70
6.3. Design Effect Drawings of the Module .................................................................................... 71
7 Storage, Manufacturing and Packaging .......................................................................................... 72

7.1. Storage..................................................................................................................................... 72
7.2. Manufacturing and Soldering .................................................................................................. 73
7.3. Packaging ................................................................................................................................ 74
8 Appendix A References..................................................................................................................... 76
9 Appendix B GPRS Coding Schemes ............................................................................................... 80
10 Appendix C GPRS Multi-slot Classes .............................................................................................. 81
11 Appendix D EDGE Modulation and Coding Schemes ................................................................... 83
Table Index
TABLE 1: FREQUENCY BANDS OF EC200T-CN MODULE ........................................................................... 10

TABLE 2: FREQUENCY BANDS OF EC200T-EU MODULE ............................................................................ 10
TABLE 3: KEY FEATURES OF EC200T MODULE ............................................................................................ 11
TABLE 4: I/O PARAMETERS DEFINITION ....................................................................................................... 17
TABLE 5: PIN DESCRIPTION ........................................................................................................................... 17
TABLE 6: OVERVIEW OF OPERATING MODES ............................................................................................. 25
TABLE 7: POWER SUPPLY AND GND PINS ................................................................................................... 29
TABLE 8: PIN DESCRIPTION OF PWRKEY .................................................................................................... 31
TABLE 9: PIN DESCRIPTION OF RESET_N ................................................................................................... 35
TABLE 10: PIN DEFINITION OF (U)SIM INTERFACE ..................................................................................... 36
TABLE 11: PIN DESCRIPTION OF USB INTERFACE ..................................................................................... 39
TABLE 12: PIN DEFINITION OF MAIN UART INTERFACE ............................................................................. 40
TABLE 13: PIN DEFINITION OF DEBUG UART INTERFACE ......................................................................... 41
TABLE 14: LOGIC LEVELS OF DIGITAL I/O .................................................................................................... 41
TABLE 15: PIN DEFINITION OF PCM AND I2C INTERFACES ....................................................................... 43
TABLE 16: PIN DEFINITION OF SD CARD INTERFACE ................................................................................ 44
TABLE 17: PIN DEFINITION OF WLAN INTERFACE ...................................................................................... 46
TABLE 18: PIN DEFINITION OF ADC INTERFACES ....................................................................................... 48
TABLE 19: CHARACTERISTIC OF THE ADC .................................................................................................. 48
TABLE 20: PIN DEFINITION OF NETWORK CONNECTION STATUS/ACTIVITY INDICATION..................... 48
TABLE 21: WORKING STATE OF NETWORK CONNECTION STATUS/ACTIVITY INDICATION .................. 49
TABLE 22: PIN DEFINITION OF STATUS ........................................................................................................ 50
TABLE 23: BEHAVIORS OF THE MAIN_RI ...................................................................................................... 51
TABLE 24: PIN DEFINITION OF FORCE_USB_BOOT INTERFACE .............................................................. 51
TABLE 25: PIN DEFINITION OF RF ANTENNAS ............................................................................................. 53
TABLE 26: EC200T-CN OPERATING FREQUENCIES .................................................................................... 53
TABLE 27: EC200T-EU OPERATING FREQUENCIES .................................................................................... 54
TABLE 28: ANTENNA REQUIREMENTS.......................................................................................................... 58
TABLE 29: ABSOLUTE MAXIMUM RATINGS .................................................................................................. 60
TABLE 30: THE MODULE POWER SUPPLY RATINGS .................................................................................. 61
TABLE 31: OPERATION AND STORAGE TEMPERATURES .......................................................................... 61
TABLE 32: EC200T-CN CURRENT CONSUMPTION ...................................................................................... 62
TABLE 33: EC200T-CN RF OUTPUT POWER ................................................................................................. 65
TABLE 34: EC200T-EU RF OUTPUT POWER ................................................................................................. 65
TABLE 35: EC200T-CN CONDUCTED RF RECEIVING SENSITIVITY ........................................................... 66
TABLE 36: ELECTROSTATICS DISCHARGE CHARACTERISTICS (25ºC, 45% RELATIVE HUMIDITY) ...... 67
TABLE 37: RECOMMENDED THERMAL PROFILE PARAMETERS ............................................................... 73
TABLE 38: RELATED DOCUMENTS ................................................................................................................ 76
TABLE 39: TERMS AND ABBREVIATIONS ...................................................................................................... 76
TABLE 40: DESCRIPTION OF DIFFERENT CODING SCHEMES .................................................................. 80
TABLE 41: GPRS MULTI-SLOT CLASSES ...................................................................................................... 81
TABLE 42: EDGE MODULATION AND CODING SCHEMES ........................................................................... 83
Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 14

FIGURE 2: EC200T MODULE PIN ASSIGNMENT (TOP VIEW) ...................................................................... 16
FIGURE 3: SLEEP MODE APPLICATION VIA UART ....................................................................................... 26
FIGURE 4: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 27
FIGURE 5: SLEEP MODE APPLICATION WITH MAIN_RI .............................................................................. 27
FIGURE 6: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION ................................................ 28
FIGURE 7: POWER SUPPLY LIMITS DURING BURST TRANSMISSION ...................................................... 30
FIGURE 8: STAR STRUCTURE OF POWER SUPPLY .................................................................................... 30
FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 31
FIGURE 10: REFERENCE CIRCUIT OF TURING ON THE MODULE USING DRIVING CIRCUIT ................ 32
FIGURE 11: REFERENCE CIRCUIT OF TURING ON THE MODULE USING KEYSTROKE ......................... 32
FIGURE 12: TIMING OF TURNING ON MODULE ........................................................................................... 33
FIGURE 13: TIMING OF TURNING OFF MODULE ......................................................................................... 34
FIGURE 14: REFERENCE CIRCUIT OF RESETTING THE MODULE BY USING DRIVING CIRCUIT .......... 35
FIGURE 15: REFERENCE CIRCUIT OF RESETTING THE MODULE BY USING KEYSTROKE .................. 35
FIGURE 16: TIMING OF RESETTING MODULE ............................................................................................. 36
FIGURE 17: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 37
FIGURE 18: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR . 38
FIGURE 19: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 39
FIGURE 20: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 41
FIGURE 21: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 42
FIGURE 22: PRIMARY MODE TIMING ............................................................................................................ 43
FIGURE 23: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC .................................... 44
FIGURE 24: REFERENCE CIRCUIT OF SD CARD INTERFACE.................................................................... 45
FIGURE 25: REFERENCE CIRCUIT OF NETWORK STATUS INDICATION .................................................. 49
FIGURE 26: REFERENCE CIRCUITS OF STATUS ......................................................................................... 50
FIGURE 27: REFERENCE CIRCUIT OF FORCE_USB_BOOT INTERFACE ................................................. 52
FIGURE 28: TIMING SEQUENCE FOR ENTERING EMERGENCY DOWNLOAD MODE ............................. 52
FIGURE 29: REFERENCE CIRCUIT OF RF ANTENNA INTERFACE ............................................................. 55
FIGURE 30: MICROSTRIP DESIGN ON A 2-LAYER PCB ............................................................................... 56
FIGURE 31: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB ........................................................... 56
FIGURE 32: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND)
................................................................................................................................................................... 57
FIGURE 33: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND)
................................................................................................................................................................... 57
FIGURE 34: DIMENSIONS OF U.FL-R-SMT CONNECTOR (UNIT: MM) ........................................................ 58
FIGURE 35: MECHANICALS OF U.FL-LP CONNECTORS ............................................................................. 59
FIGURE 36: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM) ........................................................... 59
FIGURE 37: MODULE TOP AND SIDE DIMENSIONS ..................................................................................... 68
FIGURE 38: MODULE BOTTOM DIMENSIONS (BOTTOM VIEW) ................................................................. 69
FIGURE 39: RECOMMENDED FOOTPRINT (TOP VIEW) .............................................................................. 70

FIGURE 40: TOP VIEW OF THE MODULE ...................................................................................................... 71
FIGURE 41: BOTTOM VIEW OF THE MODULE .............................................................................................. 71
FIGURE 42: REFLOW SOLDERING THERMAL PROFILE .............................................................................. 73
FIGURE 43: TAPE SPECIFICATIONS .............................................................................................................. 74
FIGURE 44: REEL SPECIFICATIONS .............................................................................................................. 75
FIGURE 45: TAPE AND REEL DIRECTIONS ................................................................................................... 75
1 Introduction
This document defines the EC200T module and describes its air interface and hardware interface which
are connected with customers’ applications.
This document can help customers quickly understand module interface specifications, electrical and
mechanical details, as well as other related information of EC200T module. Associated with application
note and user guide, customers can use EC200T module to design and set up wireless applications
easily.
1.1. Safety Information
The following safety precautions must be observed during all phases of operation, such as usage, service
or repair of any cellular terminal or mobile incorporating EC200T module. Manufacturers of the cellular
terminal should send the following safety information to users and operating personnel, and incorporate
these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for
customers’ failure to comply with these precautions.
Full attention must be given to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) causes
distraction and can lead to an accident. Please comply with laws and regulations
restricting the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. The operation
of wireless appliances in an aircraft is forbidden to prevent interference with
communication systems. If the device offers an Airplane Mode, then it should be
enabled prior to boarding an aircraft. Please consult the airline staff for more
restrictions on the use of wireless devices on boarding the aircraft.
Wireless devices may cause interference on sensitive medical equipment, so

please be aware of the restrictions on the use of wireless devices when in
hospitals, clinics or other healthcare facilities.
The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it
receives and transmits radio frequency signals. RF interference can occur if it is
used close to TV set, radio, computer or other electric equipment.
In locations with potentially explosive atmospheres, obey all posted signs to turn
off wireless devices such as your phone or other cellular terminals. Areas with
potentially explosive atmospheres include fuelling areas, below decks on boats,
fuel or chemical transfer or storage facilities, areas where the air contains
chemicals or particles such as grain, dust or metal powders, etc.
2 Product Concept
2.1. General Description
EC200T is a series of LTE-FDD, LTE-TDD, WCDMA and GSM wireless communication module with
receive diversity, which provides data connectivity on LTE-FDD, LTE-TDD, HSDPA, HSUPA, HSPA+,
WCDMA, EDGE and GPRS networks. It also provides voice functionality for customers’ specific
applications. EC200T contains 2 variants: EC200T-CN and EC200T-EU. Customers can choose a
dedicated type based on the region or operator. The following table shows the frequency bands of
EC200T series module.
Table 1: Frequency Bands of EC200T-CN Module
Network Type Bands
LTE-FDD (with Rx-diversity)1) B1/B3/B5/B8
LTE-TDD (with Rx-diversity)1) B34/B38/B39/B40/B41
WCDMA B1/B5/B8
GSM 900/1800MHz
Table 2: Frequency Bands of EC200T-EU Module
Network Type Bands
LTE-FDD (with Rx-diversity)1) B1/B3/B52)/B7/B8/B202)/B28
LTE-TDD (with Rx-diversity)1) B38/B40/B41
WCDMA B1/B52)/B8
GSM 900/1800MHz
With a compact profile of 29.0mm × 32.0mm × 2.4mm, EC200T can meet almost all requirements for
M2M applications such as automotive, metering, tracking system, security, router, wireless POS, mobile
computing device, PDA phone, tablet PC, etc.
EC200T is an SMD type module which can be embedded into applications through its 144-pin pads,
including 80 LCC signal pads and 64 LGA pads.
NOTES
1)
1. Rx-diversity is optional.
2)
2. B5 and B20 cannot be simultaneously supported on EC200T-EU, and this is an either-or option.
2.2. Key Features
The following table describes the detailed features of EC200T module.
Table 3: Key Features of EC200T Module
Feature Details
Supply voltage: 3.4V~4.5V

Power Supply
Typical supply voltage: 3.8V
Class 4 (33dBm±2dB) for EGSM900
Class 1 (30dBm±2dB) for DCS1800
Class E2 (27dBm±3dB) for EGSM900 8-PSK
Transmitting Power Class E2 (26dBm±3dB) for DCS1800 8-PSK
Class 3 (24dBm+1/-3dB) for WCDMA bands
Class 3 (23dBm±2dB) for LTE-FDD bands
Class 3 (23dBm±2dB) for LTE-TDD bands
Support up to non-CA Cat 4 FDD and TDD
Support 1.4/3/5/10/15/20MHz RF bandwidth
LTE Features Support MIMO in DL direction
FDD: Max 150Mbps (DL), Max 50Mbps (UL)
TDD: Max 130Mbps (DL), Max 30Mbps (UL)
Support 3GPP R7 HSDPA, HSUPA, HSPA+ and WCDMA
Support QPSK, 16-QAM modulation
UMTS Features HSPA+: Max 21Mbps (DL)
HSUPA: Max 5.76Mbps (UL)
WCDMA: Max 384Kbps (DL), Max 384Kbps (UL)
GPRS:
GSM Features
Support GPRS multi-slot class 12
Coding scheme: CS-1/CS-2/CS-3/CS-4

Max 85.6Kbps (DL), Max 85.6Kbps (UL)
EDGE:
Support EDGE multi-slot class 12
Support GMSK and 8-PSK for different MCS (Modulation and Coding
Scheme)
Downlink coding schemes: CS 1-4 and MCS 1-9
Uplink coding schemes: CS 1-4 and MCS 1-9
Max 236.8Kbps (DL), Max 236.8Kbps (UL)
Support TCP/UDP/PPP/NTP/NITZ/FTP/HTTP/PING/CMUX/HTTPS/FTPS/
SSL/FILE/MQTT/MMS*/SMTP*/SMTPS* protocols
Internet Protocol
Support PAP (Password Authentication Protocol) and CHAP (Challenge
Features
Handshake Authentication Protocol) protocols which are usually used for
PPP connection
Text and PDU mode
Point-to-point MO and MT
SMS
SMS cell broadcast
SMS storage: (U)SIM card currently
(U)SIM Interface Support USIM/SIM card: 1.8V, 3.0V
Support one digital audio interface: PCM interface

GSM: HR/FR/EFR/AMR/AMR-WB
Audio Features
WCDMA: AMR/AMR-WB
Support echo cancellation and noise suppression
Used for audio function with external codec
Support 16-bit linear data format
PCM Interface
Support short frame synchronization
Support master and slave modes
Compliant with USB 2.0 specification (slave only); the data transfer rate can
reach up to 480Mbps
Used for AT command communication, data transmission, software
USB Interface
debugging, firmware upgrade
Support USB serial drivers for: Windows 7/8/8.1/10, Linux 2.6/3.x/4.1~4.14,
Android 4.x/5.x/6.x/7.x/8.x/9.x, etc.
Main UART:
Used for AT command communication and data transmission
Baud rates reach up to 1Mbps; 115200bps by default
UART Interfaces Support RTS and CTS hardware flow control
Debug UART:
Used for the output of partial logs
115200bps baud rate
SD Card Interface* Support SD 3.0 protocol
WLAN Interface* Support SDIO 3.0 interface for WLAN
Rx-diversity Support LTE Rx-diversity
Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT

AT Commands
commands
NET_MODE and NET_STATUS used to indicate the network connectivity
Network Indication
status
Main antenna interface (ANT_MAIN) and Rx-diversity antenna interface
Antenna Interfaces (ANT_DIV)
50Ω impedance
Size: (29.0±0.15)mm × (32.0±0.15)mm × (2.4±0.2)mm
Physical Characteristics
Weight: approx. 4.4g
Operation temperature range: -35°C ~ +75°C1)
Temperature Range Extended temperature range: -40°C ~ +85°C2)
Storage temperature range: -40°C ~ +90°C
Firmware Upgrade USB interface and FOTA
RoHS All hardware components are fully compliant with EU RoHS directive
NOTES
1) Within
1. operation temperature range, the module is 3GPP compliant.
2. 2)
Within extended temperature range, the module remains the ability to establish and maintain a
voice, SMS, data transmission, etc. There is no unrecoverable malfunction. There are also no effects
on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce
in their value and exceed the specified tolerances. When the temperature returns to the normal
operation temperature levels, the module will meet 3GPP specifications again.
3. “*” means under development.
2.3. Functional Diagram
The following figure shows a block diagram of EC200T and illustrates the major functional parts.
 Power management
 Baseband
 Flash
 Radio frequency
 Peripheral interfaces
ANT_MAIN ANT_DIV
PAM Switch
SAW
Duplex
SAW
VBAT_RF
PA
PRx DRx
Tx
26M
Transceiver VC_TXCO FLASH
IQ Control
VBAT_BB
PMIC
Control
PWRKEY
Baseband RAM
ADCs
32K
XO
VDD_EXT RESET_N USB (U)SIM PCM I2C UARTs STATUS WLAN SD
Figure 1: Functional Diagram
2.4. Evaluation Board
In order to help customers develop applications with EC200T, Quectel provides an evaluation board
(UMTS&LTE EVB), USB to RS-232 converter cable, earphone, antenna and other peripherals to control
or test the module. For more details, please refer to document [4].
3 Application Interfaces
3.1. General Description
EC200T is equipped with 80 LCC pins plus 64 LGA pins that can be connected to cellular application
platform. The subsequent chapters will provide detailed descriptions of the following interfaces.
 Power supply
 (U)SIM interface
 USB interface
 UART interfaces
 PCM and I2C interfaces
 SD card interface*
 WLAN interface*
 ADC interfaces
 Status indication
 FORCE_USB_BOOT interface
NOTE
“*” means under development.
3.2. Pin Assignment
The following figure shows the pin assignment of EC200T module.
RESERVED
RESERVED 114
RESERVED 113
USB_VBUS
MAIN_DCD
MAIN_RXD
MAIN_DTR
MAIN_CTS
MAIN_TXD
MAIN_RTS
VBAT_RF
VBAT_RF
VBAT_BB
VBAT_BB
MAIN_RI
USB_DM
USB_DP
STATUS
GND
GND
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
WAKEUP_IN 1 54 GND
AP_READY 2 53 GND
129 117
RESERVED 3 52 GND
130 108 103 99 95 90 85
W_DISABLE# 4 118 51 GND
NET_MODE 5 131 119 50 GND
NET_ST ATUS 6 49 ANT_MAIN
132 120 109 104 100 96 91 86
VDD_EXT 7 48 GND
RESERVED 141 133 121 144 RESERVED
RESERVED 142 82 79 76 73 143 RESERVED
134 122
GND 8 110 105 83 80 77 74 92 87 47 RESERVED
GND 9 135 123 84 81 78 75 46 GND
USIM_GND 10 45 ADC0
136 124
DBG_RXD 11 44 ADC1
111 106 101 97 93 88
DBG_TXD 12 137 125 43 RESERVED
USIM_DET 13 42 I2C_SDA
138 126
USIM_VDD 14 41 I2C_SCL
USIM_DATA 15 139 127 112 107 102 98 94 89 40 RESERVED
USIM_CLK 16 39 RESERVED
140 128
USIM_RST 17 38 RESERVED
RESERVED 18 37 RESERVED
116 RESERVED
115
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
GND
ANT_DIV
SD_SDIO_DATA2
SD_SDIO_DATA1
SD_SDIO_DATA0
PCM_DIN
SD_DET
SD_SDIO_CMD
SD_SDIO_VDD
GND
SD_SDIO_CLK
PCM_CLK
PCM_SYNC
PCM_DOUT
SD_SDIO_DATA3
RESET_N
PWRKEY
GND
FORCE_USB_BOOT1)
Power Pins GND Pins Signal Pins WLAN Pins RESERVED Pins
Figure 2: EC200T Module Pin Assignment (Top View)
NOTES
1)
1. means pin FORCE_USB_BOOT cannot be pulled up before startup.
2. If PCM_CLK, SD_SDIO_CLK, I2C_SCL, WLAN_SLP_CLK and WLAN_SDIO_CLK pins are not
used, in order to prevent interference to RF, a 33pF capacitor is suggested to be mounted close to
the three pins respectively. Other unused and RESERVED pins are kept open, and all GND pins are
connected to the ground network.
3. GND pins 85~112 should be connected to ground in the design. RESERVED pins 73~84 should not
be designed in schematic and PCB decal, and should be served as a keepout area.
4. The WLAN interface and SD card interface functions are under development.
3.3. Pin Description
The following tables show the pin definition of EC200T module.
Table 4: I/O Parameters Definition
Type Description
AI Analog Input
AO Analog Output
DI Digital Input
DO Digital Output
IO Bidirectional
OD Open Drain
PI Power Input
PO Power Output
Table 5: Pin Description
Power Supply Input
DC
Pin Name Pin No. I/O Description Comment
Characteristics
Power supply for Vmax=4.5V It must be provided
VBAT_BB 59, 60 PI module’s baseband Vmin=3.4V with sufficient current
part Vnorm=3.8V up to 0.8A.
Vmax=4.5V It must be provided
Power supply for
VBAT_RF 57, 58 PI Vmin=3.4V with sufficient current
module’s RF part
Vnorm=3.8V up to 1.8A.
8, 9, 19,
22, 36,
46, 48,
GND Ground
50~54,
56, 72,
85~112
Power Supply Output
DC
Characteristics
Power supply for
Provide 1.8V for Vnorm=1.8V external GPIO’s pull-up
VDD_EXT 7 PO
external circuit IOmax=50mA circuits.
If unused, keep it open.
Power on/off
Pin Name Pin No. I/O Description DC Characteristics Comment
Reset the module, If unused, keep it

RESET_N 20 DI VILmax=0.5V
low active open.
Turn on/off the
PWRKEY 21 DI VILmax=0.5V VBAT power domain.
module
Status Indication
Indicate the module’s 1.8V power domain.

VOHmin=1.35V
NET_MODE 5 DO network registration If unused, keep it
VOLmax=0.45V
mode open.
1.8V power domain.
NET_ Indicate the module’s VOHmin=1.35V
6 DO If unused, keep it
STATUS network activity status VOLmax=0.45V
open.
An external pull-up
Indicate the module’s resistor is required.
STATUS 61 OD
operation status If unused, keep it
open.
USB Interface
Require differential
USB differential data impedance of 90Ω.
USB_DP 69 IO USB 2.0 compliant
(+) If unused, keep it
open.
USB differential data impedance of 90Ω.
USB_DM 70 IO USB 2.0 compliant
(-) If unused, keep it
open.
Vmax=5.25V Typical: 5.0V
USB connection
USB_VBUS 71 AI Vmin=3.0V If unused, keep it
detection
Vnorm=5.0V open.
(U)SIM Interface
Specified ground for Connect (U)SIM card

USIM_GND 10
(U)SIM connector GND.
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
USIM_DET 13 DI (U)SIM card detection If unused, keep it
VIHmin=1.2V
open.
VIHmax=2.0V
IOmax=50mA
Either 1.8V or 3.0V

For 1.8V (U)SIM:
(U)SIM card is
Vmax=1.9V
Power supply for supported and can
USIM_VDD 14 PO Vmin=1.7V
(U)SIM card be identified
automatically by the
For 3.0V (U)SIM:
module.
Vmax=3.05V
Vmin=2.7V
For 1.8V (U)SIM:
VILmax=0.6V
VIHmin=1.2V
VOLmax=0.45V
VOHmin=1.35V
USIM_DATA 15 IO (U)SIM data
For 3.0V (U)SIM:
VILmax=1.0V
VIHmin=1.95V
VOLmax=0.45V
VOHmin=2.55V
For 1.8V (U)SIM:
VOLmax=0.45V
VOHmin=1.35V
USIM_CLK 16 DO (U)SIM clock
For 3.0V (U)SIM:
VOLmax=0.45V
VOHmin=2.55V
For 1.8V (U)SIM:
VOLmax=0.45V
VOHmin=1.35V
USIM_RST 17 DO (U)SIM reset
For 3.0V (U)SIM:
VOLmax=0.45V
VOHmin=2.55V
Main UART Interface
1.8V power domain.

VOLmax=0.45V
MAIN_RI 62 DO Ring indication If unused, keep it
VOHmin=1.35V
open.
1.8V power domain.
VOLmax=0.45V
MAIN_DCD 63 DO Data carrier detection If unused, keep it
VOHmin=1.35V
open.
1.8V power domain.
VOLmax=0.45V
MAIN_CTS 64 DO Clear to send If unused, keep it
VOHmin=1.35V
open.
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
MAIN_RTS 65 DI Request to send If unused, keep it
VIHmin=1.2V
open.
VIHmax=2.0V
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
MAIN_DTR 66 DI Data terminal ready If unused, keep it
VIHmin=1.2V
open.
VIHmax=2.0V
1.8V power domain.
VOLmax=0.45V
MAIN_TXD 67 DO Transmit data If unused, keep it
VOHmin=1.35V
open.
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
MAIN_RXD 68 DI Receive data If unused, keep it
VIHmin=1.2V
open.
VIHmax=2.0V
Debug UART Interface
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
DBG_RXD 11 DI Debug receive data If unused, keep it
VIHmin=1.2V
open.
VIHmax=2.0V
1.8V power domain.
VOLmax=0.45V
DBG_TXD 12 DO Debug transmit data If unused, keep it
VOHmin=1.35V
open.
ADC Interfaces
General-purpose
Voltage range: If unused, keep it
ADC1 44 AI analog to digital
0V to VBAT_BB open.
converter
General-purpose
Voltage range: If unused, keep it
ADC0 45 AI analog to digital
0V to VBAT_BB open.
converter
PCM & I2C Interfaces
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
PCM_DIN 24 DI PCM data input If unused, keep it
VIHmin=1.2V
open.
VIHmax=2.0V
1.8V power domain.
VOLmax=0.45V
PCM_DOUT 25 DO PCM data output If unused, keep it
VOHmin=1.35V
open.
1.8V power domain.
In master mode, it
VOLmax=0.45V
serves as an output
VOHmin=1.35V
signal.
PCM data frame VILmin=-0.3V
PCM_SYNC 26 IO In slave mode, it is
synchronization VILmax=0.6V
used as an input
VIHmin=1.2V
signal.
VIHmax=2.0V
If unused, keep it
open.
1.8V power domain.
In master mode, it
serves as an output
VOLmax=0.45V signal.
VOHmin=1.35V In slave mode, it is
VILmin=-0.3V used as an input
PCM_CLK 27 IO PCM clock
VILmax=0.6V signal.
VIHmin=1.2V If unused, a 33pF
VIHmax=2.0V capacitor is
suggested to be
mounted close to the
pin.
An external 1.8V
pull-up resistor is
required.
I2C serial clock for If unused, a 33pF
I2C_SCL 41 OD
external codec capacitor is
suggested to be
pin.
An external 1.8V
pull-up resistor is
I2C serial data for
I2C_SDA 42 OD required.
external codec
If unused, keep it
open.
SD Card Interface*
1.8V/2.8V power
domain.
SD_DET 23 DI SD card detect
If unused, keep it
open.
1.8V/2.8V power
SD_SDIO_ SD card SDIO data bit domain.
28 IO
DATA3 3 If unused, keep it
open.
1.8V/2.8V power
29 IO
open.
1.8V/2.8V power
30 IO
open.
1.8V/2.8V power
31 IO
open.
1.8V/2.8V power
domain.
If unused, a 33pF
SD_SDIO_
32 DO SD card SDIO clock capacitor is
CLK
suggested to be
pin.
1.8V/2.8V power
SD_SDIO_ SD card SDIO domain.
33 IO
CMD command If unused, keep it
open.
1.8V/2.8V power
SD_SDIO_ domain.
34 PO SD card SDIO power
VDD If unused, keep it
open.
WLAN Interface*
If unused, a 33pF
capacitor is
WLAN_SLP_
118 DO WLAN sleep clock suggested to be
CLK
pin.
1.8V power domain.
WLAN_PWR_ WLAN power supply VOLmax=0.45V
127 DO If unused, keep it
EN enable control VOHmin=1.35V
open.
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
WLAN_SDIO_ WLAN SDIO data bit VILmin=-0.3V
129 IO If unused, keep it
DATA3 3 VILmax=0.6V
open.
VIHmin=1.2V
VIHmax=2.0V
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
DATA2 2 VILmax=0.6V
open.
VIHmin=1.2V
VIHmax=2.0V
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
DATA1 1 VILmax=0.6V
open.
VIHmin=1.2V
VIHmax=2.0V
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
DATA0 0 VILmax=0.6V
open.
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
If unused, a 33pF
WLAN_SDIO_ VOLmax=0.45V capacitor is
133 DO WLAN SDIO clock
CLK VOHmin=1.35V suggested to be
pin.
WLAN_SDIO_ WLAN SDIO VOLmax=0.45V 1.8V power domain.
134 DO
CMD command VOHmin=1.35V If unused, keep it
open.
VILmin=-0.3V
Wake up the host 1.8V power domain.
VILmax=0.6V
WLAN_WAKE 135 DI (module) by an If unused, keep it
VIHmin=1.2V
external Wi-Fi module open.
VIHmax=2.0V
1.8V power domain.
WLAN function VOLmax=0.45V
WLAN_EN 136 DO If unused, keep it
enable control VOHmin=1.35V
open.
RF Interface
50Ω impedance.
Receive diversity
ANT_DIV 35 AI If unused, keep it
antenna
open.
ANT_MAIN 49 IO Main antenna 50Ω impedance.
Other Interfaces
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
WAKEUP_IN 1 DI Wake up the module If unused, keep it
VIHmin=1.2V
open.
VIHmax=2.0V
VILmin=-0.3V
1.8V power domain.
Application processor VILmax=0.6V
AP_READY 2 DI If unused, keep it
sleep state detection VIHmin=1.2V
open.
VIHmax=2.0V
1.8V power domain.
Pull-up by default.
VILmin=-0.3V
In low voltage level,
VILmax=0.6V
W_DISABLE# 4 DI Airplane mode control module can enter into
VIHmin=1.2V
airplane mode.
VIHmax=2.0V
If unused, keep it
open.
VILmin=-0.3V 1.8V power domain.
Force the module to
FORCE_ VILmax=0.6V Active high.
115 DI enter emergency
USB_BOOT VIHmin=1.2V It is recommended to
download mode
VIHmax=2.0V reserve test points.
RESERVED Pins
3, 18,
37~40, 43,
47, 55,
73~84,
Keep these pins
RESERVED 113, 114, Reserved
unconnected.
116, 117,
119~126,
128,
137~144
NOTE
“*” means WLAN interface and SD card interface functions are under development.
3.4. Operating Modes
The following table briefly outlines the operating modes to be mentioned in the following chapters.
Table 6: Overview of Operating Modes
Mode Details
Software is active. The module has registered on the network, and it is

Idle
Normal ready to send and receive data.
Operation Network connection is ongoing. In this mode, the power consumption is
Talk/Data
decided by network setting and data transfer rate.
Minimum AT+CFUN command can set the module to a minimum functionality mode without
Functionality removing the power supply. In this case, both RF function and (U)SIM card will be
Mode invalid.
AT+CFUN command or W_DISABLE# pin can set the module to airplane mode. In
Airplane Mode
this case, RF function will be invalid.
In this mode, the current consumption of the module will be reduced to the minimal
Sleep Mode level. In this mode, the module can still receive paging message, SMS, voice call and
TCP/UDP data from the network normally.
In this mode, the power management unit (PMU) shuts down the power supply,
Power Down
software goes inactive and the serial interfaces are not accessible. However, the
Mode
VBAT_RF and VBAT_BB pins are still powered.
3.5. Power Saving
3.5.1. Sleep Mode
EC200T is able to reduce its current consumption to an ultra-low value in the sleep mode. The following
section describes power saving procedures of EC200T module.
3.5.1.1. UART Application
If the host communicates with module via UART interface, the following preconditions should be met to let
the module enter sleep mode.
 Execute AT+QSCLK=1 to enable sleep mode.

 Drive MAIN_DTR to high level.
The following figure shows the connection between the module and the host.
Module Host
MAIN_RXD TXD
MAIN_TXD RXD
MAIN_RI EINT
MAIN_DTR GPIO
AP_READY GPIO
GND GND
Figure 3: Sleep Mode Application via UART
 Driving MAIN_DTR to low level by host will wake up the module.

 When EC200T has a URC to report, the URC will trigger the behavior of MAIN_RI pin. Please refer to
Chapter 3.17 for details about MAIN_RI behavior.
3.5.1.2. USB Application with USB Remote Wakeup Function
If the host supports USB Suspend/Resume and remote wakeup functions, the following three
preconditions must be met to let the module enter sleep mode.
 Execute AT+QSCLK=1 command to enable the sleep mode.

 Ensure the MAIN_DTR is kept at high level or kept open.
 The host’s USB bus, which is connected with the module’s USB interface, enters Suspend state.
Module Host
USB_VBUS VDD
USB_DP USB_DP
USB_DM USB_DM
AP_READY GPIO
GND GND
Figure 4: Sleep Mode Application with USB Remote Wakeup
 Sending data to EC200T through USB will wake up the module.

 When EC200T has a URC to report, the module will send remote wakeup signals via USB bus so as
to wake up the host.
3.5.1.3. USB Application with USB Suspend/Resume and MAIN_RI Wakeup Function
If the host supports USB Suspend/Resume, but does not support remote wakeup function, the MAIN_RI
signal is needed to wake up the host.
There are three preconditions to let the module enter sleep mode.
 Execute AT+QSCLK=1 to enable the sleep mode.

 Ensure the MAIN_DTR is held at high level or keep it open.
 The host’s USB bus, which is connected with the module’s USB interface, enters Suspend state.
Module Host
USB_VBUS VDD
USB_DP USB_DP
USB_DM USB_DM
AP_READY GPIO
MAIN_RI EINT
GND GND
Figure 5: Sleep Mode Application with MAIN_RI
 Sending data to EC200T through USB will wake up the module.

 When EC200T has a URC to report, the URC will trigger the behavior of MAIN_RI pin.
3.5.1.4. USB Application without USB Suspend Function
If the host does not support USB Suspend function, please disconnect USB_VBUS with additional control
circuit to let the module enter into sleep mode.
 Execute AT+QSCLK=1 command to enable the sleep mode.

 Ensure the MAIN_DTR is held at high level or keep it open.
 Disconnect USB_VBUS.
Module Host
GPIO
Power
USB_VBUS Switch VDD
USB_DP USB_DP
USB_DM USB_DM
MAIN_RI EINT
AP_READY GPIO
GND GND
Figure 6: Sleep Mode Application without Suspend Function
Switching on the power switch to supply power to USB_VBUS will wake up the module.
NOTE
Please pay attention to the level match shown in dotted line between the module and the host.
3.5.2. Airplane Mode
When the module enters airplane mode, the RF function will be disabled, and all AT commands related to
it will be inaccessible. This mode can be set via the following ways.
Hardware:
The W_DISABLE# pin is pulled up by default. Its control function for airplane mode is disabled by default,
and AT+QCFG=“airplanecontrol”,1 can be used to enable the function. Driving it to low level can make
the module enter airplane mode.
Software:
AT+CFUN=<fun> command provides the choice of the functionality level through setting <fun> into 0, 1
or 4.
 AT+CFUN=0: Minimum functionality mode; both (U)SIM and RF functions are disabled.
 AT+CFUN=1: Full functionality mode (by default).
 AT+CFUN=4: Airplane mode. RF function is disabled.
3.6. Power Supply
3.6.1. Power Supply Pins
EC200T provides four VBAT pins dedicated to connecting with the external power supply. There are two
separate voltage domains for VBAT.
 Two VBAT_RF pins for module’s RF part

 Two VBAT_BB pins for module’s baseband part
The following table shows the details of power supply and GND pins.
Table 7: Power Supply and GND Pins
Pin Name Pin No. Description Min. Typ. Max. Unit
Power supply for module’s

VBAT_RF 57, 58 3.4 3.8 4.5 V
RF part
Power supply for module’s
VBAT_BB 59, 60 3.4 3.8 4.5 V
baseband part
8, 9, 19, 22, 36,
GND 46, 48, 50~54, Ground - 0 - V
56, 72, 85~112
3.6.2. Decrease Voltage Drop
The power supply range of the module is from 3.4V to 4.5V. Please make sure that the input voltage will
never drop below 3.4V. The following figure shows the voltage drop during burst transmission in 2G
network. The voltage drop will be less in 3G and 4G networks.
Burst Burst
Transmission Transmission
VBAT Ripple
Drop
Min.3.4V
Figure 7: Power Supply Limits during Burst Transmission
To decrease voltage drop, a bypass capacitor of about 100µF with low ESR (ESR=0.7Ω) should be used,
and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It
is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and
place these capacitors close to the VBAT_BB and VBAT_RF pins. The main power supply from an
external application has to be a single voltage source and can be expanded to two sub paths with star
structure. The width of VBAT_BB trace should be no less than 1mm; and the width of VBAT_RF trace
should be no less than 2mm. In principle, the longer the VBAT trace is, the wider it will be.
In addition, in order to ensure the stability of power source, it is suggested that a TVS diode of which
reverse stand-off voltage is 4.7V and peak pulse power is up to 2550W should be used. The following
figure shows the star structure of the power supply.
VBAT
VBAT_RF
VBAT_BB
+ +
D1 C1 C2 C3 C4 C5 C6 C7 C8
WS4.5D3HV 100uF 100nF 33pF 10pF 100uF 100nF 33pF 10pF
Module
Figure 8: Star Structure of Power Supply
3.6.3. Reference Design for Power Supply
Power design for the module is very important, as the performance of the module largely depends on the
power source. The power supply should be able to provide sufficient current up to 2.0A at least to the
module. If the voltage drop between the input and output is not too high, it is suggested that an LDO
should be used to supply power for the module. If there is a big voltage difference between the input
source and the desired output (VBAT), a buck converter is preferred to be used as the power supply.
The following figure shows a reference design for +5V input power source. The typical output of the power
supply is about 3.8V and the maximum load current is 3.0A.
MIC29302WU
DC_IN VBAT
2 4
IN OUT
GND
ADJ
EN
100K
1%
1
5
51K
4.7K 470R
470uF 100nF
470uF 100nF
47K
VBAT_EN 47K 1%
Figure 9: Reference Circuit of Power Supply
3.7. Power-on/off/Reset Scenarios
3.7.1. Turn on Module Using the PWRKEY
The following table shows the pin definition of PWRKEY.
Table 8: Pin Description of PWRKEY
PWRKEY 21 DI Turn on/off the module VBAT power domain
When EC200T is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to
a low level for at least 500ms. It is recommended to use an open drain/collector driver to control the
PWRKEY. A simple reference circuit is illustrated in the following figure.
PWRKEY
≥ 500ms
4.7K
10nF
Turn-on pulse
47K
Figure 10: Reference Circuit of Turing on the Module Using Driving Circuit
The other way to control the PWRKEY is using a button directly. When pressing the key, electrostatic
strike may generate from finger. Therefore, a TVS component is indispensable to be placed nearby the
button for ESD protection. A reference circuit is shown in the following figure.
S1
PWRKEY
TVS
Close to S1
Figure 11: Reference Circuit of Turing on the Module Using Keystroke
The timing of turning on the module is illustrated in the following figure.
NOTE 1
VBAT ≥500ms
PWRKEY VIL≤0.5V
About 5ms
VDD_EXT
≥100ms. After this time, the pin can be set

high level by an external circuit.
FORCE_USB_BOOT
About 22ms
RESET_N
≥10s
STATUS
(OD)
≥10s
UART I nactive Active
≥10s
USB Inactive Active
Figure 12: Timing of Turning on Module
NOTES
1. Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is
no less than 30ms.
2. PWRKEY can be pulled down directly to GND with a recommended 4.7kΩ resistor if module needs to
be powered on automatically and shutdown is not needed.
3.7.2. Turn off Module
The following procedures can be used to turn off the module:
 Using the PWRKEY pin.

 Using AT+QPOWD command.
3.7.2.1. Turn off Module Using the PWRKEY Pin
Driving the PWRKEY pin to a low level voltage for at least 650ms, the module will execute power-down
procedure after the PWRKEY is released. The timing of turning off the module is illustrated in the following
figure.
VBA T
≥650ms ≥2s
PWRKEY
STATUS
(OD)
Module RUNNING Power-down procedure OFF

Status
Figure 13: Timing of Turning off Module
3.7.2.2. Turn off Module Using AT Command
It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to the procedure
of turning off the module via PWRKEY pin.
Please refer to document [2] for details about AT+QPOWD command.
NOTES
1. In order to avoid damaging internal flash, please do not switch off the power supply when the module
works normally. Only after the module is shut down by PWRKEY or AT command, the power supply
can be cut off.
2. When turning off module with the AT command, please keep PWRKEY at a high level after the
execution of the command. Otherwise, the module will turn itself back on after being shut down.
3.7.3. Reset the Module
The RESET_N pin can be used to reset the module. The module can be reset by pulling the RESET_N
pin low for at least 300ms and then releasing it. The RESET_N signal is sensitive to interference, so it is
recommended to route the trace as short as possible and surround it with ground.
Table 9: Pin Description of RESET_N
RESET_N 20 DI Reset the module 1.8V power domain
The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button
can be used to control the RESET_N.
RESET_N
≥300ms
4.7K
Reset pulse
47K
Figure 14: Reference Circuit of Resetting the Module by Using Driving Circuit
S2
RESET_N
TVS
Close to S2
Figure 15: Reference Circuit of Resetting the Module by Using Keystroke
The timing of resetting module is illustrated in the following figure.
VBAT
≥300ms
RESET_N
VIL ≤0.5V
Module Running Baseband resetting Baseband restart

Status
Figure 16: Timing of Resetting Module
NOTES
1. Please ensure that there is no large capacitance with the max value exceeding 10nF on PWRKEY
and RESET_N pins.
2. RESET_N only resets the internal baseband chip of the module and does not reset the power
management chip.
3. It is recommended to use RESET_N only when failing to turn off the module by AT+QPOWD
command or PWRKEY pin.
3.8. (U)SIM Interface
The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cards
are supported.
Table 10: Pin Definition of (U)SIM Interface
USIM_GND 10 Specified ground for (U)SIM
1.8V power domain.

USIM_DET 13 DI (U)SIM card detection
Either 1.8V or 3.0V (U)SIM card is
USIM_VDD 14 PO Power supply for (U)SIM card supported and can be identified
automatically by the module.
USIM_DATA 15 IO (U)SIM data
USIM_CLK 16 DO (U)SIM clock
USIM_RST 17 DO (U)SIM reset
EC200T supports (U)SIM card hot-plug via the USIM_DET pin. The function supports low level and high
level detections. By default, It is disabled, and can be configured via AT+QSIMDET command. Please
refer to document [2] for details about the command.
The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector.
VDD_EXT USIM_VDD
51K 15K
USIM_GND 100nF (U)SIM Card Connector
USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
USIM_DET 0R
USIM_DATA 0R
GND
33pF 33pF 33pF
GND GND
Figure 17: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector
If (U)SIM card detection function is not needed, please keep USIM_DET unconnected. A reference circuit
for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure.
USIM_VDD
15K
USIM_GND 100nF
(U)SIM Card Connector
USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
0R
USIM_DATA 0R
33pF 33pF 33pF
GND GND
Figure 18: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector
In order to enhance the reliability and availability of the (U)SIM card in customers’ applications, please
follow the criteria below in (U)SIM circuit design:
 Keep placement of (U)SIM card connector as close to the module as possible. Keep the trace length
less than 200mm as far as possible.
 Keep (U)SIM card signals away from RF and VBAT traces.
 Assure the ground between the module and the (U)SIM card connector short and wide. Keep the
trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential. If
the ground is complete on customers’ PCB, USIM_GND can be connected to PCB ground directly.
 To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and
shield them with surrounded ground.
 In order to offer good ESD protection, it is recommended to add a TVS diode array whose parasitic
capacitance should not be more than 15pF. The 0Ω resistors should be added in series between the
module and the (U)SIM card to facilitate debugging. The 33pF capacitors are used for filtering
interference of EGSM900. Please note that the (U)SIM peripheral circuit should be close to the
(U)SIM card connector.
 The pull-up resistor on USIM_DATA can improve anti-jamming capability of the (U)SIM card. If the
(U)SIM card traces are too long, or the interference source is relatively close, it is recommended to
add a pull-up resistor near the (U)SIM card connector.
3.9. USB Interface
EC200T provides one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0
specification and supports full-speed (12Mbps) and high-speed (480Mbps) modes. The USB interface
can only serves as a slave device and is used for AT command communication, data transmission,
software debugging and firmware upgrade. The following table shows the pin definition of USB interface.
Table 11: Pin Description of USB Interface
USB_DP 69 IO USB differential data (+)
impedance of 90Ω
USB_DM 70 IO USB differential data (-)
impedance of 90Ω
USB_VBUS 71 AI USB connection detection Typical 5.0V
GND 72 Ground
For more details about the USB 2.0 specifications, please visit http://www.usb.org/home.
It is recommended to reserve test points for debugging and firmware upgrade in customers’ designs. The
following figure shows a reference circuit of USB interface.
Test Points
Minimize these stubs
Module MCU
R3 NM_0R
VDD R4 NM_0R
USB_VBUS ESD Array
L1 USB_DM
USB_DM
USB_DP USB_DP
Close to Module GND

GND
Figure 19: Reference Circuit of USB Application
A common mode choke L1 is recommended to be added in series between the module and customer’s
MCU in order to suppress EMI spurious transmission. Meanwhile, the 0Ω resistors (R3 and R4) should be
added in series between the module and the test points so as to facilitate debugging, and the resistors are
not mounted by default. In order to ensure the integrity of USB data line signal, L1, R3 and R4
components must be placed close to the module, and also resistors R3 and R4 should be placed close to
each other. The extra stubs of trace must be as short as possible.
The following principles should be complied with when design the USB interface, so as to meet USB 2.0
specification.
 It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90Ω.
 Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer of the PCB, and surround the traces with
ground on that layer and ground planes above and below.
 Please pay attention to the selection of the ESD component on the USB data line. Its parasitic
capacitance should not exceed 2pF and should be placed as close as possible to the USB interface.
3.10. UART Interfaces
The module provides two UART interfaces: the main UART interface and the debug UART interface. The
following shows their features.
 The main UART interface supports 4800bps, 9600bps, 19200bps, 38400bps, 57600bps, 115200bps,
230400bps, 460800bps, 921600bps and 1Mbps baud rates, and the default is 115200bps. This
interface is used for data transmission and AT command communication.
 The debug UART interface supports 115200bps baud rate. It is used for the output of partial logs.
The following tables show the pin definition of main UART interface.
Table 12: Pin Definition of Main UART Interface
MAIN_RI 62 DO Ring indication
MAIN_DCD 63 DO Data carrier detection
MAIN_CTS 64 DO Clear to send

1.8V power domain.
MAIN_RTS 65 DI Request to send
MAIN_DTR 66 DI Data terminal ready
MAIN_TXD 67 DO Transmit data
MAIN_RXD 68 DI Receive data
Table 13: Pin Definition of Debug UART Interface
DBG_RXD 11 DI Debug receive data

1.8V power domain.
DBG_TXD 12 DO Debug transmit data
The logic levels are described in the following table.
Table 14: Logic Levels of Digital I/O
Parameter Min. Max. Unit
VIL -0.3 0.6 V
VIH 1.2 2.0 V
VOL 0 0.45 V
VOH 1.35 1.8 V
The module provides a 1.8V UART interface. A level translator should be used if the application is
equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is
recommended. The following figure shows a reference design.
VDD_EXT VCCA VCCB VDD_MCU

0.1uF 0.1uF
10K
120K
OE GND
MAIN_RI A1 B1 RI_MCU
MAIN_DCD A2 B2 DCD_MCU
MAIN_CTS A3 Translator B3 CTS_MCU
MAIN_RTS A4 B4 RTS_MCU
MAIN_DTR A5 B5 DTR_MCU
MAIN_TXD A6 B6 TXD_MCU
MAIN_RXD A7 B7 RXD_MCU
51K 51K
A8 B8
Figure 20: Reference Circuit with Translator Chip
Please visit http://www.ti.com for more information.
Another example with transistor translation circuit is shown as below. For the design of circuits in dotted
lines, please refer to that of the circuits in solid lines, but please pay attention to the direction of
connection.
4.7K
VDD_EXT VDD_EXT
1nF
MCU/ARM Module
10K
TXD MAIN_RXD
RXD MAIN_TXD
1nF
10K
VDD_EXT
VCC_MCU 4.7K
RTS MAIN_RTS
CTS MAIN_CTS
GPIO MAIN_DTR
EINT MAIN_RI
GPIO MAIN_DCD
GND GND
Figure 21: Reference Circuit with Transistor Circuit
NOTE
Transistor circuit solution is not suitable for applications with baud rates exceeding 460Kbps.
3.11. PCM and I2C Interfaces
EC200T provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the
primary mode (short frame synchronization) and EC200T works as both master and slave.
EC200T works as a master device pertaining to I2C interface.
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports
256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC, and also supports 4096kHz
PCM_CLK at 16kHz PCM_SYNC.
EC200T supports 16-bit linear data format. The following figure shows the primary mode’s timing
relationship with 8kHz PCM_SYNC and 2048kHz PCM_CLK.
125us
P CM _CLK 1 2 255 256
P CM _S YNC
MS B LS B MS B
P CM _DOUT
MS B LS B MS B
P CM _DIN
Figure 22: Primary Mode Timing
The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio
codec design.
Table 15: Pin Definition of PCM and I2C Interfaces
1.8V power domain.

PCM_DIN 24 DI PCM data input
1.8V power domain.
PCM_DOUT 25 DO PCM data output
1.8V power domain.
PCM data frame In master mode, it serves as an output signal.
PCM_SYNC 26 IO
synchronization In slave mode, it is used as an input signal.
1.8V power domain.
In master mode, it serves as an output signal.
PCM_CLK 27 IO PCM clock In slave mode, it is used as an input signal.
If unused, a 33pF capacitor is suggested to be
mounted close to the pin.
An external 1.8V pull-up resistor is required.
I2C serial clock for
I2C_SCL 41 OD If unused, a 33pF capacitor is suggested to be
external codec
mounted close to the pin.
I2C serial data for An external 1.8V pull-up resistor is required.
I2C_SDA 42 OD
external codec If unused, keep it open.
Clock and mode can be configured by AT command, and the default configuration is short frame
synchronization format with 2048kHz PCM_CLK and 8kHz PCM_SYNC.
The following figure shows a reference design of PCM interface with external codec IC.
MICBIAS
INP
BIAS
PCM_CLK BCLK
INN
PCM_SYNC LRCK
PCM_DOUT DAC
PCM_DIN ADC
LOUTP
I2C_SCL SCL
I2C_SDA SDA LOUTN
4.7K
4.7K
Module Codec
1.8V
Figure 23: Reference Circuit of PCM Application with Audio Codec
NOTE
It is recommended to reserve an RC (R=22Ω, C=22pF) circuit on the PCM lines, especially for PCM_CLK.
3.12. SD Card Interface*
EC200T provides an SD card interface, which complies with SD 3.0 specification.
The following table shows the pin definition of SD card interface.
Table 16: Pin Definition of SD Card Interface
1.8V/2.8V power domain.

SD_DET 23 DI SD card detect
SD_SDIO_DATA3 28 IO SD card SDIO data bit 3

If unused, a 33pF
SD_SDIO_CLK 32 DO SD card SDIO clock capacitor is suggested to
be mounted close to the
pin.
SD_SDIO_CMD 33 IO SD card SDIO command
SD_SDIO_VDD 34 PO SD card SDIO power
The following figure shows a reference design of SD card interface.
Module VDD_3V SD Card Connector

SD_SDIO_VDD VDD
+
C10 C9 C8 C7
R7 R8 R9 R10 R11
100uF 100nF 33pF 10pF
NM NM NM NM NM
R1 0R
SD_SDIO_DATA3 CD/DAT3
R2 0R
SD_SDIO_DATA2 DAT2
R3 0R
SD_SDIO_DATA1 DAT1
R4 0R
SD_SDIO_DATA0 DAT0
R5 0R
SD_SDIO_CLK CLK
R6 0R
SD_SDIO_CMD CMD
SD_DET DETECTIVE
C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 D7 C6 D6
NM NM NM NM NM NM VSS
Figure 24: Reference Circuit of SD Card Interface
In SD card interface design, in order to ensure good communication performance with SD card, the
following design principles should be complied with:
 The voltage range of SD card power supply VDD_3V is 2.7V~3.6V and a sufficient current up to 0.8A
should be provided. As the maximum output current of SD_SDIO_VDD is 50mA which can only be
used for SDIO pull-up resistors, an externally power supply is needed for SD card.
 To avoid jitter of bus, resistors R7~R11 are needed to pull up the SDIO to SD_SDIO_VDD. Value of
these resistors is among 10kΩ~100kΩ and the recommended value is 100kΩ. SD_SDIO_VDD
should be used as the pull-up power.
 In order to adjust signal quality, it is recommended to add 0Ω resistors R1~R6 in series between the
module and the SD card. The bypass capacitors C1~C6 are reserved and not mounted by default. All
resistors and bypass capacitors should be placed close to the module.
 In order to offer good ESD protection, it is recommended to add a TVS diode on SD card pins near
the SD card connector with junction capacitance less than 15pF.
 Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DC-DC signals, etc.
It is important to route the SDIO signal traces with total grounding. The impedance of SDIO data trace
is 50Ω (±10%).
 Make sure the adjacent trace spacing is two times of the trace width and the load capacitance of
SDIO bus should be less than 15pF.
 It is recommended to keep the traces of SD_SDIO_CLK, SD_SDIO_DATA[0:3] and SD_SDIO_CMD
with equal length (the difference among them is less than 1mm) and the total routing length needs to
be less than 50mm.
NOTE
3.13. WLAN Interface*
EC200T supports a SDIO 3.0 interface for WLAN.
The following table shows the pin definition of WLAN interface
Table 17: Pin Definition of WLAN Interface
If unused, a 33pF
capacitor is suggested
WLAN_SLP_CLK 118 DO WLAN sleep clock
to be mounted close to
the pin.
WLAN power supply enable
WLAN_PWR_EN 127 DO
control
WLAN_SDIO_DATA3 129 IO WLAN SDIO data bit 3

1.8V power domain
WLAN_SDIO_DATA2 130 IO WLAN SDIO data bit 2 If unused, keep it open.
WLAN_SDIO_CLK 133 DO WLAN SDIO clock 1.8V power domain
If unused, a 33pF
capacitor is suggested
to be mounted close to
the pin.
WLAN_SDIO_CMD 134 DO WLAN SDIO command
Wake up the host (module) 1.8V power domain

WLAN_WAKE 135 DI
by an external Wi-Fi module If unused, keep it open.
WLAN function enable
WLAN_EN 136 DO
control
As SDIO signals are very high-speed, in order to ensure the SDIO interface design meets SDIO 3.0
specification, please comply with the following principles:
 It is important to route the SDIO signal traces with total grounding. The impedance of SDIO signal
trace is 50Ω±10%.
 Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DC-DC signals, etc.
 It is recommended to keep the traces of WLAN_SDIO_CLK, WLAN_SDIO_DATA[0:3] and
WLAN_SDIO_CMD with equal length (the difference among them is less than 1mm) and the total
routing length needs to be less than 50mm.
 Make sure the adjacent trace spacing is 2 times of the trace width and bus capacitance is less than
15pF.
NOTE
3.14. ADC Interfaces
The module provides two analog-to-digital converter (ADC) interfaces. AT+QADC=0 can be used to read
the voltage value on ADC0 pin. AT+QADC=1 can be used to read the voltage value on ADC1 pin. For
more details about these AT commands, please refer to document [2].
In order to improve the accuracy of ADC, the trace of ADC should be surrounded by ground.
Table 18: Pin Definition of ADC Interfaces
Pin Name Pin No. Description
ADC1 44 General-purpose analog to digital converter
ADC0 45 General-purpose analog to digital converter
The following table describes the characteristic of the ADC function.
Table 19: Characteristic of the ADC
Parameter Min. Typ. Max. Unit
ADC1 Voltage Range 0 VBAT_BB V
ADC0 Voltage Range 0 VBAT_BB V
ADC Resolution 12 bits
NOTE
It is recommended to use a resistor divider circuit for ADC application.
3.15. Network Status Indication
The network indication pins can be used to drive network status indication LEDs. The module provides
two pins which are NET_MODE and NET_STATUS for network status indication. The following tables
describe pin definition and logic level changes in different network status.
Table 20: Pin Definition of Network Connection Status/Activity Indication
1.8V power domain

Indicate the module’s network
NET_MODE 5 DO If unused, keep it
registration mode
open.
1.8V power domain
Indicate the module’s network activity
NET_STATUS 6 DO If unused, keep it
status
open.
Table 21: Working State of Network Connection Status/Activity Indication
Pin Name Logic Level Changes Network Status
Always high Registered on LTE network

NET_MODE
Always low Others
Flicker slowly (200ms high/1800ms low) Network searching
Flicker slowly (1800ms high/200ms low) Idle

NET_STATUS
Flicker quickly (125ms high/125ms low) Data transfer is ongoing
Always High Voice calling
A reference circuit is shown in the following figure.
Module VBAT
2.2K
Network 4.7K
Indicator
47K
Figure 25: Reference Circuit of Network Status Indication
3.16. STATUS
The STATUS pin is an open drain output for module’s operation status indication. It can be connected to a
GPIO of DTE with a pulled-up resistor, or as an LED indication circuit as below. When the module is
turned on normally, the STATUS will present the low state. Otherwise, the STATUS will present
high-impedance state.
Table 22: Pin Definition of STATUS
An external pull-up resistor

STATUS 61 OD Indicate the module’s operation status is required.
The following figure shows different circuit designs of STATUS, and customers can choose either one
according to the application demands.
Module VDD_MCU Module VBAT
10K
2.2K
STATUS MCU_GPIO STATUS
Figure 26: Reference Circuits of STATUS
NOTE
The status pin cannot be used as indication of module shutdown status when VBAT is removed.
3.17. Behaviors of the MAIN_RI
AT+QCFG="risignaltype","physical" can be used to configure MAIN_RI behaviors.
No matter on which port a URC is presented, the URC will trigger the behaviors of MAIN_RI pin.
NOTE
The URC can be outputted via UART port, USB AT port and USB modem port, which can be set by
AT+QURCCFG command. The default port is USB AT port.
In addition, MAIN_RI behavior can be configured flexibly. The default behavior of the MAIN_RI is shown
as below.
Table 23: Behaviors of the MAIN_RI
State Response
Idle MAIN_RI keeps at high level
URC MAIN_RI outputs 120ms low pulse when a new URC returns
The MAIN_RI behavior can be changed via AT+QCFG="urc/ri/ring"*. Please refer to document [2] for
details.
NOTE
3.18. FORCE_USB_BOOT Interface
EC200T provides a FORCE_USB_BOOT pin. Customers can pull up FORCE_USB_BOOT to 1.8V before
VDD_EXT is powered up, and the module will enter emergency download mode when it is powered on. In
this mode, the module supports firmware upgrade over USB interface.
Table 24: Pin Definition of FORCE_USB_BOOT Interface
1.8V power domain.

FORCE_ Force the module to enter Active high.
115 DI
USB_BOOT emergency download mode It is recommended to reserve test
points.
The following figure shows a reference circuit of FORCE_USB_BOOT interface.
Module
VDD_EXT
Test points
4.7K
FORCE_USB_BOOT
TVS Close to test points
Figure 27: Reference Circuit of FORCE_USB_BOOT Interface
NOTE1
VBAT ≥500ms
PWRKEY VIL≤0.5V
About 5 ms
VDD_EXT FORCE_USB_BOOT can be pulled up to 1.8V
before VDD_EXT Is powered up, and the module
will enter emergency download mode when it is
powered on.
FORCE_
USB_BOOT
About 22ms
RESET_N
Figure 28: Timing Sequence for Entering Emergency Download Mode
NOTES
1. Please make sure that VBAT is stable before pulling down PWRKEY pin. It is recommended that the
time between powering up VBAT and pulling down PWRKEY pin is no less than 30ms.
2. When using MCU to control module to enter the emergency download mode, please follow the above
timing sequence. It is not recommended to pull up FORCE_USB_BOOT to 1.8V before powering up
VBAT. Directly connect the test points as shown in Figure 27 can manually force the module to enter
download mode.
4 Antenna Interfaces
EC200T antenna interfaces include a main antenna interface, a Rx-diversity antenna interface which is
used to resist the fall of signals caused by high speed movement and multipath effect. The antenna ports
have an impedance of 50Ω.
4.1. Main/Rx-diversity Antenna Interfaces
4.1.1. Pin Definition
The pin definition of main antenna and Rx-diversity antenna interfaces is shown below.
Table 25: Pin Definition of RF Antennas
50Ω impedance
ANT_DIV 35 AI Receive diversity antenna
ANT_MAIN 49 IO Main antenna 50Ω impedance
4.1.2. Operating Frequency
Table 26: EC200T-CN Operating Frequencies
3GPP Band Transmit Receive Unit
EGSM900 880~915 925~960 MHz
DCS1800 1710~1785 1805~1880 MHz
WCDMA B1 1920~1980 2110~2170 MHz
WCDMA B5 824~849 869~894 MHz
WCDMA B8 880~915 925~960 MHz
LTE-FDD B1 1920~1980 2110~2170 MHz
LTE-FDD B3 1710~1785 1805~1880 MHz
LTE-FDD B5 824~849 869~894 MHz
LTE-FDD B8 880~915 925~960 MHz
LTE-FDD B20 832~862 791~821 MHz
LTE-FDD B28 703~748 758~803 MHz
LTE-TDD B34 2010~2025 2010~2025 MHz
LTE-TDD B38 2570~2620 2570~2620 MHz
LTE-TDD B39 1880~1920 1880~1920 MHz
LTE-TDD B40 2300~2400 2300~2400 MHz
LTE-TDD B41 2555~2655 2555~2655 MHz
Table 27: EC200T-EU Operating Frequencies
3GPP Band Transmit Receive Unit
EGSM900 880~915 925~960 MHz
DCS1800 1710~1785 1805~1880 MHz
WCDMA B1 1920~1980 2110~2170 MHz
WCDMA B51) 824~849 869~894 MHz
WCDMA B8 880~915 925~960 MHz
LTE-FDD B1 1920~1980 2110~2170 MHz
LTE-FDD B3 1710~1785 1805~1880 MHz
LTE-FDD B51) 824~849 869~894 MHz
LTE-FDD B7 2500~2570 2620~2690 MHz
LTE-FDD B8 880~915 925~960 MHz
LTE-FDD B201) 832~862 791~821 MHz
LTE-FDD B28 703~748 758~803 MHz
LTE-TDD B38 2570~2620 2570~2620 MHz
LTE-TDD B40 2300~2400 2300~2400 MHz
LTE-TDD B41 2555~2655 2555~2655 MHz
NOTE
1) B5 and B20 cannot be simultaneously supported on EC200T-EU, and this is an either-or option.
4.1.3. Reference Design of RF Antenna Interface
A reference design of ANT_MAIN and ANT_DIV antenna pads is shown as below. A π-type matching
circuit should be reserved for better RF performance. The capacitors are not mounted by default.
Main
Module Antenna
R1 0R
ANT_MAIN
C1 C2
NM NM
Diversity
Antenna
R2 0R
ANT_DIV
C3 C4
NM NM
Figure 29: Reference Circuit of RF Antenna Interface
NOTES
1. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve the
receiving sensitivity.
2. Place the π-type matching components (R1&C1&C2 and R2&C3&C4) as close to the antenna as
possible.
4.1.4. Reference Design of RF Layout
For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. The
impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant,
height from the reference ground to the signal layer (H), and the space between the RF trace and the
ground (S). Microstrip and coplanar waveguide are typically used in RF layout to control characteristic
impedance. The following figures are reference designs of microstrip or coplanar waveguide with different
PCB structures.
Figure 30: Microstrip Design on a 2-layer PCB
Figure 31: Coplanar Waveguide Design on a 2-layer PCB
Figure 32: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground)
Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground)
In order to ensure RF performance and reliability, the following principles should be complied with in RF
layout design:
 Use impedance simulation tool to control the characteristic impedance of RF traces as 50Ω.
 The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully
connected to ground.
 The distance between the RF pins and the RF connector should be as short as possible, and all the
right angle traces should be changed to curved ones.
 There should be clearance area under the signal pin of the antenna connector or solder joint.
 The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around
RF traces and the reference ground could help to improve RF performance. The distance between
the ground vias and RF traces should be no less than two times the width of RF signal traces (2×W).
For more details about RF layout, please refer to document [3].
4.2. Antenna Installation
4.2.1. Antenna Requirement
The following table shows the requirements on main antenna and RX-diversity antenna.
Table 28: Antenna Requirements
Type Requirements
VSWR: ≤ 2
Efficiency: > 30%
Max input power: 50W
Input impedance: 50Ω
Cable insertion loss: < 1dB
GSM/UMTS/LTE
(EGSM900, WCDMA B5, WCDMA B8, LTE-FDD B5/B8/B20/B28)
Cable insertion loss: < 1.5dB
(DCS1800, WCDMA B1, LTE B1/B3/B34/B39)
Cable insertion loss: < 2dB
( LTE-TDD B7/B38/B40/B41)
4.2.2. Recommended RF Connector for Antenna Installation
If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connector

provided by Hirose.
Figure 34: Dimensions of U.FL-R-SMT Connector (Unit: mm)
U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT.
Figure 35: Mechanicals of U.FL-LP Connectors
The following figure describes the space factor of mated connector.
Figure 36: Space Factor of Mated Connector (Unit: mm)
For more details, please visit http://hirose.com.
5 Electrical, Reliability and Radio

Characteristics
5.1. Absolute Maximum Ratings
Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are
listed in the following table.
Table 29: Absolute Maximum Ratings
Parameter Min. Max. Unit
VBAT_RF/VBAT_BB -0.3 6.0 V
USB_VBUS -0.3 5.5 V
Peak Current of VBAT_BB 0 0.8 A
Peak Current of VBAT_RF 0 1.8 A
Voltage at Digital Pins -0.3 2.3 V
Voltage at ADC0 0 VBAT_BB V
Voltage at ADC1 0 VBAT_BB V
5.2. Power Supply Ratings
Table 30: The Module Power Supply Ratings
Parameter Description Conditions Min. Typ. Max. Unit
The actual input voltages

VBAT_BB and must be kept between the
3.4 3.8 4.5 V
VBAT_RF minimum and maximum
VBAT
values.
Voltage drop during Maximum power control
400 mV
burst transmission level on EGSM900.
Peak supply current
Maximum power control
IVBAT (during transmission 1.8 2.0 A
level on EGSM900.
slot)
USB connection
USB_VBUS 3.0 5.0 5.25 V
detection
5.3. Operation and Storage Temperatures
The operation and storage temperatures are listed in the following table.
Table 31: Operation and Storage Temperatures
Parameter Min. Typ. Max. Unit
Operation Temperature Range1) -35 +25 +75 ºC
Extended Operation Range2) -40 +85 ºC
Storage Temperature Range -40 +90 ºC
NOTES
1) Within
1. operation temperature range, the module is 3GPP compliant.
2)
2. Within extended temperature range, the module remains the ability to establish and maintain a
voice, SMS, data transmission, etc. There is no unrecoverable malfunction. There are also no effects
on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce
in their value and exceed the specified tolerances. When the temperature returns to the normal
operation temperature levels, the module will meet 3GPP specifications again.
5.4. Current Consumption
The following table shows the current consumption of EC200T-CN. And the current consumption for
EC200T-EU will be supplemented in subsequent versions of this document.
Table 32: EC200T-CN Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 11 uA
AT+CFUN=0 (USB disconnected) 1.67 mA
EGSM900 @DRX=2 (USB disconnected) 3.04 mA
EGSM900 @DRX=5 (USB suspend) 2.11 mA
DCS1800 @DRX=2 (USB disconnected) 3.01 mA
IVBAT DCS1800 @DRX=5 (USB suspend) 2.08 mA

Sleep state
WCDMA @PF=64 (USB disconnected) 3.93 mA
WCDMA @PF=64 (USB suspend) 4.08 mA
WCDMA @ PF=512 (USB disconnected) 1.75 mA
LTE-FDD @PF=32 (USB disconnected) 4.21 mA
LTE-FDD @PF=64 (USB suspend) 2.79 mA
LTE-TDD @PF=32 (USB disconnected) 4.99 mA
LTE-TDD @PF=64 (USB suspend) 3.52 mA
EGSM00 @DRX=5 (USB connected) 30.64 mA
WCDMA @PF=64 (USB connected) 31.44 mA

Idle state
LTE-FDD @PF=64 (USB connected) 31.68 mA
LTE-TDD @ PF=64 (USB disconnected) 31.78 mA
LTE-TDD @ PF=64 (USB connected) 31.99 mA
EGSM900 4DL/1UL @32.25dBm 249.1 mA
EGSM900 3DL/2UL @32.17dBm 407.3 mA
EGSM900 2DL/3UL @31.18dBm 511.1 mA
EGSM900 1DL/4UL @29.18dBm 534.8 mA

GPRS data
transfer
DCS1800 4DL/1UL @29.95dBm 233.6 mA
DCS1800 3DL/2UL @29.94dBm 372.1 mA
DCS1800 2DL/3UL @28.45dBm 445.9 mA
DCS1800 1DL/4UL @26.53dBm 470.3 mA
EDGE data EGSM900 4DL/1UL @28.21dBm 221.8 mA
transfer EGSM900 3DL/2UL @27.51dBm 351.8 mA
EGSM900 2DL/3UL @25.46dBm 470.2 mA
EGSM900 1DL/4UL @23.28dBm 582.1 mA
DCS1800 4DL/1UL @27.31dBm 195.8 mA
DCS1800 3DL/2UL @26.84dBm 301.1 mA
DCS1800 2DL/3UL @25.56dBm 393.9 mA
DCS1800 1DL/4UL @22.87dBm 476.3 mA
WCDMA B1 HSDPA @23.57dBm 675.2 mA
WCDMA B1 HSUPA @22.91dBm 657.9 mA

WCDMA data
transfer
LTE-FDD B1 @22.54dBm 684.1 mA

LTE data
LTE-TDD B34 @23.01dBm 336.5 mA
transfer
EGSM900PCL=5 @32.27dBm 242.2 mA

GSM
EGSM900PCL=12 @19.64dBm 120.1 mA
voice call
EGSM900PCL=19 @5.75dBm 94.2 mA
DCS1800 PCL=0 @29.95dBm 223.6 mA
DCS1800 PCL=7 @16.27dBm 116.2 mA
DCS1800 PCL=15 @1.11dBm 92.2 mA
WCDMA B1 @23.57dBm 646.9 mA

WCDMA
voice call
5.5. RF Output Power
The following table shows the RF output power of EC200T module.
Table 33: EC200T-CN RF Output Power
Frequency Max. Min.
EGSM900 33dBm±2dB 5dBm±5dB
DCS1800 30dBm±2dB 0dBm±5dB
EGSM900 (8-PSK) 27dBm±3dB 5dBm±5dB
DCS1800 (8-PSK) 26dBm±3dB 0dBm±5dB
WCDMA B1/B5/B8 24dBm+1/-3dB < -49dBm
LTE-FDD B1/B3/B5/B8 23dBm±2dB < -39dBm
LTE-TDD B34/B38/B39/B40/B41 23dBm±2dB < -39dBm
Table 34: EC200T-EU RF Output Power
Frequency Max. Min.
EGSM900 33dBm±2dB 5dBm±5dB
DCS1800 30dBm±2dB 0dBm±5dB
EGSM900 (8-PSK) 27dBm±3dB 5dBm±5dB
DCS1800 (8-PSK) 26dBm±3dB 0dBm±5dB
WCDMA B1/B5/B8 24dBm+1/-3dB < -49dBm
LTE-FDD B1/B3/B51)/B7/B8/B201)/B28 23dBm±2dB < -39dBm
LTE-TDD B38/B40/B41 23dBm±2dB < -39dBm
NOTES
1)
1. B5 and B20 cannot be simultaneously supported on EC200T-EU, and this is an either-or option.
2. In GPRS 4 slots Tx mode, the maximum output power is reduced by 2.5dB. The design conforms to
the GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1.
5.6. RF Receiving Sensitivity
The following table shows conducted RF receiving sensitivity of EC200T-CN module. And the data for
EC200T-EU will be supplemented in subsequent versions of this document.
Table 35: EC200T-CN Conducted RF Receiving Sensitivity
Receiving Sensitivity (Typ.)

Frequency 3GPP (SIMO)
Primary Diversity SIMO
EGSM900 -108dBm NA NA -102dBm
DCS1800 -108dBm NA NA -102dBm
WCDMA B1 -108dBm NA NA -106.7dBm
LTE-FDD B1 (10MHz) -97dBm -98.5dBm -100dBm -96.3dBm
LTE-FDD B3 (10MHz) -97.5dBm -97.5dBm -100.5dBm -93.3dBm
LTE-FDD B5 (10MHz) -98dBm -99dBm -101dBm -94.3dBm
LTE-FDD B8 (10MHz) -98dBm -98dBm -101dBm -93.3dBm
LTE-TDD B34 (10MHz) -96.5dBm -97dBm -100dBm -96.3dBm
LTE-TDD B38 (10MHz) -97dBm -97.5dBm -100dBm -96.3dBm
LTE-TDD B39 (10MHz) -97dBm -97.5dBm -100dBm -96.3dBm
LTE-TDD B40 (10MHz) -97dBm -97dBm -100dBm -96.3dBm
LTE-TDD B41 (10MHz) -96dBm -97dBm -99dBm -94.3dBm
5.7. Electrostatic Discharge
The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject
to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and
packaging procedures must be applied throughout the processing, handling and operation of any
application that incorporates the module.
The following table shows the module electrostatics discharge characteristics.
Table 36: Electrostatics Discharge Characteristics (25ºC, 45% Relative Humidity)
Tested Interfaces Contact Discharge Air Discharge Unit
VBAT, GND ±8 ±12 kV
All Antenna Interfaces ±8 ±12 kV
Other Interfaces ±0.5 ±1 kV
6 Mechanical Dimensions
This chapter describes the mechanical dimensions of the module. All dimensions are measured in
millimeter (mm), and the dimensional tolerances are ±0.05mm unless otherwise specified.
6.1. Mechanical Dimensions of the Module
Figure 37: Module Top and Side Dimensions
32.0＋/-0.15
1.90 1.30 3.85
Pin 1
3.5
1.30
3.4
1.1 1.1
5.96 2.0
3.0 2.0
2.0
29.0＋/-0.15
0.87
1.8 3.0 1.8
1.15
2.8
2.15
4.82
1.05
1.6
4.8
6.8
1.7
0.8
3.2 3.4 3.2 3.4 3.2
4.37
3.5
2.49
1.9 2.4 1.5

3.45
Figure 38: Module Bottom Dimensions (Bottom View)
6.2. Recommended Footprint
Figure 39: Recommended Footprint (Top View)
NOTES
1. The keepout area should not be designed.

2. For easy maintenance of the module, please keep about 3mm between the module and other
components in the host PCB.
6.3. Design Effect Drawings of the Module
Figure 40: Top View of the Module
Figure 41: Bottom View of the Module
NOTE
These are renderings of EC200T module. For authentic appearance, please refer to the module that you
receive from Quectel.
7 Storage, Manufacturing and

Packaging
7.1. Storage
EC200T is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are listed
below.
1. Shelf life in vacuum-sealed bag: 12 months at <40ºC/90%RH.
2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other
high temperature processes must be:
 Mounted within 168 hours at the factory environment of ≤30ºC/60%RH.

 Stored at <10%RH.
3. Devices require baking before mounting, if any circumstances below occurs:
 When the ambient temperature is 23ºC±5ºC and the humidity indicator card shows the humidity
is >10% before opening the vacuum-sealed bag.
 Device mounting cannot be finished within 168 hours at factory conditions of ≤30ºC/60%RH.
4. If baking is required, devices may be baked for 8 hours at 120ºC±5ºC.
NOTE
As the plastic package cannot be subjected to high temperature, it should be removed from devices
before high temperature (120ºC) baking. If shorter baking time is desired, please refer to
IPC/JEDECJ-STD-033 for baking procedure.
7.2. Manufacturing and Soldering
Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the
stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly
so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the
thickness of stencil for the module is recommended to be 0.18mm~0.20mm. For more details, please
refer to document [1].
It is suggested that the peak reflow temperature is 238ºC ~245ºC, and the absolute maximum reflow
temperature is 245ºC. To avoid damage to the module caused by repeated heating, it is strongly
recommended that the module should be mounted after reflow soldering for the other side of PCB has
been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and
related parameters are shown below.
Temp. (°C)
Reflow Zone
Max slope: Cooling down
2~3°C/sec C slope: 1~4°C/sec
245
238
220
B D
200
Soak Zone
150 A
100
Max slope: 1~3°C/sec
Figure 42: Reflow Soldering Thermal Profile
Table 37: Recommended Thermal Profile Parameters
Factor Recommendation
Soak Zone
Max slope 1°C/sec~3°C/sec
Soak time (between A and B: 150°C and 200°C) 60sec~120sec
Reflow Zone
Max slope 2°C/sec~3°C/sec
Reflow time (D: over 220°C) 40sec~60sec
Max temperature 238°C~245°C
Cooling down slope 1°C/sec~4°C/sec
Reflow Cycle
Max reflow cycle 1
7.3. Packaging
EC200T is packaged in tape and reel carriers. One reel is 11.88m long and contains 250 modules. The
figure below shows the package details, measured in mm.
1.75±0.1
44.00±0.1 .1
0 ±0 0.35±0.05
2.00±0.1 4.00±0.1 5
1.
20.20±0.15
29.3±0.15
30.3±0.15
30.3±0.15
44.00±0.3
32.5±0.15 4.2±0.15
33.5±0.15 3.1±0.15
32.5±0.15
33.5±0.15
Figure 43: Tape Specifications
48.5
Cover tape
13
Direction of feed
100
44.5+0.20
-0.00
Figure 44: Reel Specifications
1083
Carrier tape Carrier tape

packing module unfolding
Figure 45: Tape and Reel Directions
8 Appendix A References
Table 38: Related Documents
SN Document Name Remark
[1] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide
[2] Quectel_EC200T_AT_Commands_Manual EC200T AT Commands Manual
[3] Quectel_RF_Layout_Application_Note RF Layout Application Note
UMTS&LTE EVB user guide for

[4] Quectel_UMTS&LTE_EVB_User_Guide
UMTS&LTE modules
Table 39: Terms and Abbreviations
Abbreviation Description
AMR Adaptive Multi-rate
AMR Adaptive Multi-rate
bps Bits Per Second
CHAP Challenge Handshake Authentication Protocol
CS Coding Scheme
CTS Clear To Send
DL Downlink
DTE Data Terminal Equipment
DTR Data Terminal Ready
EFR Enhanced Full Rate
EGSM Extended GSM900 Band (including standard GSM900 band)
ESD Electrostatic Discharge
FDD Frequency Division Duplex
FR Full Rate
FTP File Transfer Protocol
FTPS FTP over SSL
GMSK Gaussian Minimum Shift Keying
GSM Global System for Mobile Communications
HR Half Rate
HSDPA High Speed Downlink Packet Access
HSPA High Speed Packet Access
HSUPA High Speed Uplink Packet Access
HTTP Hyper Text Transfer Protocol
HTTPS Hyper Text Transfer Protocol over Secure Socket Layer
LED Light Emitting Diode
LTE Long Term Evolution
MIMO Multiple Input Multiple Output
MMS Multimedia Messaging Service
MSL Moisture Sensitivity Level
NITZ Network Identity and Time Zone
NTP Network Time Protocol
PAP Password Authentication Protocol
PCB Printed Circuit Board
PDU Protocol Data Unit
PF Paging Frame
PPP Point-to-Point Protocol
PSK Phase Shift Keying
QAM Quadrature Amplitude Modulation
QPSK Quadrature Phase Shift Keying
RF Radio Frequency
SIMO Single Input Multiple Output
SMS Short Message Service
SMTP Simple Mail Transfer Protocol
SMTPS Simple Mail Transfer Protocol Secure
SSL Secure Sockets Layer
TCP Transmission Control Protocol
TDD Time Division Duplexing
UART Universal Asynchronous Receiver &Transmitter
UDP User Datagram Protocol
UL Uplink
UMTS Universal Mobile Telecommunications System
URC Unsolicited Result Code
(U)SIM (Universal )Subscriber Identity Module
Vmax Maximum Voltage Value
Vnorm Normal Voltage Value
Vmin Minimum Voltage Value
VIHmax Maximum Input High Level Voltage Value
VIHmin Minimum Input High Level Voltage Value
VILmax Maximum Input Low Level Voltage Value
VILmin Minimum Input Low Level Voltage Value
VImax Absolute Maximum Input Voltage Value
VOHmax Maximum Output High Level Voltage Value
VOHmin Minimum Output High Level Voltage Value
VOLmax Maximum Output Low Level Voltage Value
VOLmin Minimum Output Low Level Voltage Value
VSWR Voltage Standing Wave Ratio
WCDMA Wideband Code Division Multiple Access
WLAN Wireless Local Area Network
9 Appendix B GPRS Coding Schemes
Table 40: Description of Different Coding Schemes
Scheme CS-1 CS-2 CS-3 CS-4
Code Rate 1/2 2/3 3/4 1
USF 3 3 3 3
Pre-coded USF 3 6 6 12
Radio Block excl.USF and BCS 181 268 312 428
BCS 40 16 16 16
Tail 4 4 4 -
Coded Bits 456 588 676 456
Punctured Bits 0 132 220 -
Data Rate Kb/s 9.05 13.4 15.6 21.4
10 Appendix C GPRS Multi-slot Classes

Thirty-three classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot
classes are product dependent, and determine the maximum achievable data rates in both the uplink and
downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots,
while the second number indicates the amount of uplink timeslots. The active slots determine the total
number of slots the GPRS device can use simultaneously for both uplink and downlink communications.
The description of different multi-slot classes is shown in the following table.
Table 41: GPRS Multi-slot Classes
Multislot Class Downlink Slots Uplink Slots Active Slots
1 1 1 2
2 2 1 3
3 2 2 3
4 3 1 4
5 2 2 4
6 3 2 4
7 3 3 4
8 4 1 5
9 3 2 5
10 4 2 5
11 4 3 5
12 4 4 5
13 3 3 NA
14 4 4 NA
15 5 5 NA
16 6 6 NA
17 7 7 NA
18 8 8 NA
19 6 2 NA
20 6 3 NA
21 6 4 NA
22 6 4 NA
23 6 6 NA
24 8 2 NA
25 8 3 NA
26 8 4 NA
27 8 4 NA
28 8 6 NA
29 8 8 NA
30 5 1 6
31 5 2 6
32 5 3 6
33 5 4 6
LTE Standard Module Sires
11 Appendix D EDGE Modulation and

Coding Schemes
Table 42: EDGE Modulation and Coding Schemes
Coding Scheme Modulation Coding Family Timeslot 1 Timeslot 2 Timeslot 4
CS-1 GMSK / 9.05kbps 18.1kbps 36.2kbps
MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps
MCS-2 GMSK B 11.2kbps 22.4kbps 44.8kbps
MCS-3 GMSK A 14.8kbps 29.6kbps 59.2kbps
MCS-4 GMSK C 17.6kbps 35.2kbps 70.4kbps
MCS-5 8-PSK B 22.4kbps 44.8kbps 89.6kbps
MCS-6 8-PSK A 29.6kbps 59.2kbps 118.4kbps
MCS-7 8-PSK B 44.8kbps 89.6kbps 179.2kbps

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EC200T

LTE Standard Module Series

Quectel Wireless Solutions Co., Ltd.

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About the Document

Revision Date Author Description

About the Document ................................................................................................................................... 2

2 Product Concept ................................................................................................................................ 10

3 Application Interfaces ....................................................................................................................... 15

3.15. Network Status Indication ........................................................................................................ 48

5 Electrical, Reliability and Radio Characteristics ............................................................................ 60

6 Mechanical Dimensions .................................................................................................................... 68

7 Storage, Manufacturing and Packaging .......................................................................................... 72

TABLE 1: FREQUENCY BANDS OF EC200T-CN MODULE ........................................................................... 10

TABLE 42: EDGE MODULATION AND CODING SCHEMES ........................................................................... 83

FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 14

FIGURE 39: RECOMMENDED FOOTPRINT (TOP VIEW) .............................................................................. 70

1.1. Safety Information

Wireless devices may cause interference on sensitive medical equipment, so

2.1. General Description

Table 1: Frequency Bands of EC200T-CN Module

Network Type Bands

LTE-FDD (with Rx-diversity)1) B1/B3/B5/B8

LTE-TDD (with Rx-diversity)1) B34/B38/B39/B40/B41

Table 2: Frequency Bands of EC200T-EU Module

Network Type Bands

LTE-FDD (with Rx-diversity)1) B1/B3/B52)/B7/B8/B202)/B28

LTE-TDD (with Rx-diversity)1) B38/B40/B41

2.2. Key Features

The following table describes the detailed features of EC200T module.

Table 3: Key Features of EC200T Module

Supply voltage: 3.4V~4.5V

Coding scheme: CS-1/CS-2/CS-3/CS-4

(U)SIM Interface Support USIM/SIM card: 1.8V, 3.0V

Support one digital audio interface: PCM interface

SD Card Interface* Support SD 3.0 protocol

WLAN Interface* Support SDIO 3.0 interface for WLAN

Rx-diversity Support LTE Rx-diversity

Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT

Firmware Upgrade USB interface and FOTA

2.3. Functional Diagram

VDD_EXT RESET_N USB (U)SIM PCM I2C UARTs STATUS WLAN SD

Figure 1: Functional Diagram

2.4. Evaluation Board

3.1. General Description

“*” means under development.

3.2. Pin Assignment

The following figure shows the pin assignment of EC200T module.

Figure 2: EC200T Module Pin Assignment (Top View)

3.3. Pin Description

The following tables show the pin definition of EC200T module.

Table 4: I/O Parameters Definition

Table 5: Pin Description

Power Supply Input

Power Supply Output

Pin Name Pin No. I/O Description DC Characteristics Comment

Reset the module, If unused, keep it

Pin Name Pin No. I/O Description DC Characteristics Comment

Indicate the module’s 1.8V power domain.