CA (UNIT – 2)

1. Instruction Code
2. Computer Registers.

Computer Registers
Registers are a type of computer memory used to quickly accept, store, and transfer
data and instructions that are being used immediately by the CPU. The registers used
by the CPU are often termed as Processor registers.
A processor register may hold an instruction, a storage address, or any data (such as bit
sequence or individual characters).
The computer needs processor registers for manipulating data and a register for
holding a memory address. The register holding the memory location is used to
calculate the address of the next instruction after the execution of the current
instruction is completed.
Following is the list of some of the most common registers used in
a basic computer:
Register Symbol Number of Function
 bits

Data register DR 16 Holds memory operand

Address register AR 12 Holds address for the memory

Accumulator AC 16 Processor register

Instruction register IR 16 Holds instruction code

Program counter PC 12 Holds address of the

instruction

Temporary register TR 16 Holds temporary data

Input register INPR 8 Carries input character

Output register OUTR 8 Carries output character

The following image shows the register and memory configuration for a basic
computer.

 The Memory unit has a capacity of 4096 words, and each word contains 16
 bits.
 The Data Register (DR) contains 16 bits which hold the operand read from the
memory location.
 The Memory Address Register (MAR) contains 12 bits which hold the address
for the memory location.
 The Program Counter (PC) also contains 12 bits which hold the address of the
next instruction to be read from memory after the current instruction is
executed.
 The Accumulator (AC) register is a general purpose processing register.
 The instruction read from memory is placed in the Instruction register (IR).
 The Temporary Register (TR) is used for holding the temporary data during the
processing.
 The Input Registers (IR) holds the input characters given by the user.
 The Output Registers (OR) holds the output after processing the input data.

Common Bus System

 The basic computer has eight registers, a memory unit and a control unit.
 Paths must be provided to transfer information from one register to another and
between memory and register.
 The number of wires will be excessive if connections are between the outputs
of each register and the inputs of the other registers. An efficient scheme for
transferring information in a system with many registers is to use a common
bus.
 The connection of the registers and memory of the basic computer to a
common bus system is shown in figure 2.5.
  The outputs of seven registers and memory are connected to the common bus.
The specific output that is selected for the bus lines at any given time is
determined from the binary value of the selection variables S2, S1, and S0.
 The number along each output shows the decimal equivalent of the required
binary selection.
 The particular register whose LD (load) input is enabled receives the data from
the bus during the next clock pulse transition. The memory receives the
contents of the bus when its write input is activated. The memory places its 16-
bit output onto the bus when the read input is activated and S2 S1 S0 = 1 1 1.
 Four registers, DR, AC, IR, and TR have 16 bits each. Two registers, AR and
PC, have 12 bits each since they hold a memory address.
 When the contents of AR or PC are applied to the 16-bit common bus, the four
most significant bits are set to 0’s. When AR and PC receive information from
the bus, only the 12 least significant bits are transferred into the register.
 The input register INPR and the output register OUTR have 8 bits each and
communicate with the eight least significant bits in the bus. INPR is connected
to provide information to the bus but OUTR can only receive information from
the bus.

3. Computer Instructions.

Computer instructions are a set of machine language instructions that a particular

processor understands and executes. A computer performs tasks on the basis of the
instruction provided.
An instruction comprises groups called fields. These fields include:

 The Operation code (Opcode) field which specifies the operation to be

performed.
 The Address field which contains the location of the operand, i.e., register or
memory location.
 The Mode field which specifies how the operand will be located.

A basic computer has three instruction code formats which are:

1. Memory - reference instruction

2. Register - reference instruction
3. Input-Output instruction

Memory - reference instruction

 In Memory-reference instruction, 12 bits of memory is used to specify an address and
one bit to specify the addressing mode 'I'.

Register - reference instruction

The Register-reference instructions are represented by the Opcode 111 with a 0 in the
leftmost bit (bit 15) of the instruction.
A Register-reference instruction specifies an operation on or a test of the AC
(Accumulator) register.

Input-Output instruction

Just like the Register-reference instruction, an Input-Output instruction does not need a
reference to memory and is recognized by the operation code 111 with a 1 in the
leftmost bit of the instruction. The remaining 12 bits are used to specify the type of the
input-output operation or test performed.

Note
 The three operation code bits in positions 12 through 14 should be equal to 111.
Otherwise, the instruction is a memory-reference type, and the bit in position 15
is taken as the addressing mode I.
 When the three operation code bits are equal to 111, the control unit inspects
the bit in position 15. If the bit is 0, the instruction is a register-reference type.
Otherwise, the instruction is an input-output type having bit 1 at position 15.

4. Timing and Control.

5. Instruction Cycle.

· A program residing in the memory unit of the computer consists of a

sequence of instructions. In the basic computer, each instruction cycle
consists of the following phases:
1. Fetch an instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory if the instruction has an indirect
address.
4. Execute the instruction.
· After step 4, the control goes back to step 1 to fetch, decode and execute
the next instruction.

This process continues unless a HALT instruction is encountered.

· The flowchart presents an initial configuration for the instruction cycle

and shows how the control determines the instruction type after the
decoding.

· If D7 = 1, the instruction must be register-reference or input-output type.

If D7 = 0, the operation code must be one of the other seven values 110,
specifying a memory- reference instruction. Control then inspects the value
of the first bit of the instruction, which now available in flip-flop I.

· If D7 = 0 and I = 1, we have a memory-reference instruction with an

indirect address. It is then necessary to read the effective address from
 memory.

The three instruction types are subdivided into four separate paths. The
selected

Operation is activated with the clock transition associated with timing signal T3. This
can be symbolized as follows:
D’7 I T3: AR <-- [AR]
D’7 I’ T3: Nothing
D7 I’ T3: Execute a register-reference instruction
D7 I T3 : Execute an input-output instruction

· When a memory-reference instruction with I = 0 is encountered, it is not

necessary to do anything since the effective address is already in AR.

· However, the sequence counter SC must be incremented when D’7 I T3 =

1, so that the execution of the memory-reference instruction can be
continued with timing variable T4.

· A register-reference or input-output instruction can be executed with the

click associated with timing signal T3. After the instruction is executed, SC is
cleared to 0 and control returns to the fetch phase with T0 =1. SC is either
incremented or cleared to 0 with every positive clock transition.

6 Memory – Reference Instruction.

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