Microprogram Programing

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12 `.

LIST OF EXPERIMENTS

8-bit Microprocessor

• Study of 8-bit Microprocessor trainer kits and interfacing facility.

• Simple arithmetic operations


• Addition / Subtraction of two 8-bit numbers
• Multiplication / Division of two 8-bit numbers

• Programming with control instructions


• Finding Maximum / Minimum number in a group of data given
• Arrange the given array of data in Ascending / Descending order
• Code conversions:
HEX to ASCII & vice versa
HEX to BCD & vice versa

• Interface experiments
• ADC interfacing
• DAC interfacing
• Traffic light controller
• Simple experiment using 8251, 8279, 8254

• Programming practice on assembler and simulator tools

8-bit Microcontroller

1. Demonstration of basic instructions with 8051 Micro controller execution.


• Arithmetic operations
• Code conversion: HEX TO ASCII.

• Programming exercise on RAM direct addressing & Bit addressing

• Parallel port programming with 8051 using port 1 facility.


• Stepper motor interfacing
• DAC interfacing

• Programming practice using simulation tools and C-compiler

• Study of microcontrollers with flash memory


EXP. NO: 1. STUDY OF 8-BIT MICROPROCESSOR KIT AND INTERFACING
FACILITY
DATE:

AIM:
To study 8085 microprocessor trainer kit.

APPARATUS: Microprocessor kit.

DESCRIPTION:
The 8085 is an eight bit general purpose microprocessor capable of
addressing 64K of memory locations. The device has 40 pins, require +5 V single power
supply and can operate with a 3MHZ single phase clock. The 8085 is an enhanced
version of its predecessor 8080A. Instruction set of 8085 is upward compatible with that
of 8080A, meaning that the 8085 instruction set includes all the instructions of 8080A
along with some additional ones. Programs written for the 8080A will be executed by
8085A, but both of them are not pin compatible.
All the signals can be classified into 6 groups.
• Address bus
• Data bus
• Control and status signals

• Power supply and frequency signals
• Externally initiated signals
• Serial I/O ports.
ADDRESS BUS:
The 8085 has eight signal lines A15-A8 which are unidirectional and used as
the higher order address bus.
MULTIPLEXED ADDRESS/DATA BUS:
The signal lines AD7-AD0 are bidirectional. They serve a dual purpose.
They are used as the lower order address bus as well as data bus. In executing an
instruction, during the earlier part of the cycle, these lines are used as lower order
address bus and during the later part of the cycle used as data bus. However, the lower
order address bus can be separated from these signals by using a latch.
CONTROL AND STATUS SIGNALS:
This group of signal include two control signals (RD and WR), three status
signals (IO/M, S1 and S0) to identify the nature of the operation, and one specific signal
(ALE) to indicate the beginning of the operation. These signals are as follows.
ALE: Address Latch Enable:
This is a positive going pulse generated every time the 8085 begins an
operation. This signal is primarily used to latch the lower order address from the
multiplexed bus and generates a separate set of eight address lines A7- A0
RD(Read):
This is a read control signal (active low). This signal indicates that the
selected I/O or memory device is to be read and data are available on the data bus.
WR(Write):
This is a write control signal (active low). This signal indicates that the
data on the data bus are to be written into a selected memory or I/O location.
IO/M: This is a status signal used to differentiate between I/O and memory operation.
When it is high, it indicates an I/O operation. When it is low, it indicates a memory
location. This signal is combined with RD and WR to generate IOR and IOW.
S1 & S0:
These status signals similar to IO/M can identify various operations but they are rarely
used in small operations.
Power supply and clock frequency:
The power supply and frequency signals are as follows:
Vcc=+5V
Vss=GND.
X1, X2: A crystal is connected at these two points, the frequency is internally divided by
two to operate a system at 3 MHZ. The crystal should have a frequency of 6MHZ.
CLK (out)-Clock output:
This signal can be used as system clock for other devices.
Externally initiated signal including interrupts: It has five interrupt signals that can be
used to interrupt a program execution. One of the signals, INTR (Interrupt Request)
identical to the 8085A interrupt signal INT. Others are enhancements to the 8088A.
Microprocessor acknowledges an interrupt request signals by INTA signal. In addition
to the interrupt three pins RESET, HOLD and READY accept the externally indicated
signals as inputs. To respond to the HOLD request it has one signal called HLDA.
RESET IN:
When the signal on this pin goes low, the program counter is set to zero.
Buses are tri-stated and the microprocessor is set.
RESET OUT:
This signal indicates that the microprocessor is being reset. The signal can
be used to reset the other device.
SERIAL I/O PORTS:
It has two signals to implement the serial transmission SID (Serial Input
Data) and SOD (Serial Output Data)
HARDWARE SPECIFICATIONS:
1. PROCESSOR:
Intel 8085A
Clock frequency: 6.144 MHZ clock.
2. MEMORY:
Monitor EPROM : 0000 – 1FFF
EPROM Expansion : 2000 – 3FFF & C000 – FFFF
System RAM : 4000 – 5FFF
Monitor Data Area : 4000 – 40FF
User RAM area : 4100 – 5FFF
RAM Expansion : 6000 – BFFF
Note: The Ram area from 4000 – 40FF should not be accessed by the user since it is
used as scratch pad by Monitor program
3. INPUT/OUTPUT
• Parallel: 48 TTL I/O lines using two numbers of 8255(only 24 I/O lines available
in Micro – 85 EBI)
• Serial: One member of RS232C compatible Serial Interface using 8251A
USART.
• Timer: Three channel 16 – bit Programmable Timer using 8253.
Channel 0 is used as baud rate clock generator for 8251 USART
Channel 1 is used for in single stepping user program
Channel 2 is used for hard ware single stepping user program

4. Display:
6 digit, 0.3 “, 7 segment RED LED display with first four digits for address
display and two digits for data display.

5. Keyboard: 24 Keys soft Keyboard including command keys and hexadecimal keys.

6. Audio Cassette interface with file management:


7. Battery Backup:
Onboard Battery back up facility is provided for the available RAM.
8. Hardware Single Step:
This facility allows the user to execute programs at machine cycle level using a
separate switch.
9. System Power Consumption:

Micro –85 EB2 Micro –85 EB1

+5 V @ 1 Amp +5V @ 500mA


+12 V @ 200mA
-12V @ 100mA

10. Power supply Specifications:

Micro –85 EB2 Micro- 85 EB1


Input : 230 V AC @ 50 Hz 230V AC @ 50Hz
Ourput: +5V @ 1. 5 A
+12V @ 150mA
-12V @ 150mA
+30V @ 250mA (Unregulated)
SOFTWARE SPACIFICATIONS:
Micro –85 EB contains a high performance 8K bytes monitor program. It is
designed to respond to user input, RS232C serial communications, tape interface
etc. The following interfacings of Key functions .Out of the 21 key in the
keyboard 16 are hexadecimals and the remaining are stand alone Keys.
KEY

FUNCTION SUMMARY

RES
This Key allows you to terminate any present activity and to return your
Micro-85 KB to an initialized state. When Pressed, the Micro-85 sign on
message appears in the display for few seconds and the monitor and the
monitor will display command prompt “-“ in the left most digit.

INT
Maskable Interrupt connected to CPU’s RST 7.5 interrupt

DEC

Decrement the address by one and Display its Contents (OR) Display the
previous register contents.

EXEC
Execute a particular program after selecting the address through GO
command
NEXT
Increment address by one and display its contents (or) Display the next
register content
The 16 Hexa decimal keys have either a dual or a triple role to play.
• It functions as a Hex key entry when a address or data entry is required.
• It functions as the register key entry during register command.
• It functions as command key when pressed directly after command prompt.

NOTE : The Hex – key function summary below is in the order:

• hex key
• command key
• register key.

RESULT: Thus the study of microprocessor kit is done.

2. SIMPLE ARITHMETIC OPERATIONS

EXP. NO: a. ADDITION & SUBTRACTION OF TWO 8-BIT NUMBERS


DATE:

AIM:
To write an Assembly Language Program (ALP) for performing the addition
and subtraction operation of single byte numbers.

APPARATUS REQUIRED:

SL.NO ITEM SPECIFICATION QUANTITY


1. Microprocessor kit 8085,Vi Microsystems 1
2. Power Supply +5 V dc 1

PROBLEM STATEMENT:
Write an ALP in 8085 P to add and subtract single byte numbers stored in the
memory location 4500H and 4501H and store the result in the memory location
4502H.Also provide an instruction in the above program to consider the carry also and
store the carry in the memory location 4503H.

ALGORITHM:
(i) 8-bit addition
• Initialize the MSBs of sum to 0
• Get the first number from the location 4500H
• Add the second number, which is in the location 4501H to the first number.
• If there is any carry, increment MSBs of sum by 1.
• Store LSBs of sum in the location 4502H
• Store MSBs of sum in the location 4503H.

(ii) 8-bit subtraction


• Initialize the MSBs of difference to 0
• Get the first number from the location 4500H
• Subtract the second number, which is in the location 4501H from the first
number.
• If there is any borrow, increment MSBs of difference by 1.
• Store LSBs of difference in the location 4502H
• Store MSBs of difference in the location 4503H.

PROGRAM TABLE FOR 8 BIT ADDITION: DIRECT ADDRESSING

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 0E,00 MVI C,00

4102 34,00,50 LDA 5000H

4105 47 MOV B,A

4106 3A,01,50 LDA 5001H

4109 80 ADD B
410A D2,0E,41 JNC LOOP1

410D 0C INR C

410E 32,02,50 LOOP1 STA 5002H

4111 79 1 MOV A,C

4112 32,03,50 STA 5003H

4115 76 HLT

PROGRAM TABLE FOR 8 BIT SUBTRACTION: DIRECT ADDRESSING

ADD11111111111111111111 HEX LABE MNEMONI OPERA COMME


RESS CODE L CS ND NT

4100 0C,00 MVI C,00

4102 3A,00,5 LDA 5000H


0
4105 47 MOV B,A

4106 3A,01,5 LDA 5001H


0
4109 90 SUB B

410A D2,0E, JNC LOOP1


41
410D 0C INR C

410E 32,02,5 LOOP STA 5002H


0 1
4111 79 MOV A,C

4112 32,03,5 STA 5003H


0
4115 76 HLT

WITHOUT CARRY & BORROW

INPUT OUTPUT
MEMORY DATA MEMORY DATA DATA
LOCATION LOCATION ADDITION SUBTRACTION
4500 4502

(SUM) (DIFFERENCE)
4501 4503
(CARRY) (BORROW)

WITH CARRY & BORROW

INPUT OUTPUT
MEMORY DATA MEMORY DATA DATA
LOCATION LOCATION ADDITION SUBTRACTION
4500 4502

(SUM) (DIFFERENCE)
4501 4503

(CARRY) (BORROW)

MANUAL CALCULATION:

RESULT: Thus the addition and subtraction of single byte numbers is performed.

EXP.NO: b. MULTIPLICATION & DIVISION OF 8-BIT NUMBERS.


DATE:

AIM:
To write an Assembly Language Program (ALP) for performing the
multiplication and division operation of 8-bit numbers.
APPARATUS REQUIRED:

SL.NO ITEM SPECIFICATION QUANTITY


1. Microprocessor kit 8085,Vi Microsystems 1
2. Power Supply +5 V dc 1

PROBLEM STATEMENT:
Write an ALP in 8085 P to multiply two 8-bit binary numbers stored in the
registers B and C and store the result in the memory location 4502H & 4503H.Write
instructions for dividing the data stored in the memory location 4600H by the data
stored in the memory location 4601H and store the result in 4602H & 4603H.

ALGORITHM:
i. Multiplication of 8-bit numbers:
• Get the multiplier.
• Get the multiplicand
• Initialize the product to 0.
• Product = product + multiplier
• Decrement the multiplicand by 1
• If multiplicand is not equal to 0,repeat from step (4) otherwise store the product.

i. Division of 8-bit numbers.


• Get the dividend
• Get the divisor
• Initialize the quotient to 0.
• Dividend = dividend – divisor
• If the divisor is greater, store the quotient.
• If dividend is greater, quotient = quotient + 1. Repeat from step (4)

8 BIT MULTIPLICATION: DIRECT ADDRESSING

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 0E,00 MVI C,00
4102 3A,00,45 LDA 4500H

4105 47 MOV B,A

4106 3A,01,45 LDA 4501H

4109 57 MOV D,A

410A AF XRA A

410B 82 L2 ADD D

410C D2,10,41 JNC L1

410F 0C INR C

4110 05 L1 DCR B

4111 C2,0B,41 JNZ L2

4114 32,02,45 STA 4502H

4117 79 MOV A,C

4118 32,03,45 STA 4503H

411B 76 HLT

8 BIT DIVISION: DIRECT ADDRESSING


ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT
CODE
4100 3A,01,48 LDA 4501H

4103 47 MOV B,A

4104 3A,00,45 LDA 4500H

4107 0E,00 MVI C,00

4109 B8 L2 CMP B

410A DA,12,41 JC L1

410D 90 SUB B

410E 0C INR C

410F C3,09,41 JMP L2

4112 32,03,45 L1 STA 4503H

4115 79 MOV A,C

4116 32,02,45 STA 4502H

4119 76 HLT
MULTIPLICATION:
INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATIO LOCATIO
N N
4500 4502

PRODUCT
MULTIPLICAND LOWER
BYTE
4501 4503

PRODUCT
MULTIPLIER HIGHER
BYTE

DIVISION:
INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATION LOCATION
4600 4602

DIVIDEND REMAINDER
4601 4603

DIVISOR QUOTIENT

MANUAL CALCULATION:
RESULT: Thus the 8-bit multiplication and division are done using 8085 MPU.

3. PROGRAMMING WITH CONTROL INSTRUCTIONS

EXP.NO: a. FINDING MAXIMUM AND MINIMUM OF ‘N’ NUMBERS


DATE:

AIM:
To write an Assembly Language Program (ALP) to find the maximum and
minimum of ‘n’ numbers.

APPARATUS REQUIRED:

SL.NO ITEM SPECIFICATION QUANTITY


1. Microprocessor kit 8085,Vi Microsystems 1
2. Power Supply +5 V dc 1

PROBLEM STATEMENT:

An array of length 10 is given from the location starting from 4501H.Find the
maximum and minimum of these numbers.

ALGORITHM:

• Initialize the count to the length of the array and get the first data.
• Initialize the first data to be big(small).
• Decrement the count and get the next data.
• If big is larger (smaller) than the next data put max = big (min = small), else max
= next data (min = next data).
• Decrement count and if count is not zero, repeat from step (4), otherwise store
the max (min).
PROGRAM TABLE (TO FIND MINIMUM NUMBER)

ADDRESS HEX LABLE MNEMONICS OPERAND COMMENT


CODE
4100 21,00,45 LXI H,4500

4103 4E MOV C,M

4104 23 INX H

4105 7E MOV A,M

4106 0D DCR C

4107 23 L2 INX H

4108 BE CMP M

4109 DA,0D,41 JC L1

410C 7E MOV A,M

410D 0D L1 DCR C

410E C2,07,41 JNZ L2

4111 23 INX H

4112 77 MOV M,A

4113 76 HLT
PROGRAM TABLE(TO FIND MAXIMUM NUMBER)

ADDRESS HEX LABLE MNEMONICS OPERAND COMMENT


CODE
4100 21,00,45 LXI H,4500

4103 4E MOV C,M

4104 23 INX H

4105 7E MOV A,M

4106 0D DCR C

4107 23 L2 INX H

4108 BE CMP M

4109 D2,0D,41 JNC L1

410C 7E MOV A,M

410D 0D L1 DCR C

410E C2,07,41 JNZ L2

4111 23 INX H

4112 77 MOV M,A

4113 76 HLT
INPUT
MEMORY DATA
LOCATION
4500 (COUNT)
4501
4502
4503
4504
4505
4506
4507
4508
4509
450A

OUTPUT:

MEMORY LOCATION MAXIMUM NUMBER

MEMORY LOCATION MINIMUM NUMBER


RESULT:
Thus the Maximum and Minimum number was found from the array of given
numbers using 8085 ALP.

EXP.NO: b. SORTING ‘n’ NUMBERS


DATE:

AIM:
To write an Assembly Language Program (ALP) to arrange a given array in
ascending and descending order.

APPARATUS REQUIRED:

SL.NO ITEM SPECIFICATION QUANTITY


1. Microprocessor kit 8085,Vi Microsystems 1
2. Power Supply +5 V dc 1

PROBLEM STATEMENT:

An array of length 10 is given from the location starting from 4501H. Sort it into
descending and ascending order.

ALGORITHM:
i. Sorting in ascending order:
• Load the array count in two registers C1 and C2.
• Get the first two numbers.
• Compare the numbers and exchange if necessary so that the two numbers are in
ascending order.
• Decrement C2.
• Get the third number from the array and repeat the process until C2 is 0.
• Decrement C1 and repeat the process until C1 is 0.
i. Sorting in descending order:
• Load the array count in two registers C1 and C2.
• Get the first two numbers.
• Compare the numbers and exchange if necessary so that the two numbers are in
descending order.
• Decrement C2.
• Get the third number from the array and repeat the process until C2 is 0.
• Decrement C1 and repeat the process until C1 is 0.

ASCENDING ORDER

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 3A,00,45 LDA 4500

4103 47 MOV B,A

4106 48 L3 MOV C,B

4107 21,01,45 LXI H, 4501H

4108 7E L2 MOV A,M

4109 23 INX H

410A BE CMP M

410B DA,13,41 JC L1

410C 56 MOV D,M

410D 77 MOV M,A

4110 2B DCX H

4111 72 MOV M,D


4112 23 INX H

4113 0D L1 DCR C

4114 C2,08,41 JNZ L2

4117 05 DCR B

4118 C2,04,41 JNZ L3

411B 76 HLT

DESCENDING ORDER

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 3A,00,45 LDA 4500

4103 47 MOV B,A

4104 48 L3 MOV C,B

4105 21,01,45 LXI H,4501

4108 7E L2 MOV A,M

4109 23 IMX H

410A BE CMP M

410B D2,13,41 JNC L1

410E 56 MOV D,M

410F 77 MOV M,A

4110 2B DCX H

4111 72 MOV M,D

4112 23 INX H
4113 0D L1 DCR C

4114 C2,08,41 JNZ L2

4117 05 DCR B

4122 76 HLT

ASCENDING ORDER
INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATIO LOCATIO
N N
4500 (COUNT) 4500 (COUNT)
4501 4501
4502 4502
4503 4503
4504 4504
4505 4505
4506 4506
4507 4507
4508 4508
4509 4509
450A 450A

DESCENDING ORDER
INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATIO LOCATIO
N N
4500 (COUNT) 4500 (COUNT)
4501 4501
4502 4502
4503 4503
4504 4504
4505 4505
4506 4506
4507 4507
4508 4508
4509 4509
450A 450A

RESULT: Thus the 8085 ALP for sorting an array in ascending and descending
order is written and executed.

• CODE CONVERSIONS

EXP.NO: CONVERSION OF HEXADECIMAL TO ASCII & VICE-VERSA


DATE:

AIM:
To write an Assembly Language Program (ALP) for performing conversion of
hexadecimal to ASCII and vice-versa.

APPARATUS REQUIRED:

SL.NO ITEM SPECIFICATION QUANTITY


1. Microprocessor kit 8085,Vi Microsystems 1
2. Power Supply +5 V dc 1

PROBLEM STATEMENT:
a. A number is stored in the location 4500H. Convert the number into a ASCII
number and store the result in the locations starting from 4501H.
b. An ASCII number is stored in the location 4500H & 4501H. Convert the
number into hex number and store the result in the location 4502H.

ALGORITHM:
a. Conversion of Hexadecimal to ASCII.
• Get the data byte from the memory location to the accumulator.
• Shift the higher order nibble to lower order nibble.
• Call conversion subroutine.

Retrieve the byte again and repeat the conversion process for lower order
nibble.
Subroutine
• Mask higher order nibble.
• If the digit is less than 10, add base number 30H, otherwise add 37H to obtain
code for digits from A to F.
• Return to calling program.

a. Conversion of ASCII to Hexadecimal.


• Get the first ASCII code.
• Call the conversion subroutine.
• Save as higher order nibble.
• Get the second ASCII code.
• Save as lower order nibble.
• Combine the higher order and lower order nibble and store that number.
Subroutine
• Subtract base number 30H.
• If the number is between 0 & 9, return to calling program; otherwise subtract
07H to find the number between A & F and return to calling program.

HEXADECIMAL TO ASCII

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 21,00,45 LXI H,4500

4103 7E MOV A,M

4104 E6,0F ANI 0FH

4106 CD,00,42 CALL SR

4109 3A,00,45 LDA 4500

410C E6,F0 ANI F0H

410E 07 RLC

410F 07 RLC

4110 07 RLC

4111 07 RLC
4112 CD,00,42 CALL SR

4115 76 HLT

“SUB ROUTINE”

4200 FE,0A CPI OAH

4202 DA,07,42 JC L1

4205 C6,07 ADI 07

4207 C6,30 L1 ADI 30

4209 23 INX H

420A 77 MOV M,A


420B C9 RET

ASCII TO HEXADECIMAL

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 3A,00,45 LDA 4500

4103 CD,00,42 CALL SR

4106 4F MOV C,A

4107 3A,01,45 LDA 4501

410A CD,00,42 CALL SR

410D 07 RLC

410E 07 RLC

410F 07 RLC

4110 07 RLC
4111 B1 ORA C

4112 32,02,45 STA 4502

4115 76 HLT

“SUB ROUTINE”

4200 FE,3A SR CPI 3A

4202 DA,07,42 JC L1

4205 D6,07 SUI 07

4207 D6,30 L1 SUI 30

4209 C9 RET

HEX TO ASCII
INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATIO LOCATIO
N N
4500 4501

(ASCII)
(HEX) 4502

(ASCII)

ASCII TO HEX
INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATIO LOCATIO
N N
4500 4502

(ASCII)
4501
(HEX)
(ASCII)

MANUAL CALCULATION:

RESULT: Thus the 8085 ALP for HEX to ASCII and vice versa is executed.

EXP. NO: CONVERSION OF BCD TO HEXADECIMAL AND VICE – VERSA


DATE:
AIM:
To write an Assembly Language Program (ALP) for performing conversion of
BCD to Hexadecimal and vice-versa.

APPARATUS REQUIRED:

SL.NO ITEM SPECIFICATION QUANTITY


1. Microprocessor kit 8085,Vi Microsystems 1
2. Power Supply +5 V dc 1

PROBLEM STATEMENT:
a) A BCD number is stored in the location 4500H. Convert the number into a
hexadecimal number and store the result in the location 4501H.
b) A hexadecimal number is stored in the location 4500H. Convert the number
into BCD number and store the result in the location 4501H, 4502H & 4503H

ALGORITHM:
a. Conversion of BCD to Hexadecimal.
• Separate an 8-bit packed BCD number into two 4-bit unpacked BCD
digits: MSD and LSD.
• Multiply MSD by 10 and add with LSD
• Get the data and rotate it right.
• Depending upon carry store either 0 or 1 in memory.
• Do the rotation 8 times for the 8 bits in that number

a. Conversion of Hexadecimal to BCD.


• Get Hex data as input
• If the number is less than 100, Check whether the number is less than 10,
otherwise divide by 100(64H) or subtract 100 repeatedly until the remainder
is less than 100.The quotient is the most significant BCD digit BCD3.
• If the number is less than 10(0AH), store the number as BCD1, otherwise
divide by 10 repeatedly until the remainder is less than 10.The quotient is
BCD2.
BCD TO HEXADECIMAL

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 3A,00,45 LDA 4500H

4103 47 MOV B,A

4104 E6,0F ANI OF

4106 4F MOV C,A

4107 78 MOV A,B

4108 E6,F0 ANI FO

410A 0F RRC

410B 0F RRC

410C 0F RRC

410D 0F RRC

410E 57 MOV D,A

411F AF XRA A

4110 1E,0A MVI E,OA

4112 83 L1 ADD E

4113 15 DCR D

4114 C2,12,41 JNZ L1

4117 81 ADD C

4118 32,01,45 STA 4501

411B 76 HLT
HEXADECIMAL TO BCD

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 21,00,00 LXI H,0000H

4103 3A,00,45 LDA 4500H

4106 FE,64 L2 CPI 64H

4108 DA,11,41 JC L1

410B D6,64 SUI 64H

410D 24 INR H

410E C3,06,41 JMP L2

4111 FE,0A L1 CPI OAH

4113 DA,1C,41 JC L3

4116 D6,OA SUI 0AH

4118 2C INR L

4119 C3,11,41 JMP L1

411C 32,01,45 L3 STA 4501H

411F 22,02,45 SHLD 4502H

4122 76 HLT
BCD TO HEX
INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATIO LOCATIO
N N
4500 4501

(BCD) (HEX)

HEX TO BCD
INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATIO LOCATION
N
4500 4501
(ONES)
4502
(TENS)
4503
(HUNDREDS)

MANUAL CALCULATION:
RESULT: Thus the 8085 ALP for BCD to HEX and vice versa is executed.

• INTERFACE EXPERIMENTS

EXP.NO: a. INTERFACING ANALOG TO DIGITAL CONVERTER


DATE:

AIM:
To write an assembly language program to convert an analog signal into a digital
signal using an ADC interfacing.

APPARATUS REQUIRED:

SL.NO ITEM SPECIFICATION QUANTITY


1. Microprocessor kit 8085 Vi Microsystems 1
2. Power Supply +5 V dc,+12 V dc 1
3. ADC Interface board Vi Microsystems 1

PROBLEM STATEMENT:
The program starts from memory location 4100H. The program is executed for
various values of analog voltage which are set with the help of a potentiometer. The
LED display is verified with the digital value that is stored in the memory location
4200H.

THEORY:
An ADC usually has two additional control lines: the SOC input to tell the ADC
when to start the conversion and the EOC output to announce when the conversion is
complete. The following program initiates the conversion process, checks the EOC pin
of ADC 0809 as to whether the conversion is over and then inputs the data to the
processor. It also instructs the processor to store the converted digital data at RAM
location 4200H.

ALGORITHM:
• Select the channel and latch the address.
• Send the start conversion pulse.
• Read EOC signal.
• If EOC = 1 continue else go to step (3)
• Read the digital output.
• Store it in a memory location.

PROGRAM TABLE

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 3E,10 MVI A, 10H

4102 D3,C8 OUT C8H

4104 3E,18 MVI A, 18H

4106 D3,C8 OUT C8H


4108 3E,01 MVI A, 01H

410A D3,D0 OUT D0H

410C AF XRA A

410D AF XRA A

410E AF XRA A

410F 3E,00 MVI A, 00H

4111 D3,D0 OUT D0H

4113 DB,D8 L1 IN D8H

4115 E6,01 ANI 01H

4117 FE,01 CPI 01H

4119 C2,13,41 JNZ L1

411C DB,C0 IN C0H

411E 32,00,42 STA 4200H

4121 76 HLT

ANALOG DIGITAL DATA ON LED HEX CODE IN LOCATION

VOLTAGE DISPLAY 4200H


RESULT: Thus the ADC was interfaced with 8085 and the given analog inputs were converted

into its digital equivalent.

EXP.NO: b. INTERFACING DIGITAL – TO – ANALOG CONVERTER


DATE:

AIM :
To write an assembly language program for digital to analog conversion
• To convert digital inputs into analog outputs at DAC
• To generate different types of waveforms at DAC output
APPARATUS REQUIRED:
SL.NO ITEM SPECIFICATION QUANTITY
1. Microprocessor kit 8085 Vi Microsystems 1
2. Power Supply +5 V, dc,+12 V dc 1
3. DAC Interface board Vi Microsystems 1

PROBLEM STATEMENT:
a. The program starts from memory location 4100H. The input data should be available
at
4101H. The output is measured at pin numbers 13 and 26 of DAC chip.
b. The program starts from memory location 4100H. The is given in the memory
locations 4101H and 4108 H. The output is sent to the output ports. The waveforms
are measured at the output ports using CRO.
THEORY:
Since DAC 0800 is an 8 bit DAC and the output voltage variation is between –
5v and +5v. The output voltage varies in steps of 10/256 = 0.04 (approximately). The
digital data input and the corresponding output voltages are presented in the table. The
basic idea behind the generation of waveforms is the continuous generation of analog
output of DAC. With 00 (Hex) as input to DAC2 the analog output is –5v. Similarly with
FF H as input, the output is +5v. Outputting digital data 00 and FF at regular intervals,
to DAC2, results in a square wave of amplitude 5v.Output digital data from 00 to FF in
constant steps of 01 to DAC2. Repeat this sequence again and again. As a result a saw-
tooth wave will be generated at DAC2 output. Output digital data from 00 to FF in
constant steps of 01 to DAC2. Output digital data from FF to 00 in constant steps of 01
to DAC2. Repeat this sequence again and again. As a result a triangular wave will be
generated at DAC2 output.
ALGORITHM:
Measurement of analog voltage:
• Send the digital value of DAC.
• Read the corresponding analog value of its output.

Waveform generation:

Square Waveform:
• Send low value (00) to the DAC.
• Introduce suitable delay.
• Send high value to DAC.
• Introduce delay.
• Repeat the above procedure.
Saw-tooth waveform:
• Load low value (00) to accumulator.
• Send this value to DAC.
• Increment the accumulator.
• Repeat step (2) and (3) until accumulator value reaches FF.
• Repeat the above procedure from step 1.

Triangular waveform:
• Load the low value (00) in accumulator.
• Send this accumulator content to DAC.
• Increment the accumulator.
• Repeat step 2 and 3 until the accumulator reaches FF, decrement the
accumulator and send the accumulator contents to DAC.
• Decrementing and sending the accumulator contents to DAC.
• The above procedure is repeated from step (1)

MEASUREMENT OF ANALOG VOLTAGE:

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
3E,00 MVI A, DATA
4100
4102 D3,C0 OUT C0H

4104 76 HLT

DIGITAL DATA ANALOG VOLTAGE


00 H
7F H
FF H
PROGRAM TABLE: Square Wave

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 3E,00 START MVI A, 00H

4102 D3,C0 OUT C0H

4104 CD,00,42 CALL DELAY

4107 3E,FF MVI A, FFH

4109 D3,C0 OUT C0H

410B CD,00,42 CALL DELAY

410E C3,00,41 JMP START

DELAY SUBROUTINE

4200 0E,FF DELAY MVI C, FFH

4202 0D L1 DCR C

4203 C2,02,42 JNZ L1

4206 C9 RET

DELAY CALCULATION:
PROGRAM TABLE: Saw tooth Wave

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4300 3E,00 START MVI A, 00H

4302 D3,C0 L2 OUT C0H

4304 3C INR A

4305 FE,FF CPI FFH

4307 C2,02,42 JNZ L2

430A D3,C0 OUT C0H

430C C3,00,42 JMP START


PROGRAM TABLE: Triangular Wave

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4400 3E,00 START MVI A, 00H

4402 D3,C0 L1 OUT C0H

4404 3C INR A

4405 FE,FF CPI FFH

4407 C2,02,43 JNZ L1

440A D3,C0 OUT C0H

440C 3D L2 DCR A

440D D3,C0 OUT C0H

440F C2,0C,43 JNZ L2

4412 D3,C0 OUT C0H

4414 C3,00,43 JMP START


WAVEFORM GENERATION:

WAVEFORMS AMPLITUDE TIMEPERIOD


Square Waveform

Saw-tooth waveform

Triangular waveform

MODEL GRAPH:

Square Waveform Saw-tooth waveform

Triangular waveform
RESULT: Thus the DAC was interfaced with 8085 and different waveforms have been

generated.

EXP. NO: c. TRAFFIC LIGHT CONTROLLER


DATE:

AIM:
To write an assembly language program to simulate the traffic lights at an intersection using
a traffic light interface.

APPARATUS REQUIRED:
SL.NO ITEM SPECIFICATION QUANTITY
1. Microprocessor kit 8085 Vi Microsystems 1
2. Power Supply +5 V dc, +12 V dc 1
3. Traffic light interface kit. Vi Microsystems 1

PROBLEM STATEMENT:
The program starts from memory location 4100H.The input data should be available from
5000H to 501AH.The output is displayed in traffic light interface kit.

ALGORITHM:
1. Initialise the ports.
2. Initialise the memory content, with some address to the data.
3. Read data for each sequence from the memory and display it through the ports.
4. After completing all the sequences, repeat from step2.

A SAMPLE SEQUENCE :

1.(a) Vechicles from south can go straight or left.


(b) Vechicles from west can cross the road.
(c) Each pedestrians can cross the road.
(d) Vechicles from east no movement.
(e) Vechicles from north, can go only straight.

2. All ambers are ON, inidcating the change of sequence.

3. (a) Vechicles from east can go straight and left.


(b) Vechicles from south, can go only left.
(c) North pedestrians can cross the road.
(d) Vechicles from north, no movement.
(e) Vechicles from west, can go only straight.
4. All ambers are ON, inidcating the change of sequence.

5. (a) Vechicles from north can go straight and left.


(b) Vechicles from east, can go only left.
(c) West pedestrians can cross the road.
(d) Vechicles from west, no movement.
(e) Vechicles from south, can go only straight.

6. All ambers are ON, inidcating the change of sequence.

7. a) Vechicles from west can go straight and left.


b) Vechicles from north, can go only left.
c) South pedestrians can cross the road.
d) Vechicles from south, no movement.
e) Vechicles from east, can go only straight.
8. All ambers are ON, inidcating the change of sequence.
9. a) All Vechicles from all directions no movement.
b) All pedestrains can cross the road.

BIT ALLOCATION :

BIT LED BIT LED BIT LED


PA0 SOUTH LEFT PB0 NORTH LEFT PC0 WEST STRAIGHT
PA1 SOUTH RIGHT PB1 NORTH RIGHT PC1 NORTH STRAIGHT
PA2 SOUTH PN2 NORTH AMBER PC2 EAST STRAIGHT
PA3 AMBER PB3 NORTH RED PC3 SOUTH STRAIGHT
PA4 SOUTH RED PB4 WEST LEFT PC4 NORTH PD
PA5 EAST LEFT PB5 WEST RIGHT PC5 WEST PD
PA6 EAST RIGHT PB6 WEST AMBER PC6 SOUTH PD
PA7 EAST AMBER PB7 WEST RED PC7 EAST PD
EAST RED

PROGRAM TABLE

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
RESULT: Thus ALP for interfacing traffic light controller is written and executed.

EXP. NO: INTERFACING USART 8251


DATE:

AIM:
To study interfacing technique of 8251 (USART) with microprocessor 8085
and write an 8085 ALP to transmit and receive data between two serial ports with
RS232 cable.
APPARATUS REQUIRED:
8085 kit (2 Nos), RS232 cable.

THEORY:
The 8251 is used as a peripheral device for serial communication and is
programmed by the CPU to operate using virtually any serial data transmission
technique. The USART accepts data characters from the CPU in parallel format and
then converts them into a continuous serial data stream for transmission.
Simultaneously, it can receive serial data streams and convert them into parallel data
characters for the CPU. The CPU can read the status of the USART at any time. These
include data transmission errors and control signals. The control signals define the
complete functional definition of the 8251. Control words should be written into the
control register of 8251.These control words are split into two formats: 1) Mode
instruction word & 2) Command instruction word. Status word format is used to
examine the error during functional operation.
1...transmit enable
1...data terminal ready
1... receive enable
1... send break character
1.... reset error flags (pe,oe,fe)
1..... request to send (rts)
1...... internal reset
1....... enter hunt mode (enable search for sync characters)

1 ransmitter ready
1. receiver ready
1.. transmitter empty
1... parity error (pe)
1.... overrun error (oe)
1..... framing error (fe), async only
1...... sync detect, sync only
1....... data set ready (dsr)

ALGORITHM:
• Initialize 8253 and 8251 to check the transmission and reception of a character
• Initialize8253 to give an output of 150Khz at channel 0 which will give a 9600
baud rate of 8251.
• The command word and mode word is written to the 8251 to set up for
subsequent operations
• The status word is read from the 8251 on completion of a serial I/O operation, or
when the host CPU is checking the status of the device before starting the next
I/O operation

PROGRAM:
Memory Hex Label Mnemonics Comments
Location Code
Transmitter End
4100 3E MVI A,36 Channel 0 in mode 4 of 8253
36 H
4102 D3 OUT CE
CE H
4104 3E MVI A,0A LSB of Count
0A H
4106 D3 OUT C8
C8 H
4108 3E MVI A,00 MSB of Count
00 H
410A D3 OUT C8
C8 H
410C 3E MVI A,4E Initializing 8251 using mode command
4E H word for 8 bit data, No parity, Baud
rate factor(16x) & 1 stop bit.
410E D3 OUT C2
C2 H
4110 3E MVI A,37 Control word 37 enables transmit
37 H enable & receive enable bits, forces DTR
o/p to 0, resets error flags,& forces RTS
o/p to 0.
4112 D3 OUT C2
C2 H
4114 DB LOP: IN C2 Read status word.
C2 H
4116 E6 ANI 04 Check for transmitter empty. When
04 H 8251 has no character to transmit this
bit will go high.
4118 CA 14 JZ
41 LOP
411B 3E MVI A,41
41 H
411D D3 OUT C0 Send the data 41
C0 H
411F CF RST1
Receiver End
4200 3E MVI A,36 Channel 0 in mode 4 of 8253
36 H
4202 D3 OUT CE
CE H
4204 3E MVI A,0A LSB of Count
0A H
4206 D3 OUT C8
C8 H
4208 3E MVI A,00 MSB of Count
00 H
420A D3 OUT C8
C8 H
420C 3E MVI A,4E Initializing 8251 using mode command
4E H word for 8 bit data, No parity, Baud
rate factor(16x) & 1 stop bit.
420E D3 OUT C2
C2 H
4210 3E MVI A,37 Control word 37 enables transmit
37 H enable & receive enable bits, forces DTR
o/p to 0, resets error flags,& forces RTS
o/p to 0.
4212 D3 OUT C2
C2 H
4214 DB LOP1: IN C2 Read status word.
C2 H
4216 E6 ANI 02 Check for receiver ready.This bit
02 H indicates that 8251 contains a character
that is ready tobe input to the CPU.
4218 CA 14 JZ
42 LOP1
421B DB IN C0 Receive the data.
C0 H
421D 32 50 STA 4150
41 H
4220 CF RST1
Memory Location Input Data Output Data

RESULT: Thus ALP for serial data communication using USART 8251 is written and
executed.
EXP.NO: INTERFACING PRGRAMMABLE KEYBOARD AND DISPLAY
DATE: CONTROLLER- 8279

AIM:
(1) To display the rolling message “HELP US “in the display.
(2) To accept a key and to display it.

APPARATUS REQUIRED:
8085 Microprocessor kit,
Power supply,
Interfacing board.

PROBLEM STATEMENT:
The program starts from memory location 4100H. The input data should be
available at 4200H. The output is displayed in 8279-interface kit.
ALGORITHM:

(i) Display of rolling message “HELP US “


• Initialize the counter
• Set 8279 for 8 digit character display, right entry
• Set 8279 for clearing the display
• Write the command to display
• Load the character into accumulator and display it
• Introduce the delay
• Repeat from step 1.

(ii) Accepting a key and to display it


• Initialize the counter
• Set 8279 for 8 digit character display, right entry
• Set 8279 for clearing the display
• Write the command to display
• key in the character and load it into accumulator
• Repeat step 5.

1. Display Mode Setup: Control word-10 H

1. 0 0 1 0 0 0 0
0 0 0 D D K K K

DD
00- 8Bit character display left entry
01- 16Bit character display left entry
10- 8Bit character display right entry
11- 16Bit character display right entry
KKK- Key Board Mode
000-2Key lockout.
2.Clear Display: Control word-DC H
1 1 0 1 1 1 0 0
1 1 0 CD CD CD CF CA

11 A0-3; B0-3 =FF

3. Write Display: Control word-90H

1 0 0 1 0 0 0 0
1 0 0 AI A A A A

Selects one of the 16 rows of display.

Auto increment = 1, the row address selected will be incremented after each of read and
write operation of the display RAM.

4. Read a Key:

0 0 E E E X X X
CNTL SHIFT

Indicates the column in


which the key was found
Intiates the row in
which the key was found.

5. Read FIFO: Control word: 40H

0 1 0 0 0 0 0 0
0 1 0 AI x A A A

PROGRAM TABLE

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 3E,10 MVI A, 10H

4102 D3,C2 OUT C2H

4104 3E,DC MVI A, DCH

4106 D3,C2 OUT C2H

4108 3E,90 MVI A, 90H

410A D3,C2 OUT C2H

410C 06,08 L2 MVI B, 08H

410E 21,00,45 LXI H, 4500H

4111 7E L1 MOV A,M

4112 D3,C0 OUT C0H

4114 CD,1F,41 CALL DELAY

4117 23 INX H

4118 05 DCR B

4119 C2,11,41 JNZ L1


411C C3,0C,41 JMP L2

411F 11,FF,FF DELAY LXI D, FFFFH

4122 1B L3: DCX D

4123 7A MOV A,D

4124 B3 ORA E

4125 C2,22,41 JNZ L3

4128 C9 RET

DELAY CALCULATION:

INPUT DATA:

MEMORY 7-SEGMENT LED FORMAT HEX DATA


LOCATION d c b a dp e g f
4200H FF H - SPACE
4201H -H
4202H -E
4203H -L
4204H -P
4205H FF H - SPACE
4206H -U
4207H -S
RESULT:
Thus the rolling message “HELP US” is displayed using 8279 interface kit.

EXP. NO: INTERFACING PROGRAMMABLE TIMER-8253


DATE:

AIM :
To study different modes of operation of programmable timer 8253

APPARATUS REQUIRED:

SL.NO ITEM SPECIFICATION QUANTITY


1. Microprocessor kit 8085 Vi Microsystems 1
2. Power Supply +5V dc 1
3. 8253 interfacing kit 1
4. CRO 1

PROBLEM STATEMENT:
The program starts from memory location 4100 H onwards. Output waveform
can be observed by properly connecting CRO at the output port.

THEORY:

The main features of the timer are,


i. Three independent 16-bit counters
ii. Input clock from DC to 2 MHz
iii. Programmable counter modes
iv. Count binary or BCD
The control signals with which the 8253 interfaces with the CPU are CS,
RD, WR, A1, A2.The basic operations performed by 8253 are determined
by these control signals. It has six different modes of operation, viz, mode
0 to mode 5.
MODE 0 – INTERRUPT ON TERMINAL COUNT
The output will be initially low after mode set operation. After loading the
counter, the output will remain low while counting and on terminal count; the output
will become high, until reloaded again.

MODE 1 – PROGRAMMABLE ONE SHOT


After loading the counter, the output will remain low following the rising edge of
the gate input. The output will go high on the terminal count. It is retriggerable; hence
the output will remain low for the full count after any rising edge of the gate input.

MODE 2 – RATE GENERATOR


It is a simple divide - by – N counter. The output will be low for one input clock
period. The period from one output pulse to the next equals the number of input counts
in the count register. If the count register is reloaded between output pulses, the present
period will not be affected, but the subsequent period will reflect the new value.

MODE 3 – SQUARE WAVE GENERATOR


It is similar to mode 2, except that the output will remain high until one half for
even number count, If the count is odd, the output will be high for (count+1)/2 counts
and low for (count-1)/2 counts

MODE 4 – SOFTWARE TRIGGERED STROBE


The output is high after the mode set operation and also during counting. On
terminal count, the output will go low for one clock period and becomes high again.
This mode can be used for interrupt generation.

MODE 5 – HARDWARE TRIGGERED STROBE


Counter starts counting after rising edge of trigger input and output goes low for
one clock period when terminal count is reached. The counter is retriggerable.

ALGORITHM:
Mode 0-
1. Initialize channel 0 in mode 0
2. Initialize the LSB of the count.
3. Initialize the MSB of the count.
4. Trigger the count
5. Read the corresponding output in CRO.

Mode 1-
1. Initialize channel 0 in mode 1
2. Initialize the LSB of the count.
3. Initialize the MSB of the count.
4. Trigger the count
5. Read the corresponding output in CRO.
Mode 2-
1. Initialize channel 0 in mode 2
2. Initialize the LSB of the count.
3. Initialize the MSB of the count.
4. Trigger the count
5. Read the corresponding output in CRO.

Mode 3-
1. Initialize channel 0 in mode 3
2. Initialize the LSB of the count.
3. Initialize the MSB of the count.
4. Trigger the count
5. Read the corresponding output in CRO.

Mode 4-
1. Initialize channel 0 in mode 4
2. Initialize the LSB of the count.
3. Initialize the MSB of the count.
4. Trigger the count
5. Read the corresponding output in CRO.

Mode 5-
1. Initialize channel 0 in mode 5
2. Initialize the LSB of the count.
3. Initialize the MSB of the count.
4. Trigger the count
5. Read the corresponding output in CRO.
PORT ADDRESS :
1. CONTROL REGISTER – CEH
2. COUNTER OF CHANNEL 0 - C8H
3. COUNTER OF CHANNEL 1 - CAH
4. COUNTER OF CHANNEL 2 - CCH
5. O/P PORT OF CHANNEL 0 - 3BH
6. O/P PORT OF CHANNEL 1 - 3CH
7. O/P PORT OF CHANNEL 2 -3DH

CONTROL WORD FORMAT:

D7 D6 D5 D4 D3 D2 D1 D0
SC1 SC0 RL1 RL0 M2 M1 M0 BCD

0 0 1 1 0 1 0 Mode 2
= 34 H

0 0 1 1 0 1 1 Mode 3
= 36 H

SC1 SC0 CHANNEL SELECT RL1 RL0 READ/LOAD

0 0 CHANNEL 0 0 0 LATCH
0 1 CHANNEL 1 0 1 LSB
1 0 CHANNEL 2 1 0 MSB
1 1 ----- 1 1 LSB FIRST, MSB NEXT
BCD --0 –BINARY COUNTER 1 --BCD COUNTER

M2 M1 M0 MODE

0 0 0 MODE 0
0 0 1 MODE 1
0 1 0 MODE 2
0 1 1 MODE 3
1 0 0 MODE 4
1 0 1 MODE 5

PORT PIN ARRANGEMENT DEBOUNCE CIRCUIT CONNECTION


1 CLK 0

2 CLK 1

3 CLK 2

4 OUT 0

5 OUT 1

6 OUT 2
7 GATE 0

8 GATE 1

9 GATE 2

10 GND

NOTE: For all the modes CRO must be set in DC mode


MODE 2 – RATE GENERATOR:

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENTS


CODE
4100 3E,34 MVI A, 34H
4102 D3,CE OUT CE
4104 3E,0A MVI A, 0AH
4106 D3,C8 OUT C2
4108 3E,00 MVI A, 00H
410A D3,C8 OUT C2
410C 76 HLT

MODE 3 – SQUARE WAVES GENERATOR:

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENTS


CODE
4100 3E,36 MVI A, 36H
4102 D3,CE OUT CE
4104 3E,0A MVI A, 0AH
4106 D3,C8 OUT C8
4108 3E,00 MVI A, 00H
410A D3,C8 OUT C8
410C 76 HLT

MODEL GRAPH:

RATE GENERATOR SQUARE WAVE


GENERATOR
RESULT: Thus an ALP for rate generator and square wave generator are written and
executed.
EXP. NO: PROGRAMMING PRACTICE ON ASSEMBLER AND SIMULATOR TOOLS

DATE:
AIM:
To write an Assembly Language Program (ALP) for performing the addition,
subtraction, multiplication and division operation of 16-bit numbers using 8085
simulation tool.

APPARATUS REQUIRED:
System With 8085 simulation tool.

ALGORITHM:
(i)16-bit addition
Initialize the MSBs of sum to 0
a. Get the first data in a register pair.
b. Get the second data in a register pair.
c. Add the contents of both the register pairs.
d. If there is any carry, increment MSBs of sum by 1.
e. Store LSBs of sum.
f. Store MSBs of sum.
(ii)16-bit subtraction
a. Initialize the MSBs of difference to 0
b. Get the first low byte of data-1in the accumulator.
c. Subtract the low byte of data-2 from that of data-1.
d. Store the low byte of the result.
e. Get the high byte of data-1 in the accumulator
f. Subtract the high byte of data-2 and also the carry from the high byte of data-1.
g. Store the high byte of the result.
h. If there is any carry, increment the contents MSBs by 1.
i. Store MSBs of result.
(iii)Multiplication of 16-bit numbers:
a. Get the multiplier.
b. Get the multiplicand
c. Initialize the MSBs and LSBs of product to 0.
d. LSBs of Product = LSBs of product + multiplier
e. If there is a carry, increment MSBs of product.
f. Decrement the multiplicand by 1
g. If multiplicand is not equal to 0,repeat from step (d) otherwise store the LSBs MSBs
of product.
(iv)Division of 16-bit numbers.
a. Get the lower order byte of the dividend
b. Get the lower order byte of the divisor
c. Initialize the quotient to 0.
d. Dividend = dividend – divisor
e. If the divisor is greater, store the quotient.
f. If dividend is greater, quotient = quotient + 1. Repeat from step (d)
g. If there is borrow, add with higher order byte of the divisor.
h. Get the higher order byte of the dividend
i. Get the higher order byte of the divisor.
j. Dividend = dividend – divisor
k. If the divisor is greater, store the quotient.
l. If dividend is greater, quotient = quotient + 1. Repeat from step (d)

PROGRAM TABLE FOR 16 BIT ADDITIONS (DIRECT ADDRESSING)

HEX LABEL MNEMONICS OPERAND COMMENT


CODE
0E,00 MVI C,00

2A,00,45 LHLD 4500

EB XCHG

2A,02,45 LHLD 4502

7D MOV A,L

83 ADD E

6F MOV L,A

7C MOV A,H

82 ADC D

67 MOV H,A

D2,13,41 JNC L1

0C INR C

22,04,45 L1 SHLD 4504


79 MOV A,C

32,06,45 STA 4506

76 HLT

PROGRAM TABLE FOR 16 BIT SUBTRACTIONS (DIRECT ADDRESSING)

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 0E,00 MVI C,00

4102 2A,00,45 LHLD 4500

4105 EB XCHG

4106 2A,05,45 LHLD 4502

4109 7D MOV A,L

410A 93 SUB E

410B 6F MOV L,A

410C 7C MOV A,H

410D 9A SBB D

410E 67 MOV H,A

410F D2,13,41 INR L1

4112 0C INR C

4113 22,04,45 L1 SHLD 4504

4116 79 MOV A,C


4117 32,06,45 STA 4506

411A 76 HLT

PROGRAM TABLE FOR 16 BIT MULTIPLICATIONS (DIRECT ADDRESSING)

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 LHLD 4500

4103 2A,00,45 XCHG

4104 EB LHLD 4502

4107 2A,02,45 SPHL

4108 F9 LXI H,0000

410B 21,00,00 LXI B,0000

410E 01,00,00 L2 DAD SP

410F 39 JNC L1

4110 D2,13,41 INX B

4111 03 L1 DCX D

4112 1B MOV A,E

4113 7B ORA D

4114 B2 JNZ L

4115 C2,0E,41 SHD 4504


4118 22,04,45 MOV H,B

4119 60 MOV L,C

411A 69 SHLD 4506

411D 76 HLT

PROGRAM TABLE FOR 16 BIT DIVISIONS (DIRECT ADDRESSING)

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 2A,00,42 LHLD 4200H

413 EB XCHG

4104 2A,02,42 LHLD 4202H

4107 01,00,00 LXI B,0000

410A 7D L2 MOV A,L

410B 93 SUB E

410C 6F MOV L,A

410D 7C MOV A,H

410E 9A SBB D

410F 67 MOV H,A

4110 DA,17,41 JC L1
4113 03 INX B

4114 C3,0A,41 JMP L2

4117 7D L1 MOV A,L

4118 83 ADD E

4119 6F MOV L,A

411A 7C MOV A,H

411B 8A ADC D

41IC 67 MOV H,A

411D 22,04,45 SHLD 4504

4120 69 MOV L,C


4121 60 MOV H,B

4122 22,06,45 SHLD 4506

4125 76 HLT

8051 PROGRAMMING

EXP. NO: ARITHMETIC OPERATIONS


DATE:

8 BIT ADDITION
AIM:
To write a program to add two 8-bit numbers using 8051 microcontroller.

ALGORITHM:

1. Clear Program Status Word.


2. Select Register bank by giving proper values to RS1 & RS0 of PSW.
3. Load accumulator A with any desired 8-bit data.
4. Load the register R 0 with the second 8- bit data.
5. Add these two 8-bit numbers.
6. Store the result.
7. Stop the program.

FLOW CHART:

Clear PSW
Select Register Bank
Load A and R 0 with 8- bit datas
Add A & R 0
Store the sum

8 Bit Addition (Immediate Addressing)

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 C3 CLR C

4101 74,60 MOV A,#60


4103 78,70 MOV R0,#70

4105 79,00 MOV R1,#00

4107 90,45,00 MOV DPTR,#4500

410A 28 ADD A,F0

410B 50,01 JNC LOOP1

410D 69 INC R1

410E F0 LOOP1 MOVX @DPTR,A

410F A3 INC DPTR

4110 E9 MOV A,R1

4111 F0 MOVX @DPTR,A

4112 80,FE LOOP2 SJMP LOOP2

INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATION LOCATION
4500 (SUM)
4501(CARRY)
RESULT: Thus the 8051 ALP for addition of two 8-bit numbers is executed.

8 BIT SUBTRACTION
AIM:
To perform subtraction of two 8 bit data and store the result in memory.
ALGORITHM:
• Clear the carry flag.
• Initialize the register for borrow.
• Get the first operand into the accumulator.
• Subtract the second operand from the accumulator.
• If a borrow results increment the carry register.
• Store the result in memory.

FLOWCHART:

8 Bit Subtraction (Immediate Addressing)


ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT
CODE
4100 C3 CLR C

4101 74,60 MOV A,#60

4103 78,60 MOV R0,#60

4105 79,00 MOV R1,#00

4107 90,45,00 MOV DPTR,#4500

410A 98 SUB A,R0

410B 50,01 JNC LOOP1

410D 09 INC R1

410E F0 LOOP1 MOVX @DPTR,A

411F A3 INC DPTR

4110 E9 MOV A,R1


INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATION LOCATION
4500 (DIFFERENCE)

4501 (BORROW)
RESULT: Thus the 8051 ALP for subtraction of two 8 bit numbers is executed.

8 BIT MULTIPLICATIONS

AIM:
To perform multiplication of two 8 bit data and store the result in memory.

ALGORITHM:
• Get the multiplier in the accumulator.
• Get the multiplicand in the B register.
• Multiply A with B.
• Store the product in memory.

FLOWCHART:
8 Bit Multiplication

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 74,0A MOV A,#00AH

4102 75,F0,88 MOV B,#88H

4105 A4 MUL A,B

4106 90,45,00 MOV DPTR,#4500

4109 F0 MOVX @DPTR,A

410A A3 INC DPTR

410B E5,F0 MOV A,B

410D F0 MOVX @DPTR,A

410E 80,FE STOP SJMP STOP


INPUT OUTPUT
MEMORY LOCATION DATA MEMORY LOCATION DATA
4500 4502
4501 4503
RESULT: Thus the 8051 ALP for multiplication of two 8 bit numbers is executed.
8 BIT DIVISION

AIM:
To perform division of two 8 bit data and store the result in memory.

ALGORITHM:
• Get the Dividend in the accumulator.
• Get the Divisor in the B register.
• Divide A by B.
• Store the Quotient and Remainder in memory.

FLOWCHART:
8 Bit Division

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 74,70 MOV A,#70H

4102 75,F0,20 MOV B,#20H

4105 84 DIV A,B

4106 90,45,00 MOV DPTR,#4500

4109 F0 MOVX @DPTR,A

410A A3 INC DPTR

410B E5,F0 MOV A,B

410D F0 MOVX @DPTR,A

410E 80,FE HLT SJMP HLT


INPUT OUTPUT
MEMORY LOCATION DATA MEMORY LOCATION DATA
4500 (dividend) 4502 (remainder)
4501 (divisor) 4503 (quotient)
RESULT: Thus the 8051 ALP for division of two 8 bit numbers is executed.

EXP. NO: HEX TO ASCII CODE CONVERSION


DATE:

AIM:
To write a program for converting HEX data to equivalent ASCII using
microcontroller.

ALGORITHM:

1. Load accumulator with 8-bit data.


2. Subtract contents of accumulator by number 0AH to check if the data is less
than or greater than 0AH.
3. If it is less than 0AH, add 30 with accumulator.
4. If it is greater than 0AH, add 37 with accumulator.
5. Store the result.
6. Stop the program.

FLOW CHART:

Store the result


yes
No
Add A with 0A &37
Get the input data in A
Add A with 0A & 30
Is carry ?
SubtractA-0A

HEX TO ASCII

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 90,45,00 MOV DPTR,#4500

4103 E0 MOVX A,@DPTR

4104 A3 INC DPTR

4105 F8 MOV R0,A

4106 C4 SWAP A
4107 12,42,00 LCALL SR

410A F0 MOV @DPTR,A

410B E8 MOV A,R0

410C 12,42,00 LCALL SR

410F A3 INC DPTR

4110 F0 MOV @DPTR,A

4111 80,FE L1 SJMP L1

“SUB ROUTINE”

4200 54,0F SR ANL A,#0FH

4202 C3 CLR C

4203 9A,0A SUB B A,#0AH

4205 40,02 JC L2

4207 24,07 ADD A,#07H

4209 24,3A L2 ADD A,#3AH

420B 22 RET

INPUT OUTPUT
MEMORY LOCATION DATA MEMORY LOCATION DATA

4500 (HEX) 4501 (ASCII)

4502 (ASCII)
RESULT: Thus the 8051 ALP for HEX to ASCII conversion is executed.

EXP. NO: BIT MANIPULATION


DATE:

AIM:
To write an ALP to perform bit manipulation operation using 8051
microcontroller.

APPARATUS REQUIRED:
8051 microcontroller kit

ALGORITHM:

• Initialize content of accumulator as FFH


• Set carry flag (cy = 1).
• AND bit 7 of accumulator with cy and store PSW format.
• OR bit 6 of PSW and store the PSW format.
• Set bit 5 of SCON.
• Clear bit 1 of SCON.
• Move SCON.1 to carry register.
• Stop the execution of program.

PROGRAM TABLE

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 90,45,00 MOV DPTR,#4500

4103 74,FF MOV A,#FF

4105 D3 SETB C

4106 82,E7 ANL C,ACC.7

4108 E5,D0 MOV A,DOH

410A F0 MOVX @DPTR,A

410B A3 INC DPTR

410C 72,AA ORL C,IE.2

410E C2,06 CLR PSW.6

4110 E5,D0 MOV A,D0H

4112 F0 MOVX @DTR,A

4113 A3 INC DPTR

4114 D2,90 SETB SCON.5

4116 C2,99 CLR SCON.1

4118 E5,98 MOV A,98H

411A F0 MOVX @DPTR,A

411B A3 INC DPTR

411C A2,99 MOV C,SCON.1

411E E5,D0 MOV A,D0H

4120 F0 MOV @DPTR,A

4122 80,FE L1 SJMP L1


OUTPUT:

MEMORY SPECIAL FUNCTION REGISTER BEFORE AFTER


LOCATIO FORMAT EXECUTIO EXECUTIO
N N N
4500H CY AC FO RS1 RS OV - P
(PSW) 0

4501H CY AC FO RS1 RS OV - P
(PSW) 0

4502H SM SM SM RE TB RB T R
(SCON) 0 1 2 N 8 8 I I

4503H CY AC FO RS1 RS OV - P
(PSW) 0

RESULT:
Thus the bit manipulation operation is done in 8051 microcontroller.
EXP.NO: STEPPER MOTOR INTERFACING
DATE:

AIM:
To write an assembly language program in 8051 to rotate the motor at different
speeds in clockwise and in anticlockwise directions with delay.

APPARATUS REQUIRED:
SL.NO ITEM SPECIFICATION QUANTITY
1. Microprocessor kit 8051 Vi Microsystems 1
2. Power Supply +5 V, dc,+12 V dc 1
3. Stepper Motor Vi Microsystems 1
Interface board

PROBLEM STATEMENT:
The program starts from memory location 4100H. The input data should be
available at 4300H. The output is sent through ports to run the stepper motor.

THEORY:
A motor in which the rotor is able to assume only discrete stationary angular
position is a stepper motor. The rotary motion occurs in a stepwise manner from one
equilibrium position to the next.
Two-phase scheme: Any two adjacent stator windings are energized. There are two
magnetic fields active in quadrature and none of the rotor pole faces can be in direct
alignment with the stator poles. A partial but symmetric alignment of the rotor poles is
of course possible.

ALGORITHM:
For running stepper motor clockwise and anticlockwise directions
i. Get the first data from the lookup table.
ii. Initialize the counter and move data into accumulator.
iii. Drive the stepper motor circuitry and introduce delay
iv. Decrement the counter is not zero repeat from step(iii)
v. Repeat the above procedure both for backward and forward directions.

PROGRAM TABLE

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 90,45,00 START MOV DPTR,#4500

4103 7A,04 MOV R2,#04H

4105 A8,82 MOV R0,DPL

4107 A9,83 MOV R1,DPH

4109 E0 L1 MOVX A,@DPTR

410A 90,FF,C0 MOV DPTR,#FFC0

410D F0 MOVX @DPTR,A

410E 08 INC R0

410F 88,82 MOV DPL,R0

4111 89,83 MOV DPH,R1

4113 12,41,1A LCALL DELAY

4116 DA,F1 DJNZ R2, Address


L1
4118 80,E6 SJMP START
411A 7C,55 DELAY MOV R4,#55H

411C 7D,55 L3 MOV R5,#55H

411E DD,FE L2 DJNZ R5,L2

4120 DC,FA DJNZ R4,L3

4122 22 RET

DIAGRAM:

SWITCHING SEQUENCE OF STEPPER MOTOR:

CLOCKWISE DIRECTION

MEMORY A1 A2 B1 B2 HEX
LOCATION CODE
4500 1 0 0 1 09 H
4501 0 1 0 1 05 H
4502 0 1 1 0 06 H
4503 1 0 1 0 0A H

ANTICLOCKWISE DIRECTION

MEMORY A1 A2 B1 B2 HEX
LOCATION CODE
4500 1 0 1 0 0A H
4501 0 1 1 0 06 H
4502 0 1 0 1 05 H
4503 1 0 0 1 09 H

RESULT: Thus the assembly language program for rotating stepper motor in both
clockwise and anticlockwise directions is written and verified.

EXP.NO: INTERFACING DIGITAL – TO – ANALOG CONVERTER


DATE:

AIM :
To write an assembly language program for digital to analog conversion
• To convert digital inputs into analog outputs at DAC
• To generate different types of waveforms at DAC output

APPARATUS REQUIRED:
SL.NO ITEM SPECIFICATION QUANTITY
1. Microprocessor kit 8085 Vi Microsystems 1
2. Power Supply +5 V, dc,+12 V dc 1
3. DAC Interface board Vi Microsystems 1

PROBLEM STATEMENT:
a. The program starts from memory location 4100H. The input data should be available
at
4101H. The output is measured at pin numbers 13 and 26 of DAC chip.
b. The program starts from memory location 4100H. The is given in the memory
locations 4101H and 4108 H. The output is sent to the output ports. The waveforms
are measured at the output ports using CRO.

THEORY:
Since DAC 0800 is an 8 bit DAC and the output voltage variation is between –
5v and +5v. The output voltage varies in steps of 10/256 = 0.04 (approximately). The
digital data input and the corresponding output voltages are presented in the table. The
basic idea behind the generation of waveforms is the continuous generation of analog
output of DAC. With 00 (Hex) as input to DAC2 the analog output is –5v. Similarly with
FF H as input, the output is +5v. Outputting digital data 00 and FF at regular intervals,
to DAC2, results in a square wave of amplitude 5v.Output digital data from 00 to FF in
constant steps of 01 to DAC2. Repeat this sequence again and again. As a result a saw-
tooth wave will be generated at DAC2 output. Output digital data from 00 to FF in
constant steps of 01 to DAC2. Output digital data from FF to 00 in constant steps of 01
to DAC2. Repeat this sequence again and again. As a result a triangular wave will be
generated at DAC2 output.

ALGORITHM:
Measurement of analog voltage:
1. Send the digital value of DAC.
2. Read the corresponding analog value of its output.

Waveform generation:

Square Waveform:
• Send low value (00) to the DAC.
• Introduce suitable delay.
• Send high value to DAC.
• Introduce delay.
• Repeat the above procedure.
Saw-tooth waveform:
• Load low value (00) to accumulator.
• Send this value to DAC.
• Increment the accumulator.
• Repeat step (2) and (3) until accumulator value reaches FF.
• Repeat the above procedure from step 1.

Triangular waveform:
• Load the low value (00) in accumulator.
• Send this accumulator content to DAC.
• Increment the accumulator.
• Repeat step 2 and 3 until the accumulator reaches FF, decrement the
Accumulator and send the accumulator contents to DAC.
• Decrementing and sending the accumulator contents to DAC.
• The above procedure is repeated from step (1)
PROGRAM TABLE: Square Wave

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 90,FF,C0 MOV DPTR,#FFCO

4103 74,00 START MOV A,#00

4105 F0 MOVX @DPTR,A

4106 12,41,12 LCALL DELAY

4109 74,FF MOV A,#FF

410B F0 MOVX @DPTR,A

410C 12,41,42 LCALL DELAY

410F 02,41,03 LJMP START

4112 79,05 DELAY MOV R1,#05


4114 7A,FF LOOP MOV R2,#FF

4116 DA,FE HERE DJNZ R2,HERE

411A D9,FA DJNZ R1,LOOP

411C 22 RET

411D 80,FE SJMP START

PROGRAM TABLE: Saw tooth Wave

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 90,FF,C0 MOV DPTR,#FFC0

4103 74,00 MOV A,#00

4105 F0 LOOP MOVX @DPTR,A

4106 04 INC A

4107 80,FC SJMP LOOP


PROGRAM TABLE: Triangular Wave

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 90,FF,CO MOV DPTR,#FFC0

4103 74,00 START MOV A,#00

4105 F0 LOOP1 MOVX @DPTR,A

4106 04 INC A

4107 70,FC JNZ LOOP1

4109 74,FF MOV A,#FF

410B F0 LOOP2 MOVX @DPTR,A

410C 14 DEC A
411B 70,FC JNZ LOOP2

411F 02,41,03 LJMP START

RESULT: Thus the DAC was interfaced with 8051 and different waveforms have been

generated.

INTERFACING 8251: Corrected code


Program table : USART

PROGRAM TABLE: Transmission code:

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 21,00,50 LXI H,4500
4103 3E,36 MVI A,36
4105 D3,04 OUT 07

4107 3E.40 MVI A,40H

4109 D3,04 OUT 04H

410B 3E,01 MVI A,01H

410D D3,04 OUT 04H

410F 0E,05 L2 MVI C,05

4111 DB,09 L1 IN 09

4113 E6,04 ANI 04

4115 CA,11,41 JZ L1(4111)

4118 7E MOV A,M


4119 D3,08 OUT 08

411B 23 INX H

411C FE,3F CPI 3F

411E C2,0D,41 JNZ L2(410F)

4121 0D DCR C

4122 C2,11,41 JNZ L1(4111)

4125 CF RST 1

PROGRAM TABLE: Reciever code:

ADDRESS HEX LABEL MNEMONICS OPERAND COMMENT


CODE
4100 21,00,50 LXI H,4500
4103 3E,36 MVI A,36
4105 D3,04 OUT 07

4107 3E.40 MVI A,40H

4109 D3,04 OUT 04H

410B 3E,01 MVI A,01H

410D D3,04 OUT 04H

410F 0E,05 L2 MVI C,05

4111 DB,09 L1 IN 09

4113 E6,04 ANI 02

4115 CA,11,41 JZ L1(4111)

4118 DB,09 IN 08
411A 77 MOV M,A
411B 23 INX H

411C FE,3F CPI 3F

411E C2,0F,41 - JNZ L2(410F)

4121 0D DCR C

4122 C2,11,41 JNZ L1(4111)

4125 CF RST 1

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