The World of 400G Optical Client Interfaces

PLUGGABLES BLOCK DIAGRAMS RECOMMENDATIONSONDATIONS

GLOSSARY
400G Client Pluggables 400G DR4 Module  IEEE P802.3bs
www.ieee802.org
 CFP MSA
www.cfp-msa.org
APC
ATC
Automatic Power Control
Automatic Temperature Control
LD
MMF
Laser Driver
Multi Mode Fibre
Reach 500 m, PSM4
200 Gb/s and  OIF CDR Clock and Data Recovery OSFP Octal Small Form-factor Pluggable
Wavelength range: 1304.5 to 1317.5 nm
400 Gb/s Ethernet Task Force www.oiforum.com CFP8 400 G Form-factor Pluggable PAM-4 4 Level Pulse Amplitude Modulation
QSFP-DD OSFP QSFP56
26.5625 GBd PAM-4 53.125 GBd PAM-4  IEEE 802.3cd 8-times density PSM Parallel Single Mode
 ITU-T
400GAUI-8 100 Gbps per Fiber 50 Gb/s, 100 Gb/s, and www.itu.int CMIS Common Management QSFP-DD Quad Small Form-factor Pluggable
ROSA 200 Gb/s Ethernet Task Force Interface Specifications Double Density
 Ethernet Alliance
• QSFP-DD/OSFP management interface
RX0
TIA PIN  SFP-DD MSA www.ethernetalliance.org SMF Single Mode Fibre
PAM4
www.sfp-dd.org DML Direct Modulated Laser
8:4
 100G Lambda MSA TEC Thermo-Electric Cooler
Demux DSP Digital Signal Processor
RX7 TIA PIN  QSFP-DD MSA www.100glambda.com TIA Trans Impedance Amplifier
Optical www.qsfp-dd.com EA Electro-Absorption
VCSEL Vertical-Cavity Surface-Emitting Laser
Interface  25G Ethernet Consortium I2C Inter-Integrated Circuit
 OSFP MSA 25gethernet.org • QSFP+/QSFP28 management interface
Bit Rates 400GE 400GE 200GE TOSA MPO www.osfpmsa.org
Laser Connector
2 x 200GE 200GE & 2 x 200GE 4 x 50GE TX0
PAM4 Driver
Laser
4 x 100GE 4 x 100GE
THE CHALLENGES OF 400G PLUGGABLE OPTICS
8:4
8 x 50GE 8 x 50GE TX7 Mux Laser Laser
Driver

PMD SR4.2 (100 m), 8 MMF, BiDi SR4.2 (100 m), 8 MMF, BiDi SR4 (100 m), 4 MMF With PAM-4 Coding and FEC, a simple BERT Test is no longer meaningful. Module management
I2C control
(Phys. Medium Dependent) SR8 (100 m), 8 MMF SR8 (100 m), 8 MMF DR4 (500 m), PSM4 To find the root cause of errors, sophisticated error analysis methods are needed: The I2C based interface has evolved from a basic memory mapped management of
DR4 (500 m), PSM4 DR4 (500 m), PSM4 FR4 (2 km), SMF, 4 λ Control Interface CMIS-4.0 the SFF-8636 through to QSFP28 at 100G to a sophisticated and stateful CMIS 4.0.
• Error distribution and error performance in unframed mode, using specific PAM-4
Reach, fiber type, number
CWDM8 (2 -10 km), SMF, 8 λ CWDM8 (2 -10 km), SMF, 8 λ LR4 (10 km), SMF, 4 λ aware test patterns le PRBSQ and SSPRQ This evolution has been extremely challenging for the ecosystem and a solid
of parallel fibers, number
of wavelengths (λ)
FR4 (2 km), SMF, 4 λ
FR8 (2 km), SMF, 8 λ
FR4 (2 km), SMF, 4 λ
FR8 (2 km), SMF, 8 λ
ER4 (40 km), SMF, 4 λ 400G FR4 Module • Check pattern dependency of errors, pattern slips
• FEC performance & margin test, using random error insertion
working knowledge of the CMIS 4.0 documentation is key to robust and stable
module management.
Reach 2 km, SMF, PAM-4 electrical
LR4 (10 km), SMF, 4 λ LR4 (10 km), SMF, 4 λ Wavelengths: 1271, 1291, 1311 and 1331 nm • Dynamic performance in the presence of clock offset or TX
LR8 (10 km), SMF, 8 λ LR8 (10 km), SMF, 8 λ pre-emphasis adjustments
ER8 (40 km), SMF, 8 λ ER8 (40 km), SMF, 8 λ 26.5625 GBaud PAM-4 53.125 GBaud PAM-4
400GAUI-8 100 Gbps per Lambda

ROSA
TIA PIN
RX0
PAM4 4:1
8:4 WDM
RX7 Demux TIA PIN Demux

BENEFITS AND CHALLENGES

Optical
Interface

OF PAM-4 MODULATION
TOSA LC
Laser Laser Connector
TX0 Driver
PAM4 4:1
8:4 WDM
Mux Laser Mux

400G KP4 FEC

TX7 Laser
Driver
NRZ vs. PAM-4 Linear Coding vs. Gray Coding
PAM-4 is a 4 level modulation format that was When there is a wrong decision between levels B and C in linear PAM-4 coding,
introduced to „squeeze“ a higher bitrate into a it means that instead of „01“ one would decode „10“ (or vice versa), hence 2
given bandwidth transmission channel. With consecutive errored bits. I2C control 400G Ethernet uses the powerful KP4-FEC It is important to fully validate the FEC for both
PAM-4, one can double the bitrate by transmitting Control Interface CMIS-4.0 defined in IEEE 802.3bs to protect data over logical performance and power integrity. The FEC
2 bits with every clock step, as opposed to 1 bit Gray coding avoids this „double error“ issue by assigning the levels in such a way both the electrical and optical parts of the link. power requirements are very dynamic and can
per clock step with classical NRZ modulation that adjacent levels have at least one bit in common, hence a wrong decision at vary with error position and number.
the threshold would always cause just one errored bit, not 2. It can correct up to 15 symbols

ANATOMY OF A QSFP-DD (10 bit/symbol) in a 544 symbol codeword. Evaluation of pre-FEC and post-FEC performance
is a must!
D 11 10
B 1
C 10 11
D TWO ROWS OF CONNECTORS
B 01 01
A 0 QSFP-DD
C QSFP-DD has a second row of
A 00 00 Module electrical connectors, so that the
B number of AUI lanes is doubled
1

NRZ Modulation:
2 3 1

PAM-4 Modulation,
2 3 1

PAM-4 Modulation,
2 3 A
versus a standard 100G QSFP28.
This allows for 8 electrical TX and
8 electrical RX lanes.
VIAVI PORTFOLIO FOR 400G TESTING
 1 bit per clock cycle:
linear (non-Gray) coding: Gray coding: This, combined with a doubled VIAVI ONT-800 Family with VIAVI OneAdvisor-1000
• Voltage A = „0“
 2 bits per clock cycle  2 bits per clock cycle
bitrate by using PAM-4
modulation, enables the 400G
800G FLEX Modules • The VIAVI OneAdvisor-1000 provides portable test
• Voltage B = „1“ • Wrong Decision between • Wrong decision between bitrate in the QSFP form factor
The VIAVI ONT family covers all functionality for operators, data centers and teams
B and C -> 2 errored bits! B and C -> only 1 errored bit while maintaining downwards Test and Measurement needs for looking to install and troubleshoot high-rate systems
mechanical compatibility. the 50G/200G/400G ecosystem.
• Investment protection is ensured via the availability of
• Native support for QSFP-DD, QSFP-DD, and upcoming SFP-DD ports. Key applications
Challenges Posed by Using PAM-4 Modulation New adaptive equalizer methods are used at RX, e.g. Electrical 8 * 50G PAM-4 include RFC 2544, Y.1564, and Optics Self-Test. The modular
Instead of NRZ: approach allows to support applications up to 400G with
• FFE = feed forward equalizer • Native 400G ZR and 400G CFP2
Module Description possibilities down to T1/E1 rates.
• Decision threshold is no longer a simple „on/off“ • LDEQ = level dependent equalizer lineside solutions also available.
• Therefore, much higher amplitude linearity • RC = reflection cancellation QSFP-DD (400G) 2 rows of electrical contacts, each electrical lane is 50 Gbps PAM-4 at 25 GBaud • Key applications: Advanced Bit
is essential • DFE = decision feedback equalizer VIAVI MAP-300 Family
Error Analysis, Dynamic Skew
• Clock recovery is more difficult QSFP56 (200G) 1 row of electrical contacts, each electrical lane is 50 Gbps PAM-4 at 25 GBaud • MAP-300 is an optical test and measurement platform
Insertion, FEC Stress Test, CMIS
• Slicer levels may change over time New test patterns have been defined to cater for PAM-4 specifics optimized for compact cost-effective development and
QSFP28 (100G) 1 row of electrical contacts, each electrical lane is 25 Gbps NRZ at 25 GBaud 4.0 Debug, PAM-4 Symbol Error
• Impairments such as noise, jitter and crosstalk can • PRBSQ: standard length quaternary PRBS (pseudo-random bit sequence) manufacturing of optical communications technology.
and Bit Slip Analysis.
have higher impact • SSPRQ: Short stress pattern, repeating quaternary
• Available test modules include a wide range of Optical
Sources, Amplifiers, Attenuators, Muxes and more.

To learn more, visit viavisolutions.com

© 2020 VIAVI Solutions Inc. Product specifications and descriptions in this document are subject to change without notice.
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