Hyderabad Karnataka Education Society’s

POOJA DODDAPPA APPA COLLEGE OF ENGINEERING

KALABURAGI-585102- KARNATAKA

KALABURAGI
ESTD.:1958

Department of Information Science and Engineering

&
Department of Artificial Intelligence & Machine Learning

Lab Manual of
Digital System Design & Organization Laboratory
22ISL35/22AIL35

SEMESTER – III

Prepared by:
Prof. Gayatri Math
Smt. Geeta V.J
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VISION AND MISSION OF THE INSTITUTION

VISION

To be an institute of excellence in technical education and research to serve the needs of the
industry and society at local and global levels.

MISSION

 To provide a high-quality educational experience for students with values and ethics
that enables them to become leaders in their chosen profession.

 To create, explore, and develop innovations in engineering and science through

research and development activities.

 To provide beneficial service to the local, state, national and international industries
and communities via educational, technical, and professional activities.

VISION AND MISSION OF THE

INFORMATION SCIENCE & ENGINEERING DEPARTMENT

VISION
To impart quality education and research in Information Technology to produce a competent,
committed and goal oriented workforce to fulfil the needs of the local and global
requirements.
MISSION
The Department’s Mission is to advance knowledge in the Information and Computing
Science by providing our students with the highest quality educational experience by

 M1: Producing quality workforce with cutting edge technology.

 M2: Engaging in innovative teaching learning, research and community service.
 M3: Strengthening continuous interactions with alumni and industry and enable
graduates to attain entrepreneurial qualities with life-long learning skills.

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PROGRAM OUTCOMES
EngineeringGraduateswillbeableto:
1. Engineering knowledge:Apply the knowledgeof mathematics,
science,engineeringfundamentals,andanengineeringspecializationtothesolutionofcomplex
engineeringproblems.

2. Problemanalysis:Identify, formulate, review researchliterature, and

analysecomplexengineeringproblemsreachingsubstantiatedconclusionsusingfirstprinciple
sofmathematics,naturalsciences,andengineeringsciences.

3. Design/development of
solutions:Designsolutionsforcomplexengineeringproblemsanddesignsystemcomponents
orprocessesthatmeetthespecifiedneedswithappropriateconsiderationforthepublichealthand
safety,andthecultural,societal,andenvironmentalconsiderations.

4. Conductinvestigationsofcomplexproblems:Useresearch-
basedknowledgeandresearchmethodsincludingdesignofexperiments,analysisandinterpreta
tionofdata,andsynthesisoftheinformationtoprovidevalidconclusions.

5. Moderntoolusage:Create,select,andapplyappropriatetechniques,resources,andmoderneng
ineeringandITtoolsincludingpredictionandmodellingtocomplexengineeringactivitieswitha
nunderstandingofthelimitations.

6. Theengineer and society:Apply reasoning

informedbythecontextualknowledgetoassesssocietal,health,safety,legalandculturalissuesa
ndtheconsequentresponsibilitiesrelevanttotheprofessionalengineeringpractice.

7. Environmentandsustainability:Understandtheimpactoftheprofessionalengineeringsoluti
onsinsocietalandenvironmentalcontexts,anddemonstratetheknowledgeof,andneedforsustai
nabledevelopment.

8. Ethics:Applyethicalprinciplesandcommittoprofessionalethicsandresponsibilitiesandnorms
oftheengineeringpractice.

9. Individual and teamwork:Function effectively as an individual,and as a member or

leader indiverse teams,and in multidisciplinary settings.

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10. Communication:Communicateeffectivelyoncomplexengineeringactivitieswiththeenginee
ringcommunityandwithsocietyatlarge,such
as,beingabletocomprehendandwriteeffectivereportsanddesigndocumentation,make
effective presentations,and give and receive clear instructions.

11. Projectmanagementandfinance:Demonstrateknowledgeandunderstandingoftheengineer
ing andmanagementprinciplesandapplythesetoone’sownwork,as a member and leader in a
team,tomanageprojectsandinmultidisciplinaryenvironments.

12. Life-longlearning:Recognizetheneedfor
andhavethepreparationandabilitytoengageinindependentandlife-
longlearninginthebroadestcontextoftechnologicalchange.

PROGRAM SPECIFIC OUTCOMES (PSOS)

The graduates are able to:

PSO1: Demonstrate the working principles of computing systems and application

Software
PSO2: Provide the suitable strategies and design solutions to solve IT related problems.
PSO3: Apply the professional practices to implement and deploy the real life
applications
PROGRAM EDUCATIONAL OBJECTIVES (PEO’S):
PEO 1: Apply the principles of information and allied science, mathematics and
scientific investigation to solve real world problems appropriate to the
discipline.

PEO 2: Apply current industry accepted computing practices and emerging

technologies to analyze, design, implement, and verify high quality IT-based
solutions to real world problems.

PEO 3: Exhibit teamwork and effective communication skills.

PEO 4: Understand the ethical obligations, social impacts and apply their technical
knowledge positively and appropriately in the course of career and
professional journey.

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PEO 5: Be successfully employed or accepted into a postgraduate program, and

demonstrate a pursuit of lifelong learning.

Practical CIE Evaluation Method

Marking Criteria for Conduct of experimental work in Hardware Lab

The students The student The student The student’s The student
actively exhibit lack of exhibit lack of overall actively
participate team work but team work and involvement in participates
in team but moderately just observe teamwork, in team and take
supports support others and take conducting of lead
others for for conduct of readings from experimental to contribute for
conduct of experimental experimental work and taking conduct of
experimental work and take work. readings are not experimental
work and take readings himself (02) to acceptable work and
readings / herself. level. record the
himself / (03) (01) experimental
herself. data
(04) himself /
herself.
(05)

Marking Criteria for Writing Lab Record

The student presented data The student has presented The student has presented
analysis, result and either data analysis, neither data analysis,
conclusions clearly and result and conclusions result and conclusions
written basic information clearly or written basic clearly nor written
such as experimental data, information such as basic information such as
procedures, experimental data, experimental data,
related formula, table and procedures, procedures, related formula,
other necessary information related formula, table and table and other
in the report to the other necessary necessary information in the
acceptable level. information in the report to report to the
(03) the acceptable level. acceptable level.
(02) (01)

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Marking Criteria for Viva

The student exhibit The student either exhibit The student neither exhibit
understanding of concepts understanding of understanding of
and skill of concepts or skill of concepts nor skill of
communication.(02) communication. (01) communication.

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DSDO LAB

Subject Code: 22ISL32/22AIL35 Credits: 01

Hours/Week: 02 Hrs (Practical) SEE: 50 Marks
CIE: 50 Marks SEE: 03 Hrs

1. Design and implement Half adder, Full adder using basic gates.

2. Design and implement Half Subtractor, Full Subtractor using basic gates.

3. Simplify and realize the Boolean expression using logic gates.

4. Given any 4-variable logic expression, simplify using Entered Variable Map and

realize the simplified logic using 8:1 multiplexer IC.

5. Realize a full adder using 3-to-8 decoder IC and 4 input NAND gates.

6. Design and implement code converter I) Binary to Gray II) Gray to Binary code using

basic gates

7. Realize a J-K Master/Slave Flip-Flop using NAND gates and verify its truth table

8. Design and implement a mod-n(n<8) synchronous up counter using J-K Flip-Flop Ics.

9. Design and implement a ring counter using 4-bit shift register.

10. Design and implement an asynchronous counter using decade counter IC to count up

from 0 to n(n<=9)

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COURSE OBJECTIVES:
To enable the students to obtain the knowledge of Logic Design in the following
topics.
 Design basic logic circuits and analyse the operation of combinational circuits
like decoder, multiplexer, Full adder.
 Analyse the operation of flip flop, counters and shift registers.
 Perform and interpret parameters such as voltage and time period using
oscilloscope.
 Design and analyse sequential logic circuits.

COURSE OUTCOMES:
On completion of the course, the student will have the ability to:
 Design and evaluate logical circuits using K-map and Map entered variable
concepts.
 Design and implement sequential circuits.
 Design and Implement counters and shift registers
 Design and evaluate the code converter using op-amp circuits.
 Design and evaluate timing and multi vibrator circuits.

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INSTRUCTIONS TO STUDENTS
1. Students Leave their foot wares outside.
2. Students keep their bags in the rack.
3. Students must take care of their valuable things.
4. Students must bring Observation book, record and manual along with pen, pencil, and
eraser Etc., no borrowing from others.
5. Students must handle the trainer kit and other components carefully, as they are expensive.
6. Before switch on the trainer kit, must show the connections to one of the faculties or
instructors.
7. After the completion of the experiment should return the components to the respective
lab instructors.
8. Before leaving the lab, should check whether they have switch off the power supplies and
keep their chairs properly.

DO’S AND DONT’S

 Be regular to the Lab Do not come late to the Lab.
 Do not throw connecting wires on the Floor.
 Wear your College ID card Do not operate the IC trainer kits without permission.
 Avoid unnecessary talking while doing the experiment.
 Avoid loose connection and short circuits.
 Take the signature of the lab in charge before taking the components.
 Do not interchange the ICs while doing the experiment.
 Handle the trainer kit properly.
 Do not panic if you do not get the output.
 Keep your work area clean after completing the experiment.
 After completion of the experiment switch off the power and return the components.
 Arrange your chairs and tables before leaving.

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INTRODUCTION TO BASIC ELECTRONIC COMPONENTS

1. Resistors
A resistor is a component of an electrical circuit that resists the flow of electrical
current. A resistor has two terminals across which electricity must pass, and is designed to
drop the voltage of the current as it flows from one terminal to the next. A resistor is
primarily used to create and maintain a known safe current within an electrical
component. Resistance is measured in ohms, after Ohm's law. A 1000 Ohm resistor is
typically shown as1K-Ohm (kilo Ohm), and 1000 K-Ohms is written as 1M-Ohm (mega
ohm).

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2. Capacitors
The capacitor's capacitance (C) is a measure of the amount of charge (Q) stored on
each plate for a given potential difference or voltage (V) which appears across the plates.
In SI units, a capacitor has a capacitance is measured in farad (F). The different types of
capacitors are shown below.

3. Breadboard
A breadboard is a material or a device used to build a prototype of an electronic
circuit. The breadboard has many strips of metal which run underneath the board. The
metal strips are laid out as shown These strips connect the holes on the top of the board.
This makes it easy to connect components together to build circuits. the legs of
components are placed in the holes (the sockets). The holes are made so that they will
hold the component in place. Each hole is connected to one of the metal strips running
underneath the board. The long top and bottoms are usually used for power supply
connections.

4. Power Supply
A power supply is a separate unit or part of a circuit that supplies power to the rest of
the circuit or to a system. The power supply takes the current from your wall electrical
socket and converts it into the various voltages your circuit needs.

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5. Multimeter
A multimeter is a measuring instrument. An ammeter measures current, a voltmeter
measures the potential difference (voltage) between two points, and an ohmmeter
measures resistance. A multimeter combines these functions and possibly some additional
ones as well, in to a single instrument.

6. Signal/Function Generator
A function generator is a device that can produce various patterns of voltage at a
variety of frequencies and amplitudes. It is used to test the response of circuits to common
input signals. The electrical leads from the device are attached to the ground and signal
input terminals of the device under test. Most function generators allow the user to choose
the shape of the output from a small number of options.
• Square wave
• Sine wave
• Triangle wave
The amplitude control on a function generator varies the voltage difference between
high and low voltage of the output signal. The frequency control of a function generator
controls the rate at which output signal oscillates.

7. Cathode Ray oscilloscope (CRO)

The cathode-ray oscilloscope (CRO) is a common laboratory instrument that provides
accurate time and amplitude measurements of voltage signals over a wide range of
frequencies. Its reliability, stability, and ease of operation make it suitable as a general
purpose laboratory instrument.

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LOGIC GATES:

AND, OR and NOT gates are basic gates. XOR and XNOR are universal gates.
Basically logic gates are electronic circuits because they are made up of number of electronic
devices and components. Inputs and outputs of logic gates can occur only in two levels.
These two levels are term HIGH and LOW, or TRUE and FALSE, or ON AND off, OR
SIMPLY 1 AND 0. A table which lists all possible combinations of input variables and the
corresponding outputs is called a „truth table‟. It shows how the logic circuit‟s output
responds to various combinations of logic levels at the inputs.

AND GATE:-
An AND gate has two or more inputs but only one output. The output assumes the
logic 1 state only when each one of its inputs is at logic 1 state. The output assumes logic 0
state even if one of its input is at logic 0 state. AND gate is also called an „all or nothing‟
gate. The logic symbol & truth table of two input AND gate are shown in figure IC74LS08.

OR GATE:
Like an AND gate, an OR gate may have two or more inputs but only one output. The
output assumes the logic 1 state, even if one of its inputs is in logic 1 state. Its output assumes
logic 0 state, only when each one of its inputs is in logic 0 state. OR gate is also called an
„any or all‟ gate. It can also be called an inclusive OR gate because it includes the condition
„both the input can be present‟. The logic symbol & truth table of two input OR gate are
shown in figure IC74LS32

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NOT GATE:
A NOT gate is also known an inverter, has only one input and only one output. It is a
device whose output is always the complement of its input. That is the output of a not gate
assumes the logic 1 state when its input is in logic 0 state and assumes the logic 0 state when
its input is in logic 1 state. The logic symbol & truth table of NOT gate are shown in
figure.IC74LS04

NAND GATE:
NAND gate is universal gate. It can perform all the basic logic function. NAND
means NOT AND that is, AND output is NOTed.so NAND gate is combination of an AND
gate and a NOT gate. The output is logic 0 level, only when each of its inputs assumes a logic
1 level. For any other combination of inputs, the output is logic 1 level. NAND gate is
equivalent to a bubbled OR gate. The logic symbol & truth table of two input NAND gate are
shown in figureIC74LS00

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NOR GATE
NOR gate is universal gate. It can perform all the basic logic function. NOR means
NOT OR that is, OR output is NOTed.so NOR gate is combination of an OR gate and a NOT
gate. The output is logic 1 level, only when each of its inputs assumes a logic 0 level. For any
other combination of inputs, the output is logic 0 level. NOR gate is equivalent to a bubbled
AND gate. The logic symbol & truth table of two inputs NOR gate are shown in figure.

EXCLUSIVE-OR (X-OR) GATE

An X-OR gate is a two input, one output logic circuit, whose output assumes a logic 1
state when one and only one of its two inputs assumes a logic 1 state. Under the condition
when both the inputs are same either 0 or 1, the output assumes a logic 0 state. Since an X-
OR gate produces an output 1 only when the inputs are not equal, it is called as an anti-
coincidence gate or inequality detector. The output of an X-OR gate is the modulo sum of its
two inputs. The logic symbol & truth table of two input X-OR gate are shown in
figureIC74LS86

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Experiment 1

AIM: Design and implement Half adder&Full adder using Basic gates.

Description:
Half –Adder: A combinational logic circuit that performs the addition of two data bits. A
and B, is called a half-adder. Addition will result in tow output bits. One of which is the sum
bit, S, and the other is the carry bit, C. The Boolean functions describing the half adder are :

Sum = A + B
Carry = A B

Full – adder: The half –adder does not take the carry bit from its previous stage into account.
This carry bit from its previous stage is called carry-in bit. A combinational logic circuit that
adds two data bits, A and B, and a carry-in bit, Cin, is called a full-adder. The Boolean
functions describing the full adder are

Components Required: IC 7408, IC 7486, IC 7432, Power supply, Breadboard, LED,

Connecting wires, etc…

1.Half Adder

Circuit Diagram Truth Table

Boolean Equation

Sum = A + B
Carry = A B

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2 Full adder

Circuit diagram

Truth Table

Boolean Equation

Sum = (A + B) + Cin Carry = AB + Cin(A + B)

Procedure:
1. Check all the IC components
2. Make connections as per the circuit diagram
3. Give supply to the circuit
4. Provide input data to the circuit
5. Observe the outputs and verify the truth table sequence.

Result:
The truth table is verified

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Experiment 2

Aim: Design and implement Half subtractor & Full subtractor using basic gates.

Description:
Half Subtractor: Subtracting a single-bit binary value B from another A(i.e.A – B) produces
a difference bit D and a borrow out bit B-out. This operation is called half subtraction and the
circuit to realize it is called a half sub tractor. The Boolean functions describing the half
subtractor are

Difference = A + B
Borrow = A’ B

Full subtractor:Subtracting two single bit binary values, B, Cin from a single bit value A
produces a difference bit D and a borrow out Br bit. This is called full subtraction. The
Difference = (x + y) + Cin
Borrow = A’B + A’(Cin) + B(Cin)

Components Required: IC 7400, IC 7408, IC 7486, IC 7432, IC 7404, Power supply,

Breadboard, LED, Connecting wires, etc…

Half Subtractor

Circuit diagram Truth Table

Full subtractor circuit diagram

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Truth Table

Procedure:

1. Check all the IC components

2. Make connections as per the circuit diagram
3. Give supply to the circuit
4. Provide input data to the circuit
5. Observe the outputs and verify the truth table sequence.

Result:
The truth table is verified.

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EXPERIMENT 3

Aim:Simplify and realize the Boolean expression using logic gates.

Description:
In many digital circuits and practical problems, we need to find expressions with minimum
variables. We can minimize Boolean expressions of 3, 4 variables very easily using K-map
without using any Boolean algebra theorems.
K-map can take two forms:
1. Sum of product (SOP)
2. Product of Sum (POS)

K-map for 4 variables

Example:
Simplify the following function using k-map technique
f(a,b,c,d)=Σm(0,4,7,8,12,15)
Y=A’B’C’D’+A’BC’D’+A’BCD+AB’C’D’+ABC’D’+ABCD
Simplified expression obtained using K-MAP is
Y=C’D’+BCD.

Components Required: IC 7408,IC7432,IC7404, Power Supply, Breadboard, LED,

Connecting Wires, etc.

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Circuit Diagram:

Truth Table:
Decimal abcd f

0 0000 1
1 0001 0
2 0010 0
3 0011 0
4 0100 1
5 0101 0
6 0110 0
7 0111 1
8 1000 1
9 1001 0
10 1010 0
11 1011 0
12 1100 1
13 1101 0
14 1110 0
15 1111 1

Procedure:

1. Check all the IC components

2. Make connections as per the circuit diagram
3. Give supply to the circuit
4. Provide input data to the circuit
5. Observe the outputs and verify the truth table sequence.

Result:
The truth table is verified.

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Experiment 4

Aim:Given any 4-variable logic expression, simplify using Entered Variable Map and realize
the simplified logic using 8:1 multiplexer IC.

Description: Multiplex means many into one. A multiplexer is a circuit with many inputs but
only one output. By applying control signals, we can steer any input to the output. Thus it is
also called a data selector and control inputs are termed select inputs.
Necessity of multiplexers:
 In most of the electronic systems, the digital data is available on more than one line. It
is necessary to route this data over a single line.
 Under such circumstances we require a circuit which selects one of the many inputs at
a time.
 This circuit is nothing else but a multiplexer, which has many inputs, one output &
some select inputs.
 Multiplexer improves the reliability of the digital system because it reduces the
number of external wired connections.

Components Required: IC 74151, Power Supply, Breadboard, LED, Connecting Wires, etc.

Pin Diagram:

Example:
Simplify the following function using MEV technique
f(a,b,c,d)=Σm(2,3,4,5,13,15)+dc(8,9,10,11)

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Truth Table:
Decimal abcd f MEV map data
entry
0 0000 0
0 D0
1 0001 0
2 0010 1
1 D1
3 0011 1
4 0100 1
1 D2
5 0101 1
6 0110 0
0 D3
7 0111 0
8 1000 X
X D4
9 1001 X
10 1010 X
X D5
11 1011 X
12 1100 0
D D6
13 1101 1
14 1110 0
D D7
15 1111 1

Circuit Diagram:

Procedure:

1. Simplify the given logic expression using Map entered variable map.
2. Check all the IC components using digital IC tester.
3. Make connections as per the circuit diagram.
4. Give supply to the circuit.
5. Provide input data to the circuit.
6. Verify the truth table sequence. Observe the outputs.

Result:
The truth table is verified.

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Experiment 5
Aim:Realize a full adder using 3-to-8 decoder IC and 4 input NAND gates.

Description:A decoder is similar to a demultiplexer, with one exception-there is no data

input. The only inputs are the control bits.A 1-of-n binary decoder has n output bits. This type
of decoder asserts exactly one of its n output bits, or none of them, for every integer input
value.A 3-to-8-line decoder activates one of eight output bits for each input value from 0 to 7
— the range of integer values that can be expressed in three bits.

A full adder is a logical circuit that performs an addition operation on three one-bit binary
numbers. The full adder produces a sum of the three inputs and carry value.

Components Required: Ic’s 74138, 7420, Power supply, Breadboard, LED’s, Connecting
Wires, etc.,

Pin Diagram:

IC 74138 3 to 8 Decoder/demultiplexer IC7420 Dual 4 input NAND gate

Truth Table:

Decimal A B Cin Sum Cout

0 0 0 0 0 0
1 0 0 1 1 0
2 0 1 0 1 0
3 0 1 1 0 1
4 1 0 0 1 0
5 1 0 1 0 1
6 1 1 0 0 1
7 1 1 1 1 1

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K-map:

Cout = A B + A Cin + B Cin Sum = Ā 𝐵´ Cin + Ā B 𝐶´ in+ A 𝐵´𝐶´ in+A B Cin

Circuit Diagram:

Procedure:
1. Check all the IC components using digital IC tester.
2. Make connections as per the circuit diagram.
3. Give supply to the circuit.
4. Provide input data to the circuit.
5. Verify the truth table sequence. Observe the outputs.

Result:

The truth table is verified.

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Experiment 6

Aim:Design and implement code converter I) Binary to Gray II) Gray to Binary code using
basic gates.

Description:
Gray Code system is a binary number system in which every successive pair of
numbers differs in only one bit. It is used in applications in which the normal sequence of
binary numbers generated by the hardware may produce an error or ambiguity during the
transition from one number to the next. For example, the states of a system may change
from 3(011) to 4(100) as- 011 — 001 — 101 — 100. Therefore there is a high chance of a
wrong state being read while the system changes from the initial state to the final state. This
could have serious consequences for the machine using the information. The Gray code
eliminates this problem since only one bit changes its value during any transition between
two numbers.

Components Required: IC 74LS86 ,Power supply, Breadboard, connecting wires, LED’s,

etc.

Truth Table

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Circuit diagram of Gray to Binary code

Truth Table

Procedure:
1. Check all the IC components using digital IC tester.
2. Make connections as per the circuit diagram.
3. Give supply to the circuit.
4. Provide input data to the circuit.
5. Verify the truth table sequence. Observe the outputs.

Result:
The truth table is verified.

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Experiment 7
Aim:Realize a J-K Master/Slave Flip-Flop using NAND gates and verify its truth table.

Description:
A flip-flop is a device very much like a latch in that it is a bistable multivibrator,
having two states and a feedback path that allows it to store a bit of information. The
difference between a latch and a flip-flop is that a latch is asynchronous, and the outputs can
change as soon as the inputs do (or at least after a small propagation delay). A flip-flop, on
the other hand, is edge-triggered and only changes state when a control signal goes from high
to low or low to high.

Master Slave Flip Flop: The control inputs to a clocked flip flop will be making a transition
at approximately the same times as triggering edge of the clock input occurs. This can lead to
unpredictable triggering. A JK master flip flop is positive edge triggered, whereas slave is
negative edge triggered. Therefore, master first responds to J and K inputs and then slave. If
J=0 and K=1, master resets on arrival of positive clock edge. High output of the master drives
the K input of the slave. For the trailing edge of the clock pulse the slave is forced to reset. If
both the inputs are high, it changes the state or toggles on the arrival of the positive clock
edge and the slave toggles on the negative clock edge. The slave does exactly what the master
does.

Components Required: IC 74LS00, IC 74LS10, IC 74LS04,Power supply, function

generator, Breadboard, connecting wires, LED’s, etc.

Circuit Diagram:

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Truth Table:
Clk J K Q
↑ 0 0 Qo (no change)
↑ 0 1 1
↑ 1 0 0
↑
1 1 Q (Toggles)

Procedure:
1. Check all the IC components using digital IC tester.
2. Make connections as per the circuit diagram.
3. Give supply to the circuit.
4. Provide input data to the circuit.
5. Verify the truth table sequence. Observe the outputs.

Result:
The truth table is verified.

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Experiment 8
Aim:Design and implement a mod-n(n<8) synchronous up counter using J-K Flip-Flop Ics.

Description:
In digital logic and computing, a counter is a device which stores and displays the
number of times a particular event or process has occurred, often in relationship to a clock
signal.

A synchronous counter is one whose output bits change state simultaneously. Such a counter
circuit can be built from JK flip-flop by connecting all the clock inputs together, so that each
and every flip-flop receives the exact same clock pulse at the exact same time. This results in
all the individual output bits changing state at exactly the same time in response to the
common clock signal with no ripple effect i.e. with no propagation delay.

By examining the four-bit binary count sequence, it noticed that just before a bit toggles, all
preceding bits are "high". That is a synchronous up-counter can be implemented by toggling
the bit when all of the less significant bits are at a logic high state. For example, bit 1 toggles
when bit 0 is logic high; bit 2 toggles when both bit 1 and bit 0 are logic high; bit 3 toggles
when bit 2, bit 1 and bit 0 are all high; and so on

Components Required: IC 74LS76, IC 74LS08, Power Supply, function generator,

Breadboard, LEDs, Connecting wires, etc.

Pin Diagram: IC 7476

Circuit diagram:

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Design:

Result:

The truth table is verified.

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Experiment 9

Aim:Design and implement a ring counter using 4-bit shift register.

Description:
Ring counter is a basic register with direct feedback such that the contents of the
register simply circulate around the register when the clock is running. Here the last output
that is QD in a shift register is connected back to the serial input.

A basic ring counter can be slightly modified to produce another type of shift register counter
called Johnson counter. Here complement of last output is connected back to the not gate
input and not gate output is connected back to serial input. A four bit Johnson counter gives 8
state output.

Components Required: IC 7495, 4 LED, Bread Board, Connecting wires, 0-5V DC power
supply, Function generator.

Pin Diagram:

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Circuit Diagram:

Procedure:
1. Check all the components for their working.
2. Insert the appropriate IC into the IC base.
3. Make connections as shown in the circuit diagram.
4. Apply clock to pin number 9 and observe the output

Result:
The truth table is verified.

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Experiment 10

Aim:Design and implement an asynchronous counter using decade counter IC to count up

from 0 to n(n<=9).

Description:
Asynchronous counter is also called as ripple counter as the ith flip-flop is toggled by a
change in the (i-1)th flip-flop. The pulses to be counted ripple through the counter. These
counters are called as asynchronous counter as the clock pulses are not simultaneously
applied to all the flip-flops.
7490 is a TTL MSI decade counter (can count from 0-9 i.e. 10). The flip-flop QB, QC, QD
from mod-5 counter. Flip-Flop QD is a RS Flip-flop that has direct connection from its Q
input back to its R input. The net result is this case Q D behaves exactly like a JK flip-flop. If
system clock is applied at input A & QA (i.e. Pin 14 and pin 12) is connected to input B (ie
Pin 1), then we have a true binary decade counter. On the other hand, if system clock is
applied at input B and QD is connected to input A, then we have binary counter.

Components Required: IC 7490, 4 LED, Bread Board, Connecting wires, 0-5V DC power
supply, Function generator.

Pin Diagram:

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State Diagram:

Truth Table:

CLK QD QC QB QA Decimal
Equivalent
0 0 0 0 0 0
1 0 0 0 1 1
2 0 0 1 0 2
3 0 0 1 1 3
4 0 1 0 0 4
5 0 1 0 1 5
6 0 1 1 0 6
7 0 1 1 1 7
8 1 0 0 0 8
9 1 0 0 1 9

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Circuit Diagram:

Procedure:
1. Check all the components for their working.
2. Insert the appropriate IC into the IC base.
3. Make connections as shown in the circuit diagram.
4. Apply clock to pin number 14 and observe the output

Result:
The truth table is verified.

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Sample Viva Questions

1. Why operational amplifier is called by its name?
2. Explain the advantages of OPAMP over transistor amplifiers.
3. List the OPAMP ideal characteristics.
4. Give the symbol of OPAMP
5. Explain the various applications of OPAMP
6. Define UTP and LTP
7. Mention the applications of schmitt trigger
8. What is a square wave generator/ Regenerative comparator?
9. Give the hysterisis curve of a schmitt trigger
10. What is a bipolar and unipolar devices? Give examples
11. Define resolution
12. Explain the need of D/A and A/D converters.
13. List the different types of A/D and D/ A converters
14. What is a multivibrators?
15. What is a bistable multivibrators?
16. Give the applications of monostable and astable multivibrators
17. Explain the working of 555 timer as astable and monostable multivibrator
18. Why astable multivibrator is called as free running multivibrato
19. Define duty cycle.
20. List the applications of 555 timer
21. Explain 555 timer as astable multivibrator to generate a rectangular wave of duty cycle of
less than 0.5
22. Define a logic gate.
23. What are basic gates?
24. Why NAND and NOR gates are called as universal gates?
25. State De morgans theorem
26. Give examples for SOP and POS
27. Explain how transistor can be used as NOT gate
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28. Realize logic gates using NAND and NOR gates only
29. List the applications of EX-OR and EX~NOR gates
30. What is a half adder?
31. What is a full adder?
32. Differentiate between combinational and sequential circuits. Give examples
33. Give the applications of combinational and sequential circuits
34. Define flip flop
35. What is an excitation table?
36. What is race around condition?
37. How do you eliminate race around condition?
38. What is minterm an d max term?
39. Define multiplexer/ data selector
40. What is a demultiplexer?
41. Give the applications of mux and demux
42. What is a encoder and decoder?
43. Compare mux and encoder
44. Compare demux and decoder
45. What is a priority encoder?
46. What are counters? Give their applications.
47. Compare synchronous and asynchronous counters
48. What is modulus of a number?
49. What is a shift register?
50. What does LS stand for, in 74LSOO?
51. What is positive logic and negative logic?
52. What are code converters?
53. What is the necessity of code conversions?
54. What is gray code?

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